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authorktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>2016-02-19 14:20:27 +0000
committerktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>2016-02-19 14:20:27 +0000
commitcf2ed1b7a02dae9dfc6e3c19ce81626ab5643f42 (patch)
tree0ab61fa481a9a16a67e5b0be85b8a9f9d15c82ac
parentf6cc34b0a8a3dd2183ea60d91b43f95550a706bc (diff)
downloadgcc-cf2ed1b7a02dae9dfc6e3c19ce81626ab5643f42.tar.gz
[AArch64] Skip gcc.target/aarch64/assembler_arch_1.c if assembler does not support it
* lib/target-supports.exp: Define aarch64_asm_FUNC_ok checks for fp, simd, crypto, crc, lse. * doc/sourcebuild.texi (AArch64-specific attributes): Document the above. * gcc.target/aarch64/assembler_arch_1.c: Add aarch64_asm_lse_ok effective target check. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@233559 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/doc/sourcebuild.texi3
-rw-r--r--gcc/testsuite/ChangeLog9
-rw-r--r--gcc/testsuite/gcc.target/aarch64/assembler_arch_1.c1
-rw-r--r--gcc/testsuite/lib/target-supports.exp17
4 files changed, 30 insertions, 0 deletions
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 6d548aad7aa..c5354cfc8f3 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1606,6 +1606,9 @@ ARM target prefers @code{LDRD} and @code{STRD} instructions over
@subsubsection AArch64-specific attributes
@table @code
+@item aarch64_asm_<ext>_ok
+AArch64 assembler supports the architecture extension @code{ext} via the
+@code{.arch_extension} pseudo-op.
@item aarch64_tiny
AArch64 target which generates instruction sequences for tiny memory model.
@item aarch64_small
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 365ec1f40b0..604bb3c27da 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2016-02-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * lib/target-supports.exp: Define aarch64_asm_FUNC_ok checks
+ for fp, simd, crypto, crc, lse.
+ * doc/sourcebuild.texi (AArch64-specific attributes): Document the
+ above.
+ * gcc.target/aarch64/assembler_arch_1.c: Add aarch64_asm_lse_ok
+ effective target check.
+
2016-02-19 Jakub Jelinek <jakub@redhat.com>
PR target/69820
diff --git a/gcc/testsuite/gcc.target/aarch64/assembler_arch_1.c b/gcc/testsuite/gcc.target/aarch64/assembler_arch_1.c
index 901e50a178d..5deea5cf0ee 100644
--- a/gcc/testsuite/gcc.target/aarch64/assembler_arch_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/assembler_arch_1.c
@@ -1,4 +1,5 @@
/* { dg-do assemble } */
+/* { dg-require-effective-target aarch64_asm_lse_ok } */
/* { dg-options "-march=armv8-a" } */
/* Make sure that the function header in assembly doesn't override
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 66fb1eaf7bd..0b4252f6434 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -6719,6 +6719,23 @@ proc check_effective_target_aarch64_tiny { } {
}
}
+# Create functions to check that the AArch64 assembler supports the
+# various architecture extensions via the .arch_extension pseudo-op.
+
+foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
+ eval [string map [list FUNC $aarch64_ext] {
+ proc check_effective_target_aarch64_asm_FUNC_ok { } {
+ if { [istarget aarch64*-*-*] } {
+ return [check_no_compiler_messages aarch64_FUNC_assembler object {
+ __asm__ (".arch_extension FUNC");
+ } "-march=armv8-a+FUNC"]
+ } else {
+ return 0
+ }
+ }
+ }]
+}
+
proc check_effective_target_aarch64_small { } {
if { [istarget aarch64*-*-*] } {
return [check_no_compiler_messages aarch64_small object {