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| author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-07-06 10:57:07 +0000 |
|---|---|---|
| committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-07-06 10:57:07 +0000 |
| commit | 35821c01f393b078c071f66575be121c2b0bdd83 (patch) | |
| tree | bcf15c57eec011d485dd8f6d78a93d379c07f369 | |
| parent | e1bfea630ba7c031b803f28e7ff212fc3ef724f7 (diff) | |
| download | gcc-35821c01f393b078c071f66575be121c2b0bdd83.tar.gz | |
* config/i386/i386.md (simple lea to add peephole): Also transform
RTXes where second PLUS operand matches output.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@189320 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 19 |
2 files changed, 24 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 15ee003686d..15053da446b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2012-07-06 Uros Bizjak <ubizjak@gmail.com> + * config/i386/i386.md (simple lea to add peephole): Also transform + RTXes where second PLUS operand matches output. + +2012-07-06 Uros Bizjak <ubizjak@gmail.com> + * config/i386/i386.c (construct_plt_address): Make static. * config/i386/i386-protos.h (construct_plt_address): Remove. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index bdee324797c..b88db5b4ef5 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -17301,6 +17301,14 @@ (clobber (reg:CC FLAGS_REG))])]) (define_peephole2 + [(set (match_operand:SWI48 0 "register_operand") + (plus:SWI48 (match_operand:SWI48 1 "<nonmemory_operand>") + (match_dup 0)))] + "peep2_regno_dead_p (0, FLAGS_REG)" + [(parallel [(set (match_dup 0) (plus:SWI48 (match_dup 0) (match_dup 1))) + (clobber (reg:CC FLAGS_REG))])]) + +(define_peephole2 [(set (match_operand:SI 0 "register_operand") (subreg:SI (plus:DI (match_operand:DI 1 "register_operand") (match_operand:DI 2 "nonmemory_operand")) 0))] @@ -17312,6 +17320,17 @@ "operands[2] = gen_lowpart (SImode, operands[2]);") (define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (subreg:SI (plus:DI (match_operand:DI 1 "nonmemory_operand") + (match_operand:DI 2 "register_operand")) 0))] + "TARGET_64BIT + && peep2_regno_dead_p (0, FLAGS_REG) + && REGNO (operands[0]) == REGNO (operands[2])" + [(parallel [(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1))) + (clobber (reg:CC FLAGS_REG))])] + "operands[1] = gen_lowpart (SImode, operands[1]);") + +(define_peephole2 [(set (match_operand:SWI48 0 "register_operand") (mult:SWI48 (match_dup 0) (match_operand:SWI48 1 "const_int_operand")))] |