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-rw-r--r--erts/configure.ac21
1 files changed, 20 insertions, 1 deletions
diff --git a/erts/configure.ac b/erts/configure.ac
index ab2ee78acd..a052c319ba 100644
--- a/erts/configure.ac
+++ b/erts/configure.ac
@@ -2855,7 +2855,26 @@ AS_IF([test ${enable_jit} != no],
JIT_ARCH=x86
;;
arm64)
- JIT_ARCH=arm
+ case "$OPSYS" in
+ win32|darwin)
+ # These platforms have dedicated system calls for clearing
+ # instruction cache, and don't require us to manually issue
+ # instruction barriers on all threads.
+ JIT_ARCH=arm
+ ;;
+ *)
+ # We need to use `DC CVAU`, `IC IVAU`, and `ISB SY` to clear
+ # instruction cache. These have already been tested as part of
+ # ETHR_CHK_GCC_ATOMIC_OPS([]).
+
+ if test "$ethr_arm_isb_sy_instr_val$ethr_arm_dc_cvau_instr_val$ethr_arm_ic_ivau_instr_val" = "111"; then
+ JIT_ARCH=arm
+ else
+ enable_jit=no
+ AC_MSG_WARN([JIT disabled due to lack of cache-clearing instructions])
+ fi
+ ;;
+ esac
;;
*)
if test ${enable_jit} = yes; then