diff options
-rw-r--r-- | backends/ChangeLog | 7 | ||||
-rw-r--r-- | backends/Makefile.am | 8 | ||||
-rw-r--r-- | backends/riscv_init.c | 57 | ||||
-rw-r--r-- | backends/riscv_reloc.def | 83 | ||||
-rw-r--r-- | backends/riscv_symbol.c | 62 | ||||
-rw-r--r-- | libebl/ChangeLog | 4 | ||||
-rw-r--r-- | libebl/eblopenbackend.c | 2 | ||||
-rw-r--r-- | src/ChangeLog | 4 | ||||
-rw-r--r-- | src/elflint.c | 2 | ||||
-rw-r--r-- | tests/ChangeLog | 6 | ||||
-rw-r--r-- | tests/Makefile.am | 2 | ||||
-rw-r--r-- | tests/hello_riscv64.ko.bz2 | bin | 0 -> 1166 bytes | |||
-rwxr-xr-x | tests/run-strip-reloc.sh | 3 |
13 files changed, 235 insertions, 5 deletions
diff --git a/backends/ChangeLog b/backends/ChangeLog index 57baea09..63bb7e44 100644 --- a/backends/ChangeLog +++ b/backends/ChangeLog @@ -1,3 +1,10 @@ +2018-04-19 Andreas Schwab <schwab@suse.de> + + * Makefile.am (modules): Add riscv. + * riscv_init.c: New file. + * riscv_reloc.def: New file. + * riscv_symbol.c: New file. + 2018-04-11 Mark Wielaard <mark@klomp.org> * aarch64_cfi.c (aarch64_abi_cfi): Add rule for restoring SP from diff --git a/backends/Makefile.am b/backends/Makefile.am index 2c62add2..80aa00e7 100644 --- a/backends/Makefile.am +++ b/backends/Makefile.am @@ -33,12 +33,12 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl -I$(top_srcdir)/libasm \ modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \ - tilegx m68k bpf + tilegx m68k bpf riscv libebl_pic = libebl_i386_pic.a libebl_sh_pic.a libebl_x86_64_pic.a \ libebl_ia64_pic.a libebl_alpha_pic.a libebl_arm_pic.a \ libebl_aarch64_pic.a libebl_sparc_pic.a libebl_ppc_pic.a \ libebl_ppc64_pic.a libebl_s390_pic.a libebl_tilegx_pic.a \ - libebl_m68k_pic.a libebl_bpf_pic.a + libebl_m68k_pic.a libebl_bpf_pic.a libebl_riscv_pic.a noinst_LIBRARIES = $(libebl_pic) noinst_DATA = $(libebl_pic:_pic.a=.so) @@ -131,6 +131,10 @@ cpu_bpf = ../libcpu/libcpu_bpf.a libebl_bpf_pic_a_SOURCES = $(bpf_SRCS) am_libebl_bpf_pic_a_OBJECTS = $(bpf_SRCS:.c=.os) +riscv_SRCS = riscv_init.c riscv_symbol.c +libebl_riscv_pic_a_SOURCES = $(riscv_SRCS) +am_libebl_riscv_pic_a_OBJECTS = $(riscv_SRCS:.c=.os) + libebl_%.so libebl_%.map: libebl_%_pic.a $(libelf) $(libdw) $(libeu) @rm -f $(@:.so=.map) diff --git a/backends/riscv_init.c b/backends/riscv_init.c new file mode 100644 index 00000000..761d9c2e --- /dev/null +++ b/backends/riscv_init.c @@ -0,0 +1,57 @@ +/* Initialization of RISC-V specific backend library. + This file is part of elfutils. + + This file is free software; you can redistribute it and/or modify + it under the terms of either + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at + your option) any later version + + or + + * the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at + your option) any later version + + or both in parallel, as here. + + elfutils is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received copies of the GNU General Public License and + the GNU Lesser General Public License along with this program. If + not, see <http://www.gnu.org/licenses/>. */ + +#ifdef HAVE_CONFIG_H +# include <config.h> +#endif + +#define BACKEND riscv_ +#define RELOC_PREFIX R_RISCV_ +#include "libebl_CPU.h" + +/* This defines the common reloc hooks based on riscv_reloc.def. */ +#include "common-reloc.c" + + +const char * +riscv_init (Elf *elf __attribute__ ((unused)), + GElf_Half machine __attribute__ ((unused)), + Ebl *eh, + size_t ehlen) +{ + /* Check whether the Elf_BH object has a sufficent size. */ + if (ehlen < sizeof (Ebl)) + return NULL; + + /* We handle it. */ + eh->name = "RISC-V"; + riscv_init_reloc (eh); + HOOK (eh, reloc_simple_type); + HOOK (eh, machine_flag_check); + + return MODVERSION; +} diff --git a/backends/riscv_reloc.def b/backends/riscv_reloc.def new file mode 100644 index 00000000..2bd3513e --- /dev/null +++ b/backends/riscv_reloc.def @@ -0,0 +1,83 @@ +/* List the relocation types for RISC-V. -*- C -*- + This file is part of elfutils. + + This file is free software; you can redistribute it and/or modify + it under the terms of either + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at + your option) any later version + + or + + * the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at + your option) any later version + + or both in parallel, as here. + + elfutils is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received copies of the GNU General Public License and + the GNU Lesser General Public License along with this program. If + not, see <http://www.gnu.org/licenses/>. */ + +/* NAME, REL|EXEC|DYN */ + +RELOC_TYPE (NONE, EXEC|DYN) +RELOC_TYPE (32, REL|EXEC|DYN) +RELOC_TYPE (64, REL|EXEC|DYN) +RELOC_TYPE (RELATIVE, EXEC|DYN) +RELOC_TYPE (COPY, EXEC|DYN) +RELOC_TYPE (JUMP_SLOT, EXEC|DYN) +RELOC_TYPE (TLS_DTPMOD32, EXEC|DYN) +RELOC_TYPE (TLS_DTPMOD64, EXEC|DYN) +RELOC_TYPE (TLS_DTPREL32, EXEC|DYN) +RELOC_TYPE (TLS_DTPREL64, EXEC|DYN) +RELOC_TYPE (TLS_TPREL32, EXEC|DYN) +RELOC_TYPE (TLS_TPREL64, EXEC|DYN) +RELOC_TYPE (BRANCH, REL) +RELOC_TYPE (JAL, REL) +RELOC_TYPE (CALL, REL) +RELOC_TYPE (CALL_PLT, REL) +RELOC_TYPE (GOT_HI20, REL) +RELOC_TYPE (TLS_GOT_HI20, REL) +RELOC_TYPE (TLS_GD_HI20, REL) +RELOC_TYPE (PCREL_HI20, REL) +RELOC_TYPE (PCREL_LO12_I, REL) +RELOC_TYPE (PCREL_LO12_S, REL) +RELOC_TYPE (HI20, REL) +RELOC_TYPE (LO12_I, REL) +RELOC_TYPE (LO12_S, REL) +RELOC_TYPE (TPREL_HI20, REL) +RELOC_TYPE (TPREL_LO12_I, REL) +RELOC_TYPE (TPREL_LO12_S, REL) +RELOC_TYPE (TPREL_ADD, REL) +RELOC_TYPE (ADD8, REL) +RELOC_TYPE (ADD16, REL) +RELOC_TYPE (ADD32, REL) +RELOC_TYPE (ADD64, REL) +RELOC_TYPE (SUB8, REL) +RELOC_TYPE (SUB16, REL) +RELOC_TYPE (SUB32, REL) +RELOC_TYPE (SUB64, REL) +RELOC_TYPE (GNU_VTINHERIT, REL) +RELOC_TYPE (GNU_VTENTRY, REL) +RELOC_TYPE (ALIGN, REL) +RELOC_TYPE (RVC_BRANCH, REL) +RELOC_TYPE (RVC_JUMP, REL) +RELOC_TYPE (RVC_LUI, REL) +RELOC_TYPE (GPREL_I, REL) +RELOC_TYPE (GPREL_S, REL) +RELOC_TYPE (TPREL_I, REL) +RELOC_TYPE (TPREL_S, REL) +RELOC_TYPE (RELAX, REL) +RELOC_TYPE (SUB6, REL) +RELOC_TYPE (SET6, REL) +RELOC_TYPE (SET8, REL) +RELOC_TYPE (SET16, REL) +RELOC_TYPE (SET32, REL) +RELOC_TYPE (32_PCREL, REL) diff --git a/backends/riscv_symbol.c b/backends/riscv_symbol.c new file mode 100644 index 00000000..628e0572 --- /dev/null +++ b/backends/riscv_symbol.c @@ -0,0 +1,62 @@ +/* RISC-V specific symbolic name handling. + This file is part of elfutils. + + This file is free software; you can redistribute it and/or modify + it under the terms of either + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at + your option) any later version + + or + + * the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at + your option) any later version + + or both in parallel, as here. + + elfutils is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received copies of the GNU General Public License and + the GNU Lesser General Public License along with this program. If + not, see <http://www.gnu.org/licenses/>. */ + +#ifdef HAVE_CONFIG_H +# include <config.h> +#endif + +#include <assert.h> +#include <elf.h> +#include <stddef.h> +#include <string.h> + +#define BACKEND riscv_ +#include "libebl_CPU.h" + + +/* Check for the simple reloc types. */ +Elf_Type +riscv_reloc_simple_type (Ebl *ebl __attribute__ ((unused)), int type) +{ + switch (type) + { + case R_RISCV_32: + return ELF_T_WORD; + case R_RISCV_64: + return ELF_T_XWORD; + default: + return ELF_T_NUM; + } +} + +/* Check whether machine flags are valid. */ +bool +riscv_machine_flag_check (GElf_Word flags) +{ + return ((flags &~ (EF_RISCV_RVC + | EF_RISCV_FLOAT_ABI)) == 0); +} diff --git a/libebl/ChangeLog b/libebl/ChangeLog index b4e9049c..66e8aa30 100644 --- a/libebl/ChangeLog +++ b/libebl/ChangeLog @@ -1,3 +1,7 @@ +2018-04-19 Andreas Schwab <schwab@suse.de> + + * eblopenbackend.c (machines): Add entries for RISC-V. + 2018-03-16 Mark Wielaard <mark@klomp.org> * ebldynamictagname.c (ebl_dynamic_tag_name): Add SYMTAB_SHNDX to diff --git a/libebl/eblopenbackend.c b/libebl/eblopenbackend.c index 1f814776..fcf86f6e 100644 --- a/libebl/eblopenbackend.c +++ b/libebl/eblopenbackend.c @@ -134,6 +134,8 @@ static const struct { "xtensa", "elf_xtensa", "xtensa", 6, EM_XTENSA, 0, 0 }, { "aarch64", "elf_aarch64", "aarch64", 7, EM_AARCH64, ELFCLASS64, 0 }, { "bpf", "elf_bpf", "bpf", 3, EM_BPF, 0, 0 }, + { "riscv", "elf_riscv", "riscv", 5, EM_RISCV, ELFCLASS64, ELFDATA2LSB }, + { "riscv", "elf_riscv", "riscv", 5, EM_RISCV, ELFCLASS32, ELFDATA2LSB }, }; #define nmachines (sizeof (machines) / sizeof (machines[0])) diff --git a/src/ChangeLog b/src/ChangeLog index 2d525e6d..77644821 100644 --- a/src/ChangeLog +++ b/src/ChangeLog @@ -1,3 +1,7 @@ +2018-04-19 Andreas Schwab <schwab@suse.de> + + * elflint.c (valid_e_machine): Add EM_RISCV. + 2018-04-16 Mark Wielaard <mark@klomp.org> * readelf.c (print_debug_line_section). In advance_pc, advance diff --git a/src/elflint.c b/src/elflint.c index ebb0e4e0..fb40fe7f 100644 --- a/src/elflint.c +++ b/src/elflint.c @@ -331,7 +331,7 @@ static const int valid_e_machine[] = EM_CRIS, EM_JAVELIN, EM_FIREPATH, EM_ZSP, EM_MMIX, EM_HUANY, EM_PRISM, EM_AVR, EM_FR30, EM_D10V, EM_D30V, EM_V850, EM_M32R, EM_MN10300, EM_MN10200, EM_PJ, EM_OPENRISC, EM_ARC_A5, EM_XTENSA, EM_ALPHA, - EM_TILEGX, EM_TILEPRO, EM_AARCH64, EM_BPF + EM_TILEGX, EM_TILEPRO, EM_AARCH64, EM_BPF, EM_RISCV }; #define nvalid_e_machine \ (sizeof (valid_e_machine) / sizeof (valid_e_machine[0])) diff --git a/tests/ChangeLog b/tests/ChangeLog index 27e5bd85..14159d80 100644 --- a/tests/ChangeLog +++ b/tests/ChangeLog @@ -1,3 +1,9 @@ +2018-04-19 Andreas Schwab <schwab@suse.de> + + * hello_riscv64.ko.bz2: New file. + * run-strip-reloc.sh: Test it. + * Makefile.am (EXTRA_DIST): Add it. + 2018-04-16 Mark Wielaard <mark@klomp.org> * testfile-ppc64-min-instr.bz2: New testfile. diff --git a/tests/Makefile.am b/tests/Makefile.am index 16abfb08..6b1356e9 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -181,7 +181,7 @@ EXTRA_DIST = run-arextract.sh run-arsymtest.sh run-ar.sh \ testfile-nobitsalign.bz2 testfile-nobitsalign.strip.bz2 \ run-strip-reloc.sh hello_i386.ko.bz2 hello_x86_64.ko.bz2 \ hello_ppc64.ko.bz2 hello_s390.ko.bz2 hello_aarch64.ko.bz2 \ - hello_m68k.ko.bz2 \ + hello_m68k.ko.bz2 hello_riscv64.ko.bz2 \ run-unstrip-test.sh run-unstrip-test2.sh \ testfile-info-link.bz2 testfile-info-link.debuginfo.bz2 \ testfile-info-link.stripped.bz2 run-unstrip-test3.sh \ diff --git a/tests/hello_riscv64.ko.bz2 b/tests/hello_riscv64.ko.bz2 Binary files differnew file mode 100644 index 00000000..355a5122 --- /dev/null +++ b/tests/hello_riscv64.ko.bz2 diff --git a/tests/run-strip-reloc.sh b/tests/run-strip-reloc.sh index e587eab3..b1c85345 100755 --- a/tests/run-strip-reloc.sh +++ b/tests/run-strip-reloc.sh @@ -18,7 +18,7 @@ . $srcdir/test-subr.sh testfiles hello_i386.ko hello_x86_64.ko hello_ppc64.ko hello_s390.ko \ - hello_aarch64.ko hello_m68k.ko + hello_aarch64.ko hello_m68k.ko hello_riscv64.ko tempfiles readelf.out readelf.out1 readelf.out2 tempfiles out.stripped1 out.debug1 out.stripped2 out.debug2 @@ -103,6 +103,7 @@ runtest hello_ppc64.ko 1 runtest hello_s390.ko 1 runtest hello_aarch64.ko 1 runtest hello_m68k.ko 1 +runtest hello_riscv64.ko 1 # self test, shouldn't impact non-ET_REL files at all. runtest ${abs_top_builddir}/src/strip 0 |