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Diffstat (limited to 'libc/sysdeps/powerpc/bits/fenv.h')
-rw-r--r--libc/sysdeps/powerpc/bits/fenv.h8
1 files changed, 1 insertions, 7 deletions
diff --git a/libc/sysdeps/powerpc/bits/fenv.h b/libc/sysdeps/powerpc/bits/fenv.h
index 122edd3dc..f72e1cc8b 100644
--- a/libc/sysdeps/powerpc/bits/fenv.h
+++ b/libc/sysdeps/powerpc/bits/fenv.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 1997-2013 Free Software Foundation, Inc.
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
@@ -153,15 +153,12 @@ extern const fenv_t __fe_enabled_env;
extern const fenv_t __fe_nonieee_env;
# define FE_NONIEEE_ENV (&__fe_nonieee_env)
-__BEGIN_DECLS
-
/* Floating-point environment with all exceptions enabled. Note that
just evaluating this value does not change the processor exception mode.
Passing this mask to fesetenv will result in a prctl syscall to change
the MSR FE0/FE1 bits to "Precise Mode". On some processors this will
result in slower floating point execution. This will last until an
fenv or exception mask is installed that disables all FP exceptions. */
-extern const fenv_t *__fe_nomask_env (void);
# define FE_NOMASK_ENV FE_ENABLED_ENV
/* Floating-point environment with all exceptions disabled. Note that
@@ -169,9 +166,6 @@ extern const fenv_t *__fe_nomask_env (void);
Passing this mask to fesetenv will result in a prctl syscall to change
the MSR FE0/FE1 bits to "Ignore Exceptions Mode". On most processors
this allows the fastest possible floating point execution.*/
-extern const fenv_t *__fe_mask_env (void);
# define FE_MASK_ENV FE_DFL_ENV
-__END_DECLS
-
#endif