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| author | Alex Deucher <alexander.deucher@amd.com> | 2016-02-03 18:55:20 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-02-04 12:24:15 -0500 |
| commit | 35c35ea66d7940e78cf375e569e659f66e9fb69d (patch) | |
| tree | 57dd5fd9afd9f224b28224754f7e2344912e44a5 | |
| parent | 0edc442560c792f9dc1acdc51c0c1a3b586f38d9 (diff) | |
| download | drm-35c35ea66d7940e78cf375e569e659f66e9fb69d.tar.gz | |
tests/amdgpu: make amdgpu_command_submission_sdma_copy_linear generic
So it can be shared for CP tests.
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | tests/amdgpu/basic_tests.c | 27 |
1 files changed, 17 insertions, 10 deletions
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index a1161541..5a02ab5a 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -51,6 +51,7 @@ static void amdgpu_semaphore_test(void); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type); CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, @@ -949,7 +950,7 @@ static void amdgpu_command_submission_sdma_const_fill(void) amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_DMA); } -static void amdgpu_command_submission_sdma_copy_linear(void) +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type) { const int sdma_write_length = 1024; const int pm4_dw = 256; @@ -1014,17 +1015,18 @@ static void amdgpu_command_submission_sdma_copy_linear(void) /* fullfill PM4: test DMA copy linear */ i = j = 0; - pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); - pm4[i++] = sdma_write_length; - pm4[i++] = 0; - pm4[i++] = 0xffffffff & bo1_mc; - pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; - pm4[i++] = 0xffffffff & bo2_mc; - pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; - + if (ip_type == AMDGPU_HW_IP_DMA) { + pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); + pm4[i++] = sdma_write_length; + pm4[i++] = 0; + pm4[i++] = 0xffffffff & bo1_mc; + pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; + pm4[i++] = 0xffffffff & bo2_mc; + pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; + } amdgpu_test_exec_cs_helper(context_handle, - AMDGPU_HW_IP_DMA, 0, + ip_type, 0, i, pm4, 2, resources, ib_info, ibs_request); @@ -1055,6 +1057,11 @@ static void amdgpu_command_submission_sdma_copy_linear(void) CU_ASSERT_EQUAL(r, 0); } +static void amdgpu_command_submission_sdma_copy_linear(void) +{ + amdgpu_command_submission_copy_linear_helper(AMDGPU_HW_IP_DMA); +} + static void amdgpu_command_submission_sdma(void) { amdgpu_command_submission_sdma_write_linear(); |