Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add 32-bit Altivec implementation of Simon128 | Jeffrey Walton | 2020-04-08 | 1 | -23/+23 |
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* | Report Altivec on PowerPC | Jeffrey Walton | 2020-04-05 | 1 | -8/+0 |
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* | Use Altivec for Simon64 | Jeffrey Walton | 2020-04-05 | 1 | -17/+3 |
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* | Pre-splat SIMON and SPECK keys when appropriate for Altivec (PR #910) | Jeffrey Walton | 2019-10-28 | 1 | -3/+19 |
| | | | SIMON and SPECK keys can be pre-splatted in the forward direction when Altivec instructions will be used. Pre-splatting does not work for the reverse transformation. It breaks modes like CBC, so the speed-up is only applied to the forward transformation. | ||||
* | Enable Power7 for Simon and Speck (PR #909) | Jeffrey Walton | 2019-10-27 | 1 | -14/+70 |
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* | Remove double semicolons after sed'ing defines | Jeffrey Walton | 2019-10-03 | 1 | -6/+6 |
| | | | | Also see https://github.com/weidai11/cryptopp/issues/889 | ||||
* | Use PowerPC unaligned loads and stores with Power8 (GH #825, PR #826) | Jeffrey Walton | 2019-04-27 | 1 | -3/+3 |
| | | | Use PowerPC unaligned loads and stores with Power8. Formerly we were using Power7 as the floor because the IBM POWER Architecture manuals said unaligned loads and stores were available. However, some compilers generate bad code for unaligned loads and stores using `-march=power7`, so bump to a known good. | ||||
* | Cleanup debug information from SIMON source files | Jeffrey Walton | 2018-11-21 | 1 | -8/+0 |
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* | Fix SIMON64 and SPECK64 providers | Jeffrey Walton | 2018-11-12 | 1 | -0/+4 |
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* | Port SIMON64 to Altivec | Jeffrey Walton | 2018-11-12 | 1 | -12/+26 |
| | | | | SIMON64 runs about 4x faster than C++ for POWER4 and friends. If POWER7 is available it goes back to full speed due to efficient unaligned loads | ||||
* | Clear conversion wanrings under MSVC | Jeffrey Walton | 2018-08-20 | 1 | -2/+5 |
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* | Fix AlgorithmProvider for SIMON and SPECK on Solaris | Jeffrey Walton | 2018-08-17 | 1 | -10/+14 |
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* | Move SIMON-64 and SPECK-64 to Power7 minimum | Jeffrey Walton | 2018-08-14 | 1 | -12/+14 |
| | | | | SIMON-64 and SPECK-64 don't use 64-bit type so they can run on Power7. We may be able to drop to Power4, but we need to test the effects of Loads and Stores without vec_vxs_ld and vec_vsx_st | ||||
* | Add POWER8 SIMON-64 implementation | Jeffrey Walton | 2018-08-14 | 1 | -0/+20 |
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* | Add POWER8 SIMON-128 implementation | Jeffrey Walton | 2018-08-12 | 1 | -0/+22 |
| | | | | Performance went from about 30 to 40 cpb to 5.5 to 9 cpb, depending on endian-ness | ||||
* | Add algorithm provider member function to Algorithm class | Jeffrey Walton | 2018-07-06 | 1 | -0/+26 |
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* | Use default alignment for GetBlock | Jeffrey Walton | 2018-06-24 | 1 | -10/+10 |
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* | Allow user to set -DCRYPTOPP_ARM_NEON_AVAILABLE=0 (#595) | Fabrice Fontaine | 2018-03-05 | 1 | -6/+6 |
| | | | | | | | Disable neon through -DCRYPTOPP_ARM_NEON_AVAILABLE=0, replace "if defined(CRYPTOPP_ARM_NEON_AVAILABLE)" by "if (CRYPTOPP_ARM_NEON_AVAILABLE)" Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com> | ||||
* | Re-add Simon and Speck, enable SSE (GH #585) | Jeffrey Walton | 2018-02-18 | 1 | -0/+463 |
| | | | | This commit re-adds Simon and Speck. The commit includes C++, SSSE3 and SSE4. NEON, Aarch32 and Aarch64 are disabled at the moment. | ||||
* | Remove Simon and Speck ciphers (GH #585) | Jeffrey Walton | 2018-02-14 | 1 | -457/+0 |
| | | | | | | We recently learned our Simon and Speck implementation was wrong. The removal will stop harm until we can loop back and fix the issue. The issue is, the paper, the test vectors and the ref-impl do not align. Each produces slightly different result. We followed the test vectors but they turned out to be wrong for the ciphers. We have one kernel test vector but we don't have a working implementation to observe it to fix our implementation. Ugh... | ||||
* | Clear Coverity issue CID 186337 | Jeffrey Walton | 2017-12-27 | 1 | -1/+1 |
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* | Clear signed/unsigned warnings with GCC and -Wall -Wextra | Jeffrey Walton | 2017-12-26 | 1 | -2/+2 |
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* | Enable NEON/ASIMD for Simon and Speck on Aarch32/Aarch64 (GH #545) | Jeffrey Walton | 2017-12-05 | 1 | -6/+0 |
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* | Add SIMON-64 NEON intrinsics | Jeffrey Walton | 2017-12-05 | 1 | -0/+8 |
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* | Fix incorrect SPECK-128 decrypt when blocks >= 6 | Jeffrey Walton | 2017-12-03 | 1 | -2/+4 |
| | | | | Add defines for CRYPTOPP_SPECK64_ADVANCED_PROCESS_BLOCKS and CRYPTOPP_SPECK128_ADVANCED_PROCESS_BLOCKS | ||||
* | Add SIMON-64 SSE intrinsics | Jeffrey Walton | 2017-12-03 | 1 | -2/+43 |
| | | | | Performance went from about 29 cpb (C++) to about 11.1 cpb (SSE) | ||||
* | Change Doxygen comment style from //! to /// | Jeffrey Walton | 2017-11-29 | 1 | -46/+46 |
| | | | | Also see https://groups.google.com/forum/#!topic/cryptopp-users/A7-Xt5Knlzw | ||||
* | Add NEON and ASIMD intrinsics for SPECK-128 (GH #539) | Jeffrey Walton | 2017-11-27 | 1 | -58/+114 |
| | | | | Performance increased by about 200% on a 980 MHz BananaPi dev-board. Throughput went from about 176.6 cpb to about 60.3 cpb. | ||||
* | Switch to rotlConstant and rotrConstant | Jeffrey Walton | 2017-11-25 | 1 | -16/+16 |
| | | | | This will help Clang and its need for a constexpr | ||||
* | Rework UncheckedSetKey to rearrange words in ExpandKey (GH #539) | Jeffrey Walton | 2017-11-21 | 1 | -20/+7 |
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* | Whitespace and spelling check-in | Jeffrey Walton | 2017-11-21 | 1 | -31/+35 |
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* | Add SIMON-64 and SIMON-128 lightweight block ciphers (GH #539) | Jeffrey Walton | 2017-11-21 | 1 | -0/+365 |