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* Disable X32 inline assembly (GH #686, PR #704)Jeffrey Walton2018-08-181-0/+7
| | | Also use CRYPTOPP_DISABLE_XXX_ASM consistently. The pattern is needed for Clang which still can't compile Intel assembly language. Also see http://llvm.org/bugs/show_bug.cgi?id=24232.
* Rework Makefile and ppc-simd.h for XLC and LLVM front-end changesJeffrey Walton2018-08-051-0/+90
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* Fix SHA-256 on AIX using IBM XL C/C++ and POWER8 cryptoJeffrey Walton2018-07-301-66/+25
| | | | We were using aligned loads of the key table SHA256_K. The key table was declared as 16-byte aligned but it appears the table was not aligned in memory.
* Fix compile for AIX using GCC and IBM XL C/C++Jeffrey Walton2018-07-301-3/+3
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* Add ARMv8.4 cpu feature detection support (GH #685) (#687)Jeffrey Walton2018-07-151-10/+9
| | | | | | | | | This PR adds ARMv8.4 cpu feature detection support. Previously we only needed ARMv8.1 and things were much easier. For example, ARMv8.1 `__ARM_FEATURE_CRYPTO` meant PMULL, AES, SHA-1 and SHA-256 were available. ARMv8.4 `__ARM_FEATURE_CRYPTO` means PMULL, AES, SHA-1, SHA-256, SHA-512, SHA-3, SM3 and SM4 are available. We still use the same pattern as before. We make something available based on compiler version and/or preprocessor macros. But this time around we had to tighten things up a bit to ensure ARMv8.4 did not cross-pollinate down into ARMv8.1. ARMv8.4 is largely untested at the moment. There is no hardware in the field and CI lacks QEMU with the relevant patches/support. We will probably have to revisit some of this stuff in the future. Since this update applies to ARM gadgets we took the time to expand Android and iOS testing on Travis. Travis now tests more platforms, and includes Autotools and CMake builds, too.
* Squash MS LNK4221 and libtool warningsJeffrey Walton2018-07-061-0/+3
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* Remove extra ; from sha-simd.cpp (PR #622)Ilja2018-03-311-1/+1
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* Fix compile on AIX using const pointersJeffrey Walton2018-03-201-4/+4
| | | | Also see the discussion at noloader/POWER8-crypto#2
* Remove non-const cast from POWER8 loads and storesJeffrey Walton2018-03-201-8/+8
| | | | Also see the discussion at https://github.com/noloader/POWER8-crypto/issues/2
* Clear unused variable warningJeffrey Walton2018-03-111-5/+5
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* Switch to 2-mask version of vec_perm for repackJeffrey Walton2018-03-111-8/+4
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* Whitespace check-inJeffrey Walton2018-03-111-2/+1
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* Add VectorLoadMsg and comments (GH #513)Jeffrey Walton2018-03-111-54/+66
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* Add PowerPC Power8 SHA hashing (GH #513)Jeffrey Walton2018-03-101-22/+651
| | | | | | | | | | Perforance increases significantly, but there's still room for improvement. Even OpenSSL's numbers are relatively dull. We expect Power8's SHA-256 to be somewhere between 2 to 8 cpb but we are not hitting them. SHA-256, GCC112 (ppc64-le): C++ 23.43, Power8 13.24 cpb (+ 110 MiB/s) SHA-256, GCC119 (ppc64-be): C++ 10.16, Power8 9.74 cpb (+ 50 MiB/s) SHA-512, GCC112 (ppc64-le): C++ 14.00, Power8 9.25 cpb (+ 150 MiB/s) SHA-512, GCC119 (ppc64-be): C++ 21.05, Power8 6.17 cpb (+ 450 MiB/s)
* Improve logic for <arm_acle.h> include (GH #568)Jeffrey Walton2018-01-201-9/+8
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* Rename ppc-crypto.h to ppc-simd.hJeffrey Walton2017-12-121-1/+1
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* Add Power8 SHA256 and SHA512 support (GH #513)Jeffrey Walton2017-09-221-1/+1
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* Add Power8 SHA256 and SHA512 support (GH #513)Jeffrey Walton2017-09-221-2/+37
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* Add CRYPTOPP_NO_CPU_FEATURE_PROBES (GH #511)Jeffrey Walton2017-09-191-12/+6
| | | | We determine machine capabilities by performing an os/platform *query* first, like getauxv(). If the *query* fails, we move onto a cpu *probe*. The cpu *probe* tries to exeute an instruction and then catches a SIGILL on Linux or the exception EXCEPTION_ILLEGAL_INSTRUCTION on Windows. Some OSes fail to hangle a SIGILL gracefully, like Apple OSes. Apple machines corrupt memory and variables around the probe.
* Fix armeabi and armv7-a for Android (GH #509)Jeffrey Walton2017-09-171-5/+4
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* Add Aarch64 specific defines to Android cross-compileJeffrey Walton2017-09-131-5/+1
| | | | Move <arm_acle.h> logic into "sonfig.h". Detecting when we can/should include <arm_acle.h> is proving to be troublesome
* Update header guards for x86Jeffrey Walton2017-09-121-1/+1
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* Guard <arm_acle.h> include for GCC 4.8Jeffrey Walton2017-09-121-9/+11
| | | | Use system includes for <arm_neon.h> and <arm_acle.h>
* Update commentsJeffrey Walton2017-08-191-0/+7
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* Guard use of SIGILL probes on Apple platformsJeffrey Walton2017-08-171-0/+10
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* Split source files to support Base Implementation + SIMD implementation (GH ↵Jeffrey Walton2017-08-171-0/+961
#461) Split source files to support Base Implementation + SIMD implementation
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