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* Add NVIDIA to CREDITS fileStephen Warren2012-11-291-0/+1
| | | | | | | Change-Id: I612ef274d516073e13e8f52dbf36892e39b36409 Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-on: http://git-master/r/167473 Reviewed-by: Automatic_Commit_Validation_User
* Add top-level .gitignore fileStephen Warren2012-05-231-0/+4
| | | | | | | | | | This prevents "git status" from displaying generated files as new, and hence needing commit. Signed-off-by: Stephen Warren <swarren@nvidia.com> Change-Id: I2c0319183ba3e8d4222f533229474cf6bc0c4049 Reviewed-on: https://gerrit.chromium.org/gerrit/23243 Reviewed-by: Simon Glass <sjg@chromium.org>
* Add PreBctPadBlocks config file optionStephen Warren2012-05-235-5/+28
| | | | | | | | | | | | | | | | | This allows the BCT to be offset within the memory device. This is a port of commit 883a7d0 "Add suport for MMC boot image preparation" from git://gitorious.org/cbootimage/cbootimage.git's trimslice branch. The description there is: Add suport for MMC boot image preparation In order to allow the MBR to be placed at offset 0, BCT is copied to 128K offset. Signed-off-by: Stephen Warren <swarren@nvidia.com> Change-Id: Icde53082f5a4645fefb70deb408a42f9920aed1f Reviewed-on: https://gerrit.chromium.org/gerrit/22935 Reviewed-by: Simon Glass <sjg@chromium.org>
* Use correct limit in find_new_bct_blk()Stephen Warren2012-05-221-1/+1
| | | | | | | | | | The limit is max_bct_search_blks not hash_size. Signed-off-by: Stephen Warren <swarren@nvidia.com> Change-Id: Idbde21ef75f03c2d6d4adbbe62bd623e4ad6b70e Reviewed-on: https://gerrit.chromium.org/gerrit/22934 Reviewed-by: Rhyland Klein <rklein@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Allow OdmData to be specified in the config fileStephen Warren2012-05-212-0/+5
| | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Change-Id: I795131b39de2b09f77d53f2cb03a68d8ef07e2fb Reviewed-on: https://gerrit.chromium.org/gerrit/22933 Reviewed-by: Rhyland Klein <rklein@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* CHROMIUM: cbootimage: Specify the ODM_DATAPeer Chen2012-04-198-28/+41
| | | | | | | | | | | | | | | Add the ODM_DATA argument, u-boot remove the hardcode ODM_DATA, need to use the ODM_DATA from BCT. BUG=None TEST=Done Change-Id: I215ed99f42d02b82450130129badef2b36e6d370 Signed-off-by: Peer Chen <pchen@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/20306 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* CHROMIUM: cbootimage: Add t30 supportPeer Chen2012-04-1026-2479/+4180
| | | | | | | | | | | | | | | Add the t30 chip support to cbootimage file, use can append -t20/-t30 chipname option to support the different chip explicitly, the default is t20 if without this chipname option. BUG=None TEST=Test done locally with .cfg file Change-Id: I0e77f0e0ce2a324bee3287787dcab1c15f3512e4 Reviewed-on: https://gerrit.chromium.org/gerrit/17911 Commit-Ready: Peer Chen <pchen@nvidia.com> Tested-by: Peer Chen <pchen@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* CHROMIUM: cbootimage: Add Bctcopy parameterPeer Chen2011-09-166-27/+37
| | | | | | | | | | | | | | Add the Bctcopy parameter for the bct number in final boot image file to save the NAND space. In .cfg file, add "Bctcopy = n(n >= 1)" to specify the bct count. BUG=chromium-os:17464 TEST=cfg-file Change-Id: I873a000f9165017db9dec25fb7b18cf082e535ba Reviewed-on: http://gerrit.chromium.org/gerrit/5207 Reviewed-by: Anton Staaf <robotboy@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>
* Finish conversion of bct_dump to generate config files that cbootimage can ↵Anton Staaf2011-03-141-89/+112
| | | | | | | | | | | | | | | | | | | parse. This includes code to look up the human readable string names for enum values. The next step will be to convert all of our existing BCT files from binary to config file format. Then the cros_write_firmware and cros_sign_bootstub tools will need to be changed to read the config file instead of a binary BCT. The tegra-bct ebuilds will also need to change to install config files instead of binary BCT files. BUG=chromium-os:11981 TEST=manually dump a working BCT and run cbootimage to reconstruct the BCT. flash and boot with the new BCT. Change-Id: I056735d0638b349580c6993b2976ca55bf4d0ea2 Review URL: http://codereview.chromium.org/6683050
* Expose and augment parser enum and field name tables to bct_dump.Anton Staaf2011-03-144-481/+255
| | | | | | | | | | | | | | | | | | This adds the nvbctlib id value to the field_item struct and makes the parser tables available outside of parse.c. This lets bct_dump use these to pretty print a BCT in a format that the parser can later read back in. BUG=chromium-os:11981 TEST=Sign and boot a U-Boot image on Seaboard using: sudo emerge -av cbootimage USE="recovery flasher" emerge-tegra2_seaboard -av chromeos-u-boot-next cros_write_firmware --board tegra2_seaboard --firmware /build/tegra2_seaboard/u-boot/u-boot-recovery.bin --sign Change-Id: Ibcc8ce5c2c62cbfea8ca2850ddd8122b84c0f78f Review URL: http://codereview.chromium.org/6677007
* Initialize the bad block table when create the bct file from scratch,Anton Staaf2011-03-113-4/+42
| | | | | | | | | | | bct file can't work if miss the bad block table field. Change-Id: Icf4e64d761e6160f022d4934c4670f435a299933 BUG= TEST= Test with config file on Seaboard. Review URL: http://codereview.chromium.org/6676023
* Add support for SDRAM registers printing to bct_dump.Vincent Palatin2011-03-071-0/+235
| | | | | | | | | | | | | | This adds human readable output for RAM controller registers default values stored in a BCT file. BUG=None TEST=bct_dump burn-u-boot/bct/default.bct and check EMC_CFG value. This CL depends on http://codereview.chromium.org/6625006/ Change-Id: I4451d17c144d0273d375e490511e2534accd6de1 Review URL: http://codereview.chromium.org/6626016
* Add the SDRAM parameters support for cbootimage.Peer Chen2011-03-046-0/+904
| | | | | | | | | | Change-Id: I15a6cacbf8b19b16b4bcccd6ea0e2740cacadee3 BUG=None. TEST=Test with config file. Review URL: http://codereview.chromium.org/6625006 Patch from Peer Chen <pchen@nvidia.com>.
* Add the nand device support for cbootimage tool.Peer Chen2011-03-0310-17/+93
| | | | | | | | | | Change-Id: Ic24dd4c971c16d00742d90830be168b41483be7a BUG=None. TEST=Test with the config file. Review URL: http://codereview.chromium.org/6611009 Patch from Peer Chen <pchen@nvidia.com>.
* Add the SDRAM parameter header file.Peer Chen2011-03-022-5/+364
| | | | | | | | | | Change-Id: I9d48b5c9222a50695df00694a97f8c52729657e7 BUG=None. TEST=None. Review URL: http://codereview.chromium.org/6602078 Patch from Peer Chen <pchen@nvidia.com>.
* Add support for flash device parameters printing to bct_dump.Anton Staaf2011-03-021-18/+110
| | | | | | | | | | | | | | | | This adds human readable output for SPI and SDMMC device parameters stored in a BCT file. This includes clock divisors, boot flash type and various flash type specific parameters. BUG=None TEST=bct_dump /build/tegra2_seaboard/u-boot/image.bin Change-Id: I9f233abf53627ddb00159e105cfa3ff01d38ce5c This CL depends on: http://codereview.chromium.org/6579041/ Review URL: http://codereview.chromium.org/6576041
* Fix tab stops to be 8-spaces instead of 4.Anton Staaf2011-03-023-14/+14
| | | | | | | | | Change-Id: If70ee0c550a37ad7401552c231021b966b8e368f BUG=None TEST=None Review URL: http://codereview.chromium.org/6579041
* Add bct_dump tool.Anton Staaf2011-02-242-16/+161
| | | | | | | | | | | | | | This tool dumps a human readable version of the BCT file provided on the command line to stdout. Change-Id: Ic9609b16aee307fd78c2d5d472d8d08072573df6 BUG=chromium-os:11981 TEST=run bct_dump on SPI and NAND BCT files and verify that the expected values are displayed. This CL depends on: http://codereview.chromium.org/6469010/ Review URL: http://codereview.chromium.org/6524004
* Add the device type/parameters support for cbootimage tool.Peer Chen2011-02-2410-64/+797
| | | | | | | | | | | | Add the bct generated function for cbootimage tool. Change-Id: I2ad282d7dbce1d06d54fa3ee2ef5f550598089b0 BUG=None. TEST=Test using the cfg file. Review URL: http://codereview.chromium.org/6579034 Patch from Peer Chen <pchen@nvidia.com>.
* Add initial CREDITS file.Anton Staaf2011-02-171-0/+4
| | | | | | | | | Change-Id: I2eb4291c9844ca78e4cb2a14f64487c528cc4168 BUG=None TEST=None Review URL: http://codereview.chromium.org/6476005
* Factor out the context specific functions into their own file.Anton Staaf2011-02-174-58/+116
| | | | | | | | | | | These will be reused by my BCT display tool. Change-Id: I88d595412ec439a96231b81253eb04ed4bfd377d BUG=chromium-os:10502 TEST=run cbootimage on test config. Review URL: http://codereview.chromium.org/6469010
* Add emacs coding style configuration file.Anton Staaf2011-02-111-0/+10
| | | | | | | | | Change-Id: I49818d167126659c499ec5716bdf841560487826 BUG=None TEST=None Review URL: http://codereview.chromium.org/6478003
* Check return code of fwrite in raw image writing code.Anton Staaf2011-02-101-3/+6
| | | | | | | | | Change-Id: I8c52a205ae1dc559c9f8b41d4d2c50e821b3b05c BUG=None TEST=None Review URL: http://codereview.chromium.org/6368153
* Fix pointer to integer cast warning.Anton Staaf2011-01-281-2/+1
| | | | | | | | | Change-Id: I149b901885ab09260b0d9c7d82f41a41397d4b44 BUG=None TEST=build and observe no compiler warnings. Review URL: http://codereview.chromium.org/6298020
* Remove extra path element.Allen Martin2011-01-2516-0/+0
| | | | | Remove extra path element that came as part of the git I cloned this from.
* tegra tools: add the cbootimage for google requestPeer Chen2011-01-2516-0/+3769
cbootimage is a tool used to combine binary .bct, bootloader and google's component to a spi rom image file. Change-Id: I25b6fee13d7449fc83ec3802b79cbbbcaae54494
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