mb/google/volteer: implement mainboard_get_dram_part_num()

Implements mainboard_get_dram_part_num() to override dram part number
with a part number read from CBI.

BUG=b:146464098
TEST="emerge-volteer coreboot chromeos-bootimage", flash volteer, boot
and log into kernel, execute "mosys memory spd print id" and verify that
the memory part number from the cbi gets displayed properly.

Change-Id: I3a20691f601cb513ee0936c8d141233c3d06db3d
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40472
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

1 files changed, 17 insertions, 1 deletions

diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c
index 3e602e6139..d46b73181a 100644
--- a/src/mainboard/google/volteer/romstage.c
+++ b/src/mainboard/google/volteer/romstage.c
@@ -6,13 +6,15 @@
  */
 
 #include <baseboard/variants.h>
+#include <ec/google/chromeec/ec.h>
+#include <fsp/soc_binding.h>
 #include <gpio.h>
+#include <memory_info.h>
 #include <soc/gpio.h>
 #include <soc/meminit.h>
 #include <soc/romstage.h>
 #include <variant/gpio.h>
 
-#include <fsp/soc_binding.h>
 
 void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
@@ -27,3 +29,17 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 
 	meminit_lpddr4x(mem_cfg, board_cfg, &spd_info, half_populated);
 }
+
+bool mainboard_get_dram_part_num(const char **part_num, size_t *len)
+{
+	static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE];
+
+	if (google_chromeec_cbi_get_dram_part_num(part_num_store,
+			sizeof(part_num_store)) < 0) {
+		printk(BIOS_ERR, "ERROR: Couldn't obtain DRAM part number from CBI\n");
+		return false;
+	}
+	*part_num = part_num_store;
+	*len = strlen(part_num_store);
+	return true;
+}