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* spd: tlkd: support new TLK SMCs for RPMB serviceMustafa Yigit Bilgen2020-03-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to handle following TLK SMCs: {TLK_SET_BL_VERSION, TLK_LOCK_BL_INTERFACE, TLK_BL_RPMB_SERVICE} These SMCs need to be supported in ATF in order to forward them to TLK. Otherwise, these functionalities won't work. Brief: TLK_SET_BL_VERSION: This SMC is issued by the bootloader to supply its version to TLK. TLK can use this to prevent rollback attacks. TLK_LOCK_BL_INTERFACE: This SMC is issued by bootloader before handing off execution to the OS. This allows preventing sensitive SMCs being used by the OS. TLK_BL_RPMB_SERVICE: bootloader issues this SMC to sign or verify RPMB frames. Tested by: Tests TLK can receive the new SMCs issued by bootloader Change-Id: I57c2d189a5f7a77cea26c3f8921866f2a6f0f944 Signed-off-by: Mustafa Yigit Bilgen <mbilgen@nvidia.com>
* tlkd: remove system off/reset handlersVarun Wadekar2020-03-182-26/+2
| | | | | | | | | | TLK does not participate in the system off/reset process and so has no use for the SYSTEM_OFF/RESET notifications. This patch removes the system off/reset handlers as a result. Change-Id: Icf1430b1400cea88000e6d54426eb604a43cbe6c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
* spd: trusty: disable error messages seen during bootVarun Wadekar2020-03-181-2/+2
| | | | | | | | | | | | Platforms that do not support Trusty, usually see error messages from the Trusty SPD, during boot. This can be interpreted as a boot failure. This patch lowers the logging level for those error messages to avoid confusion. Change-Id: I931baa2c6db0de1aee17383039bc29ed229a1f25 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
* Implement SMCCC_ARCH_SOC_ID SMC callManish V Badarkhe2020-03-171-4/+13
| | | | | | | | | | | | | | Implemented SMCCC_ARCH_SOC_ID call in order to get below SOC information: 1. SOC revision 2. SOC version Implementation done using below SMCCC specification document: https://developer.arm.com/docs/den0028/c Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ie0595f1c345a6429a6fb4a7f05534a0ca9c9a48b
* Merge "SPMD: Add support for SPCI_ID_GET" into integrationSandrine Bailleux2020-03-132-0/+39
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| * SPMD: Add support for SPCI_ID_GETMax Shvetsov2020-03-122-0/+39
| | | | | | | | | | | | | | | | | | | | | | This patch introduces the `SPCI_ID_GET` interface which will return the ID of the calling SPCI component. Returns 0 for requests from the non-secure world and the SPCI component ID as specified in the manifest for secure world requests. Change-Id: Icf81eb1d0e1d7d5c521571e04972b6e2d356e0d1 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
* | spd: tlkd: secure timer interrupt handlerVarun Wadekar2020-03-111-1/+88
|/ | | | | | | | | | | | This patch adds an interrupt handler for TLK. On receiving an interrupt, the source of the interrupt is determined and the interrupt is marked complete. The IRQ number is passed to TLK along with a special SMC function ID. TLK issues an SMC to notify completion of the interrupt handler in the S-EL1 world. Change-Id: I76f28cee6537245c5e448d2078f86312219cea1a Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
* SPMD: add command line parameter to run SPM at S-EL2 or S-EL1Max Shvetsov2020-03-031-32/+29
| | | | | | | | | | | Added SPMD_SPM_AT_SEL2 build command line parameter. Set to 1 to run SPM at S-EL2. Set to 0 to run SPM at S-EL1 (pre-v8.4 or S-EL2 is disabled). Removed runtime EL from SPM core manifest. Change-Id: Icb4f5ea4c800f266880db1d410d63fe27a1171c0 Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
* SPMD: smc handler qualify secure origin using booleansOlivier Deprez2020-03-031-34/+27
| | | | | Change-Id: Icc8f73660453a2cbb2241583684b615d5d1af9d4 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
* SPMD: SPMC init, SMC handler cosmetic changesMax Shvetsov2020-03-031-139/+161
| | | | | | Change-Id: I8881d489994aea667e3dd59932ab4123f511d6ba Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
* SPMD: Adds partially supported EL2 registers.Max Shvetsov2020-03-032-11/+11
| | | | | | | | | | | | | | | This patch adds EL2 registers that are supported up to ARMv8.6. ARM_ARCH_MINOR has to specified to enable save/restore routine. Note: Following registers are still not covered in save/restore. * AMEVCNTVOFF0<n>_EL2 * AMEVCNTVOFF1<n>_EL2 * ICH_AP0R<n>_EL2 * ICH_AP1R<n>_EL2 * ICH_LR<n>_EL2 Change-Id: I4813f3243e56e21cb297b31ef549a4b38d4876e1 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
* SPMD: save/restore EL2 system registers.Max Shvetsov2020-03-021-0/+10
| | | | | | | | | | | NOTE: Not all EL-2 system registers are saved/restored. This subset includes registers recognized by ARMv8.0 Change-Id: I9993c7d78d8f5f8e72d1c6c8d6fd871283aa3ce0 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
* Use consistent SMCCC error codeManish V Badarkhe2020-02-201-1/+1
| | | | | | | | Removed duplicate error code present for SMCCC and used proper error code for "SMCCC_ARCH_WORKAROUND_2" call. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I76fc7c88095f78a7e2c3d205838f8eaf3132ed5c
* Merge "coverity: fix MISRA violations" into integrationMark Dykes2020-02-181-2/+2
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| * coverity: fix MISRA violationsZelalem2020-02-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | Fixes for the following MISRA violations: - Missing explicit parentheses on sub-expression - An identifier or macro name beginning with an underscore, shall not be declared - Type mismatch in BL1 SMC handlers and tspd_main.c Change-Id: I7a92abf260da95acb0846b27c2997b59b059efc4 Signed-off-by: Zelalem <zelalem.aweke@arm.com>
* | trusty: generic-arm64-smcall: Support gicr addressArve Hjønnevåg2020-02-122-2/+13
| | | | | | | | | | | | | | | | | | | | Add SMC_GET_GIC_BASE_GICR option to SMC_FC_GET_REG_BASE and SMC_FC64_GET_REG_BASE calls for returning the base address of the gic redistributor added in gic version 3. Bug: 122357256 Change-Id: Ia7c287040656515bab262588163e0c5fc8f13a21 Signed-off-by: Arve Hjønnevåg <arve@android.com>
* | trusty: Allow gic base to be specified with GICD_BASEArve Hjønnevåg2020-02-121-0/+9
| | | | | | | | | | | | | | | | Some platforms define GICD_BASE instead of PLAT_ARM_GICD_BASE but the meaning is the same. Change-Id: I1bb04bb49fdab055b365b1d70a4d48d2058e49df Signed-off-by: Arve Hjønnevåg <arve@android.com>
* | trusty: Allow getting trusty memsize from BL32_MEM_SIZE instead of ↵Arve Hjønnevåg2020-02-121-0/+4
|/ | | | | | | | | | TSP_SEC_MEM_SIZE Some platforms define BL32_MEM_SIZE instead of TSP_SEC_MEM_SIZE, but the meaning is the same. Change-Id: I93d96dca442e653435cae6a165b1955efe2d2b75 Signed-off-by: Arve Hjønnevåg <arve@android.com>
* SPMD: hook SPMD into standard services frameworkAchin Gupta2020-02-101-1/+19
| | | | | | | | | | This patch adds support to initialise the SPM dispatcher as a standard secure service. It also registers a handler for SPCI SMCs exported by the SPM dispatcher. Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: I2183adf826d08ff3fee9aee75f021021162b6477
* SPMD: add SPM dispatcher based upon SPCI Beta 0 specAchin Gupta2020-02-104-0/+659
| | | | | | | | | | | | | | | | This patch adds a rudimentary SPM dispatcher component in EL3. It does the following: - Consumes the TOS_FW_CONFIG to determine properties of the SPM core component - Initialises the SPM core component which resides in the BL32 image - Implements a handler for SPCI calls from either security state. Some basic validation is done for each call but in most cases it is simply forwarded as-is to the "other" security state. Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: I7d116814557f7255f4f4ebb797d1619d4fbab590
* Prevent speculative execution past ERETAnthony Steinhauser2020-01-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though ERET always causes a jump to another address, aarch64 CPUs speculatively execute following instructions as if the ERET instruction was not a jump instruction. The speculative execution does not cross privilege-levels (to the jump target as one would expect), but it continues on the kernel privilege level as if the ERET instruction did not change the control flow - thus execution anything that is accidentally linked after the ERET instruction. Later, the results of this speculative execution are always architecturally discarded, however they can leak data using microarchitectural side channels. This speculative execution is very reliable (seems to be unconditional) and it manages to complete even relatively performance-heavy operations (e.g. multiple dependent fetches from uncached memory). This was fixed in Linux, FreeBSD, OpenBSD and Optee OS: https://github.com/torvalds/linux/commit/679db70801da9fda91d26caf13bf5b5ccc74e8e8 https://github.com/freebsd/freebsd/commit/29fb48ace4186a41c409fde52bcf4216e9e50b61 https://github.com/openbsd/src/commit/3a08873ece1cb28ace89fd65e8f3c1375cc98de2 https://github.com/OP-TEE/optee_os/commit/abfd092aa19f9c0251e3d5551e2d68a9ebcfec8a It is demonstrated in a SafeSide example: https://github.com/google/safeside/blob/master/demos/eret_hvc_smc_wrapper.cc https://github.com/google/safeside/blob/master/kernel_modules/kmod_eret_hvc_smc/eret_hvc_smc_module.c Signed-off-by: Anthony Steinhauser <asteinhauser@google.com> Change-Id: Iead39b0b9fb4b8d8b5609daaa8be81497ba63a0f
* spm-mm: Rename aarch64 assembly filesPaul Beesley2019-12-203-2/+2
| | | | | Change-Id: I2bab67f319758dd033aa689d985227cad796cdea Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm-mm: Rename source filesPaul Beesley2019-12-204-3/+3
| | | | | Change-Id: I851be04fc5de8a95ea11270996f8ca33f0fccadb Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm-mm: Rename spm_shim_private.hPaul Beesley2019-12-203-6/+6
| | | | | Change-Id: I575188885ebed8c5f0682ac6e0e7dd159155727f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm-mm: Rename spm_private.hPaul Beesley2019-12-205-9/+9
| | | | | Change-Id: Ie47009158032c2e8f35febd7bf5458156f334ead Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm-mm: Rename component makefilePaul Beesley2019-12-201-3/+3
| | | | | Change-Id: Idcd2a35cd2b30d77a7ca031f7e0172814bdb8cab Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm-mm: Remove mm_svc.h headerPaul Beesley2019-12-201-1/+0
| | | | | | | | The contents of this header have been merged into the spm_mm_svc.h header file. Change-Id: I01530b2e4ec1b4c091ce339758025e2216e740a4 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm-mm: Refactor spm_svc.h and its contentsPaul Beesley2019-12-203-42/+42
| | | | | Change-Id: I91c192924433226b54d33e57d56d146c1c6df81b Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm-mm: Refactor secure_partition.h and its contentsPaul Beesley2019-12-203-15/+15
| | | | | | | | | | | | | | | | | | | Before adding any new SPM-related components we should first do some cleanup around the existing SPM-MM implementation. The aim is to make sure that any SPM-MM components have names that clearly indicate that they are MM-related. Otherwise, when adding new SPM code, it could quickly become confusing as it would be unclear to which component the code belongs. The secure_partition.h header is a clear example of this, as the name is generic so it could easily apply to any SPM-related code, when it is in fact SPM-MM specific. This patch renames the file and the two structures defined within it, and then modifies any references in files that use the header. Change-Id: I44bd95fab774c358178b3e81262a16da500fda26 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* spm: Remove SPM Alpha 1 prototype and support filesPaul Beesley2019-12-2013-2396/+1
| | | | | | | | | | | | | | | | | | The Secure Partition Manager (SPM) prototype implementation is being removed. This is preparatory work for putting in place a dispatcher component that, in turn, enables partition managers at S-EL2 / S-EL1. This patch removes: - The core service files (std_svc/spm) - The Resource Descriptor headers (include/services) - SPRT protocol support and service definitions - SPCI protocol support and service definitions Change-Id: Iaade6f6422eaf9a71187b1e2a4dffd7fb8766426 Signed-off-by: Paul Beesley <paul.beesley@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
* Remove dependency between SPM_MM and ENABLE_SPM build flagsPaul Beesley2019-12-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two different implementations of Secure Partition management in TF-A. One is based on the "Management Mode" (MM) design, the other is based on the Secure Partition Client Interface (SPCI) specification. Currently there is a dependency between their build flags that shouldn't exist, making further development harder than it should be. This patch removes that dependency, making the two flags function independently. Before: ENABLE_SPM=1 is required for using either implementation. By default, the SPCI-based implementation is enabled and this is overridden if SPM_MM=1. After: ENABLE_SPM=1 enables the SPCI-based implementation. SPM_MM=1 enables the MM-based implementation. The two build flags are mutually exclusive. Note that the name of the ENABLE_SPM flag remains a bit ambiguous - this will be improved in a subsequent patch. For this patch the intention was to leave the name as-is so that it is easier to track the changes that were made. Change-Id: I8e64ee545d811c7000f27e8dc8ebb977d670608a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* Enable -Wshadow alwaysJustin Chadwell2019-11-191-5/+5
| | | | | | | | | | | | | | Variable shadowing is, according to the C standard, permitted and valid behaviour. However, allowing a local variable to take the same name as a global one can cause confusion and can make refactoring and bug hunting more difficult. This patch moves -Wshadow from WARNING2 into the general warning group so it is always used. It also fixes all warnings that this introduces by simply renaming the local variable to a new name Change-Id: I6b71bdce6580c6e58b5e0b41e4704ab0aa38576e Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
* Merge changes from topic "jc/coverity-fixes" into integrationPaul Beesley2019-08-131-0/+2
|\ | | | | | | | | | | | | | | * changes: Fix Coverity #261967, Infinite loop Fix Coverity #343017, Missing unlock Fix Coverity #343008, Side affect in assertion Fix Coverity #342970, Uninitialized scalar variable
| * Fix Coverity #343017, Missing unlockJustin Chadwell2019-08-061-0/+2
| | | | | | | | | | | | | | | | All other returns from this function unlock the responses_lock, so we also should release the lock in this case. Change-Id: Ie2cfa8755723fed79e809f9480190d11f373a217 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
* | spd: opteed: enable NS_TIMER_SWITCHSumit Garg2019-08-051-1/+4
| | | | | | | | | | | | | | | | | | Enable dispatcher to save/restore unbanked timer registers. So that both secure (OP-TEE) and non-secure (Linux) worlds can have independent access control over timer registers. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I4d58d5ff8298587ed478c8433fcbc3aef538d668
* | Switch AARCH32/AARCH64 to __aarch64__Julius Werner2019-08-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner <jwerner@chromium.org>
* | Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__Julius Werner2019-08-015-10/+10
|/ | | | | | | | | | | | | | NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__. All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard. Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
* Remove references to old project name from common filesJohn Tsichritzis2019-07-101-1/+1
| | | | | | | | | | | | | The project has been renamed from "Arm Trusted Firmware (ATF)" to "Trusted Firmware-A (TF-A)" long ago. A few references to the old project name that still remained in various places have now been removed. This change doesn't affect any platform files. Any "ATF" references inside platform files, still remain. Change-Id: Id97895faa5b1845e851d4d50f5750de7a55bf99e Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
* services/spm: Fix service UUID lookupPaul Beesley2019-04-091-1/+1
| | | | | | | | | | | | | | | | | The spm_sp_get_by_uuid() function is used to look up the secure partition that provides a given service. Within this function, memcmp() is used to compare the service UUIDs but it uses the size of the rdsvc->uuid pointer instead of the size of its content (missing dereference). This means that only a partial comparison is performed as UUIDs are 128 bits in length and rdsvc->uuid is a uint32_t typed pointer. Instead, use the size of the array pointed to by the svc_uuid parameter, which will be the full 128 bits, for the comparison. Change-Id: I258fb0cca3bf19f97b8f2a4c133981647cd050e4 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* Makefile: remove extra include paths in INCLUDESAmbroise Vincent2019-04-031-1/+1
| | | | | | | | | | Now it is needed to use the full path of the common header files. Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more information. Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* SPM: Adjust size of virtual address space per partitionAntonio Nino Diaz2019-04-031-2/+56
| | | | | | | | | | | | Rather than using a fixed virtual address space size, read all regions in the resource description of each partition and restrict the virtual address space size to the one the partition actually needs. This also allows SPM to take advantage of the extension ARMv8.4-TTST if the virtual address space size is small enough. Change-Id: I8646aa95e659136b58b44b040364cdee631f7e82 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* SPM: Refactor xlat context creationAntonio Nino Diaz2019-04-034-18/+7
| | | | | | | | | | | | | | | | Right now the virtual address space is fixed to PLAT_VIRT_ADDR_SPACE_SIZE, so all base translation tables are the same size and need the same alignment. The current code allocates the exact space needed by this initial table. However, a following patch is going to allow each partition to choose the size of its address space based on the memory regions defined in their resource description, so it isn't possible to determine this at build time. As this optimization no longer applies, it has to be removed. Change-Id: Ia8d19f4981e1017e4ffe0ba136de73d701044cb0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* SPM: Move shim layer to TTBR1_EL1Antonio Nino Diaz2019-04-035-14/+65
| | | | | | | | | | | | This gives each Secure Partition complete freedom on its address space. Previously, the memory used by the exception vectors was reserved and couldn't be used. Also, it always had to be mapped, forcing SPM to generate translation tables that included the exception vectors as well as the Partition memory regions. With this change, partitions can reduce their address space size easily. Change-Id: I67fb5e9bdf2870b73347f23bff702fab0a8f8711 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* SPM: Ignore empty regions in resource descriptionAntonio Nino Diaz2019-04-021-1/+6
| | | | | | | | Instead of letting the code run until another error is reached, return early. Change-Id: I6277a8c65101d3e39b0540099c2a3063584a7dbd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* SPM: Create SPCI auxiliary functionAmbroise Vincent2019-04-011-56/+39
| | | | | | | Fix variable shadowing warnings and prevent code duplication. Change-Id: Idb29cc95d6b6943bc012d7bd430afa0e4a7cbf8c Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* Remove several warnings reported with W=2Ambroise Vincent2019-04-011-1/+1
| | | | | | | | | | | | | Improved support for W=2 compilation flag by solving some nested-extern and sign-compare warnings. The libraries are compiling with warnings (which turn into errors with the Werror flag). Outside of libraries, some warnings cannot be fixed. Change-Id: I06b1923857f2a6a50e93d62d0274915b268cef05 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* Remove several warnings reported with W=1Ambroise Vincent2019-04-012-2/+5
| | | | | | | | | | | | | | Improved support for W=1 compilation flag by solving missing-prototypes and old-style-definition warnings. The libraries are compiling with warnings (which turn into errors with the Werror flag). Outside of libraries, some warnings cannot be fixed without heavy structural changes. Change-Id: I1668cf99123ac4195c2a6a1d48945f7a64c67f16 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* Ensure proper ID register is checked for feature detectionDimitris Papastamos2019-03-041-2/+2
| | | | | | | | | | SSBS support is determined by checking ID_AA64PFR1_EL1 and not ID_AA64PFR0_EL1. Fixes ARM-Software/tf-issues#679 Change-Id: I8ecba13b850995ec6a6ede3c2a1e02e69a3a95db Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
* trusty: Include file with GIC definitionsAntonio Nino Diaz2019-02-271-1/+2
| | | | | | | | The GIC definitions used in this file have to be provided by the platform but platform_def.h wasn't included. Change-Id: I858cdf7e60c50577c8e798d64ec2cbc4f067f33b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1824 from antonio-nino-diaz-arm/an/move-dyn-xlatAntonio Niño Díaz2019-02-181-2/+0
|\ | | | | fvp: trusty: Move dynamic xlat enable to platform
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