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* Call reset handlers upon BL3-1 entry.Yatharth Kochar2015-01-261-2/+11
* Demonstrate model for routing IRQs to EL3Soby Mathew2015-01-264-16/+171
* Verify capabilities before handling PSCI callsSoby Mathew2015-01-265-40/+29
* Implement PSCI_FEATURES APISoby Mathew2015-01-264-0/+86
* Rework the PSCI migrate APIsSoby Mathew2015-01-263-10/+66
* Return success if an interrupt is seen during PSCI CPU_SUSPENDSoby Mathew2015-01-233-10/+22
* Validate power_state and entrypoint when executing PSCI callsSoby Mathew2015-01-236-194/+160
* Save 'power_state' early in PSCI CPU_SUSPEND callSoby Mathew2015-01-235-36/+22
* Rework internal API to save non-secure entry point infoSoby Mathew2015-01-235-98/+67
* PSCI: Check early for invalid CPU state during CPU ONSoby Mathew2015-01-231-14/+11
* Remove `ns_entrypoint` and `mpidr` from parameters in pm_opsSoby Mathew2015-01-233-40/+22
* Remove coherent memory from the BL memory mapsSoby Mathew2015-01-222-5/+23
* Move bakery algorithm implementation out of coherent memorySoby Mathew2015-01-223-9/+24
* Invalidate the dcache after initializing cpu-opsSoby Mathew2015-01-131-1/+2
* Fix CPU_SUSPEND when invoked with affinity level higher than get_max_afflvl()Soby Mathew2014-12-123-2/+11
* Fix the array size of mpidr_aff_map_nodes_t.Soby Mathew2014-12-041-1/+1
* Add opteed based on tspdJens Wiklander2014-09-168-0/+1324
* Add CPU specific power management operationsSoby Mathew2014-08-202-30/+10
* Miscellaneous PSCI code cleanupsAchin Gupta2014-08-197-172/+113
* Add APIs to preserve highest affinity level in OFF stateAchin Gupta2014-08-196-14/+165
* Rework state management in the PSCI implementationAchin Gupta2014-08-195-40/+62
* Add PSCI service specific per-CPU dataAchin Gupta2014-08-195-79/+59
* Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIsJuan Castillo2014-08-196-8/+173
* Merge pull request #189 from achingupta/ag/tf-issues#153Dan Handley2014-08-191-0/+7
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| * Unmask SError interrupt and clear SCR_EL3.EA bitAchin Gupta2014-08-151-0/+7
* | Clarify platform porting interface to TSPDan Handley2014-08-191-1/+1
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* Merge pull request #178 from soby-mathew/sm/optmize_el3_contextdanh-arm2014-08-041-8/+6
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| * Optimize EL3 register state stored in cpu_context structureSoby Mathew2014-07-311-8/+6
* | Support asynchronous method for BL3-2 initializationVikram Kanigiri2014-08-011-26/+52
* | Rework the TSPD setup codeVikram Kanigiri2014-08-014-35/+52
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* Merge pull request #177 from jcastillo-arm/jc/tf-issues/096danh-arm2014-07-281-0/+2
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| * Rework incorrect use of assert() and panic() in codebaseJuan Castillo2014-07-281-0/+2
* | Simplify management of SCTLR_EL3 and SCTLR_EL1Achin Gupta2014-07-281-0/+19
* | Remove the concept of coherent stacksAchin Gupta2014-07-284-14/+0
* | Remove coherent stack usage from the warm boot pathAchin Gupta2014-07-197-103/+219
* | Make enablement of the MMU more flexibleAchin Gupta2014-07-191-1/+1
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* Remove current CPU mpidr from PSCI common codeAndrew Thoelke2014-06-257-111/+61
* Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2danh-arm2014-06-241-1/+1
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| * Remove all checkpatch errors from codebaseJuan Castillo2014-06-241-1/+1
* | Merge pull request #147 from athoelke/at/remove-bakery-mpidrdanh-arm2014-06-241-2/+2
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| * Remove calling CPU mpidr from bakery lock APIAndrew Thoelke2014-06-231-2/+2
* | Merge pull request #145 from athoelke/at/psci-memory-optimization-v2danh-arm2014-06-234-40/+15
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| * | Correctly dimension the PSCI aff_map_node arrayAndrew Thoelke2014-06-231-0/+8
| * | Eliminate psci_suspend_context arrayAndrew Thoelke2014-06-234-40/+7
* | | Merge pull request #144 from athoelke/at/init-context-v2danh-arm2014-06-238-205/+73
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| * | Initialise CPU contexts from entry_point_infoAndrew Thoelke2014-06-238-205/+73
* | | Merge pull request #140 from athoelke/at/psci_smc_handlerdanh-arm2014-06-231-44/+62
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| * | PSCI SMC handler improvementsAndrew Thoelke2014-06-101-44/+62
* | | Remove early_exceptions from BL3-1Andrew Thoelke2014-06-173-23/+2
* | | Per-cpu data cache restructuringAndrew Thoelke2014-06-163-2/+6
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