diff options
Diffstat (limited to 'plat/xilinx')
-rw-r--r-- | plat/xilinx/common/include/plat_startup.h | 2 | ||||
-rw-r--r-- | plat/xilinx/common/plat_startup.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal/aarch64/versal_common.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/aarch64/versal_net_common.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/aarch64/versal_net_helpers.S | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/bl31_versal_net_setup.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/include/plat_ipi.h | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/include/plat_pm_common.h | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/include/versal_net_def.h | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/plat_psci_pm.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/plat_topology.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/sip_svc_setup.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/versal_net_gicv3.c | 2 | ||||
-rw-r--r-- | plat/xilinx/versal_net/versal_net_ipi.c | 4 | ||||
-rw-r--r-- | plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c | 2 | ||||
-rw-r--r-- | plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c | 2 | ||||
-rw-r--r-- | plat/xilinx/zynqmp/tsp/tsp_plat_setup.c | 2 |
17 files changed, 18 insertions, 18 deletions
diff --git a/plat/xilinx/common/include/plat_startup.h b/plat/xilinx/common/include/plat_startup.h index ae9d52aca..ed3946f83 100644 --- a/plat/xilinx/common/include/plat_startup.h +++ b/plat/xilinx/common/include/plat_startup.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. - * Copyright (C) 2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/common/plat_startup.c b/plat/xilinx/common/plat_startup.c index 6a83e9e3f..539aba2a9 100644 --- a/plat/xilinx/common/plat_startup.c +++ b/plat/xilinx/common/plat_startup.c @@ -135,7 +135,7 @@ static int32_t get_fsbl_estate(const struct xfsbl_partition *partition) * @bl33: BL33 image info structure * atf_handoff_addr: ATF handoff address * - * Process the handoff paramters from the FSBL and populate the BL32 and BL33 + * Process the handoff parameters from the FSBL and populate the BL32 and BL33 * image info structures accordingly. * * Return: Return the status of the handoff. The value will be from the diff --git a/plat/xilinx/versal/aarch64/versal_common.c b/plat/xilinx/versal/aarch64/versal_common.c index 0c8ee1e07..88da2795b 100644 --- a/plat/xilinx/versal/aarch64/versal_common.c +++ b/plat/xilinx/versal/aarch64/versal_common.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved. - * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/aarch64/versal_net_common.c b/plat/xilinx/versal_net/aarch64/versal_net_common.c index 253c38269..1a57330a3 100644 --- a/plat/xilinx/versal_net/aarch64/versal_net_common.c +++ b/plat/xilinx/versal_net/aarch64/versal_net_common.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2021-2022, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/aarch64/versal_net_helpers.S b/plat/xilinx/versal_net/aarch64/versal_net_helpers.S index bbd937b88..e1e2317e6 100644 --- a/plat/xilinx/versal_net/aarch64/versal_net_helpers.S +++ b/plat/xilinx/versal_net/aarch64/versal_net_helpers.S @@ -1,7 +1,7 @@ /* * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/bl31_versal_net_setup.c b/plat/xilinx/versal_net/bl31_versal_net_setup.c index 48be08143..ae9dfe8d5 100644 --- a/plat/xilinx/versal_net/bl31_versal_net_setup.c +++ b/plat/xilinx/versal_net/bl31_versal_net_setup.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/include/plat_ipi.h b/plat/xilinx/versal_net/include/plat_ipi.h index 5ac611c47..30c51b55b 100644 --- a/plat/xilinx/versal_net/include/plat_ipi.h +++ b/plat/xilinx/versal_net/include/plat_ipi.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/include/plat_pm_common.h b/plat/xilinx/versal_net/include/plat_pm_common.h index ad7b40f6d..6485df74b 100644 --- a/plat/xilinx/versal_net/include/plat_pm_common.h +++ b/plat/xilinx/versal_net/include/plat_pm_common.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/include/versal_net_def.h b/plat/xilinx/versal_net/include/versal_net_def.h index ec36e55c2..8fb71f99f 100644 --- a/plat/xilinx/versal_net/include/versal_net_def.h +++ b/plat/xilinx/versal_net/include/versal_net_def.h @@ -1,7 +1,7 @@ /* * Copyright (c) 2022, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/plat_psci_pm.c b/plat/xilinx/versal_net/plat_psci_pm.c index 9d401a507..d39fc2e8e 100644 --- a/plat/xilinx/versal_net/plat_psci_pm.c +++ b/plat/xilinx/versal_net/plat_psci_pm.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/plat_topology.c b/plat/xilinx/versal_net/plat_topology.c index c74faf2d9..ee756c432 100644 --- a/plat/xilinx/versal_net/plat_topology.c +++ b/plat/xilinx/versal_net/plat_topology.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/sip_svc_setup.c b/plat/xilinx/versal_net/sip_svc_setup.c index cc8306e7d..f6240f334 100644 --- a/plat/xilinx/versal_net/sip_svc_setup.c +++ b/plat/xilinx/versal_net/sip_svc_setup.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/versal_net_gicv3.c b/plat/xilinx/versal_net/versal_net_gicv3.c index e7d8e75c7..2fdef12e8 100644 --- a/plat/xilinx/versal_net/versal_net_gicv3.c +++ b/plat/xilinx/versal_net/versal_net_gicv3.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/versal_net/versal_net_ipi.c b/plat/xilinx/versal_net/versal_net_ipi.c index 26ded890e..cf897e313 100644 --- a/plat/xilinx/versal_net/versal_net_ipi.c +++ b/plat/xilinx/versal_net/versal_net_ipi.c @@ -1,6 +1,6 @@ /* - * Copyright (C) 2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022, Xilinx, Inc. All rights reserved. + * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c index fb7b00924..85e146448 100644 --- a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c +++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c @@ -635,7 +635,7 @@ enum pm_ret_status pm_get_chipid(uint32_t *value) * pm_secure_rsaaes() - Load the secure images. * * This function provides access to the xilsecure library to load - * the authenticated, encrypted, and authenicated/encrypted images. + * the authenticated, encrypted, and authenticated/encrypted images. * * address_low: lower 32-bit Linear memory space address * diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c index c0c5d1497..7b1544391 100644 --- a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c +++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c @@ -99,7 +99,7 @@ static void trigger_wdt_restart(void) * for warm restart. * * In presence of non-secure software layers (EL1/2) sets the interrupt - * at registered entrance in GIC and informs that PMU responsed or demands + * at registered entrance in GIC and informs that PMU responded or demands * action. */ static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle, diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c index b51369a02..eaecb899e 100644 --- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c +++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c @@ -43,7 +43,7 @@ void tsp_platform_setup(void) /******************************************************************************* * Perform the very early platform specific architectural setup here. At the - * moment this is only intializes the MMU + * moment this is only initializes the MMU ******************************************************************************/ void tsp_plat_arch_setup(void) { |