4 files changed, 11 insertions, 5 deletions
diff --git a/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h b/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h
index 84100245b..f6d41d786 100644
--- a/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h
+++ b/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h
@@ -9,7 +9,7 @@
 */
 #ifndef _CC_PAL_TYPES_PLAT_H
 #define _CC_PAL_TYPES_PLAT_H
-/* Host specific types for standard (ISO-C99) compilant platforms */
+/* Host specific types for standard (ISO-C99) compliant platforms */
 
 #include <stddef.h>
 #include <stdint.h>
diff --git a/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h b/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h
index 984847217..0c102a092 100644
--- a/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h
+++ b/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h
@@ -9,7 +9,7 @@
 */
 #ifndef _CC_PAL_TYPES_PLAT_H
 #define _CC_PAL_TYPES_PLAT_H
-/* Host specific types for standard (ISO-C99) compilant platforms */
+/* Host specific types for standard (ISO-C99) compliant platforms */
 
 #include <stddef.h>
 #include <stdint.h>
diff --git a/include/drivers/arm/gic600ae_fmu.h b/include/drivers/arm/gic600ae_fmu.h
index 88b87b920..d2a92ddfd 100644
--- a/include/drivers/arm/gic600ae_fmu.h
+++ b/include/drivers/arm/gic600ae_fmu.h
@@ -85,7 +85,7 @@
 #define FMU_BLK_PPI31		U(43)
 #define FMU_BLK_PRESENT_MASK	U(0xFFFFFFFFFFF)
 
-/* Safety Mechamism limit */
+/* Safety Mechanism limit */
 #define FMU_SMID_GICD_MAX	U(33)
 #define FMU_SMID_PPI_MAX	U(12)
 #define FMU_SMID_ITS_MAX	U(14)
diff --git a/include/drivers/arm/sbsa.h b/include/drivers/arm/sbsa.h
index 9403634f7..4ca71942e 100644
--- a/include/drivers/arm/sbsa.h
+++ b/include/drivers/arm/sbsa.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, ARM Limited. All rights reserved.
+ * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -9,7 +9,12 @@
 
 #include <stdint.h>
 
-/* Register Offsets */
+/* SBSA Secure Watchdog Register Offsets */
+/* Refresh frame */
+#define SBSA_WDOG_WRR_OFFSET		UL(0x000)
+#define SBSA_WDOG_WRR_REFRESH		UL(0x1)
+
+/* Control and status frame */
 #define SBSA_WDOG_WCS_OFFSET		UL(0x000)
 #define SBSA_WDOG_WOR_LOW_OFFSET	UL(0x008)
 #define SBSA_WDOG_WOR_HIGH_OFFSET	UL(0x00C)
@@ -20,5 +25,6 @@
 
 void sbsa_wdog_start(uintptr_t base, uint64_t ms);
 void sbsa_wdog_stop(uintptr_t base);
+void sbsa_wdog_refresh(uintptr_t refresh_base);
 
 #endif /* SBSA_H */