diff options
Diffstat (limited to 'include/arch')
-rw-r--r-- | include/arch/aarch32/arch.h | 6 | ||||
-rw-r--r-- | include/arch/aarch64/arch.h | 5 | ||||
-rw-r--r-- | include/arch/aarch64/arch_features.h | 22 | ||||
-rw-r--r-- | include/arch/aarch64/arch_helpers.h | 4 |
4 files changed, 27 insertions, 10 deletions
diff --git a/include/arch/aarch32/arch.h b/include/arch/aarch32/arch.h index 8678bf3d8..227f05862 100644 --- a/include/arch/aarch32/arch.h +++ b/include/arch/aarch32/arch.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -16,8 +16,10 @@ #define MIDR_IMPL_SHIFT U(24) #define MIDR_VAR_SHIFT U(20) #define MIDR_VAR_BITS U(4) +#define MIDR_VAR_MASK U(0xf) #define MIDR_REV_SHIFT U(0) #define MIDR_REV_BITS U(4) +#define MIDR_REV_MASK U(0xf) #define MIDR_PN_MASK U(0xfff) #define MIDR_PN_SHIFT U(4) @@ -264,7 +266,7 @@ #define TCP10_BIT (U(1) << 10) #define HCPTR_RESET_VAL HCPTR_RES1 -/* VTTBR defintions */ +/* VTTBR definitions */ #define VTTBR_RESET_VAL ULL(0x0) #define VTTBR_VMID_MASK ULL(0xff) #define VTTBR_VMID_SHIFT U(48) diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h index ac5eae249..003889346 100644 --- a/include/arch/aarch64/arch.h +++ b/include/arch/aarch64/arch.h @@ -393,6 +393,9 @@ #define ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED ULL(0x1) #define ID_AA64PFR1_EL1_RNG_TRAP_NOT_SUPPORTED ULL(0x0) +#define VDISR_EL2 S3_4_C12_C1_1 +#define VSESR_EL2 S3_4_C5_C2_3 + /* Memory Tagging Extension is not implemented */ #define MTE_UNIMPLEMENTED U(0) /* FEAT_MTE: MTE instructions accessible at EL0 are implemented */ @@ -752,7 +755,7 @@ #define HI_VECTOR_BASE U(0xFFFF0000) /* - * TCR defintions + * TCR definitions */ #define TCR_EL3_RES1 ((ULL(1) << 31) | (ULL(1) << 23)) #define TCR_EL2_RES1 ((ULL(1) << 31) | (ULL(1) << 23)) diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h index a0141defa..d6f12f3f2 100644 --- a/include/arch/aarch64/arch_features.h +++ b/include/arch/aarch64/arch_features.h @@ -499,14 +499,22 @@ static inline bool is_feat_sve_supported(void) return read_feat_sve_id_field() >= ID_AA64PFR0_SVE_SUPPORTED; } -/******************************************************************************* - * Function to identify the presence of FEAT_RAS (Reliability,Availability, - * and Serviceability Extension) - ******************************************************************************/ -static inline bool is_armv8_2_feat_ras_present(void) +static unsigned int read_feat_ras_id_field(void) +{ + return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_RAS); +} + +static inline bool is_feat_ras_supported(void) { - return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) & - ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED); + if (ENABLE_FEAT_RAS == FEAT_STATE_DISABLED) { + return false; + } + + if (ENABLE_FEAT_RAS == FEAT_STATE_ALWAYS) { + return true; + } + + return read_feat_ras_id_field() != 0U; } static unsigned int read_feat_dit_id_field(void) diff --git a/include/arch/aarch64/arch_helpers.h b/include/arch/aarch64/arch_helpers.h index 1b4bc1113..5b3d4c26f 100644 --- a/include/arch/aarch64/arch_helpers.h +++ b/include/arch/aarch64/arch_helpers.h @@ -549,6 +549,10 @@ DEFINE_RENAME_SYSREG_RW_FUNCS(ttbr1_el2, TTBR1_EL2) /* Armv8.2 ID Registers */ DEFINE_RENAME_IDREG_READ_FUNC(id_aa64mmfr2_el1, ID_AA64MMFR2_EL1) +/* Armv8.2 RAS Registers */ +DEFINE_RENAME_SYSREG_RW_FUNCS(vdisr_el2, VDISR_EL2) +DEFINE_RENAME_SYSREG_RW_FUNCS(vsesr_el2, VSESR_EL2) + /* Armv8.2 MPAM Registers */ DEFINE_RENAME_SYSREG_READ_FUNC(mpamidr_el1, MPAMIDR_EL1) DEFINE_RENAME_SYSREG_RW_FUNCS(mpam3_el3, MPAM3_EL3) |