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authorAndrew Thoelke <andrew.thoelke@arm.com>2014-06-02 12:38:12 +0100
committerAndrew Thoelke <andrew.thoelke@arm.com>2014-06-17 11:20:00 +0100
commitee94cc6fa6dc11229a53c3b66d2ce3487bb3b08f (patch)
tree2d6c57c937294183bd284706aca62d47aa3022f7 /services
parent5e910074245fa180cfbe70d3c8bceeff1eaa026e (diff)
downloadarm-trusted-firmware-ee94cc6fa6dc11229a53c3b66d2ce3487bb3b08f.tar.gz
Remove early_exceptions from BL3-1
The crash reporting support and early initialisation of the cpu_data allow the runtime_exception vectors to be used from the start in BL3-1, removing the need for the additional early_exception vectors and 2KB of code from BL3-1. Change-Id: I5f8997dabbaafd8935a7455910b7db174a25d871
Diffstat (limited to 'services')
-rw-r--r--services/std_svc/psci/psci_afflvl_on.c10
-rw-r--r--services/std_svc/psci/psci_afflvl_suspend.c9
-rw-r--r--services/std_svc/psci/psci_entry.S6
3 files changed, 2 insertions, 23 deletions
diff --git a/services/std_svc/psci/psci_afflvl_on.c b/services/std_svc/psci/psci_afflvl_on.c
index 1c7a87725..e4d8f1f2a 100644
--- a/services/std_svc/psci/psci_afflvl_on.c
+++ b/services/std_svc/psci/psci_afflvl_on.c
@@ -373,16 +373,6 @@ static unsigned int psci_afflvl0_on_finish(unsigned long mpidr,
bl31_arch_setup();
/*
- * Use the more complex exception vectors to enable SPD
- * initialisation. SP_EL3 should point to a 'cpu_context'
- * structure. The calling cpu should have set the
- * context already
- */
- assert(cm_get_context(NON_SECURE));
- cm_set_next_eret_context(NON_SECURE);
- write_vbar_el3((uint64_t) runtime_exceptions);
-
- /*
* Call the cpu on finish handler registered by the Secure Payload
* Dispatcher to let it do any bookeeping. If the handler encounters an
* error, it's expected to assert within
diff --git a/services/std_svc/psci/psci_afflvl_suspend.c b/services/std_svc/psci/psci_afflvl_suspend.c
index 3a1a419a9..993431048 100644
--- a/services/std_svc/psci/psci_afflvl_suspend.c
+++ b/services/std_svc/psci/psci_afflvl_suspend.c
@@ -491,15 +491,6 @@ static unsigned int psci_afflvl0_suspend_finish(unsigned long mpidr,
rc = PSCI_E_SUCCESS;
/*
- * Use the more complex exception vectors to enable SPD
- * initialisation. SP_EL3 should point to a 'cpu_context'
- * structure. The non-secure context should have been
- * set on this cpu prior to suspension.
- */
- cm_set_next_eret_context(NON_SECURE);
- write_vbar_el3((uint64_t) runtime_exceptions);
-
- /*
* Call the cpu suspend finish handler registered by the Secure Payload
* Dispatcher to let it do any bookeeping. If the handler encounters an
* error, it's expected to assert within
diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S
index 037673ddb..5628d7917 100644
--- a/services/std_svc/psci/psci_entry.S
+++ b/services/std_svc/psci/psci_entry.S
@@ -67,12 +67,10 @@ psci_aff_common_finish_entry:
bl init_cpu_data_ptr
/* ---------------------------------------------
- * Exceptions should not occur at this point.
- * Set VBAR in order to handle and report any
- * that do occur
+ * Set the exception vectors
* ---------------------------------------------
*/
- adr x0, early_exceptions
+ adr x0, runtime_exceptions
msr vbar_el3, x0
isb