diff options
author | Soby Mathew <soby.mathew@arm.com> | 2014-08-14 12:49:05 +0100 |
---|---|---|
committer | Dan Handley <dan.handley@arm.com> | 2014-08-20 19:14:31 +0100 |
commit | add403514d0f792b9df3c81006cd9a9395b213f6 (patch) | |
tree | 284f2c6ee8f2f93eb15a4d698ed79d896e1dd3f4 /services | |
parent | 24fb838f965cc1250831cd021d6a18b0d371b853 (diff) | |
download | arm-trusted-firmware-add403514d0f792b9df3c81006cd9a9395b213f6.tar.gz |
Add CPU specific power management operations
This patch adds CPU core and cluster power down sequences to the CPU specific
operations framework introduced in a earlier patch. Cortex-A53, Cortex-A57 and
generic AEM sequences have been added. The latter is suitable for the
Foundation and Base AEM FVPs. A pointer to each CPU's operations structure is
saved in the per-cpu data so that it can be easily accessed during power down
seqeunces.
An optional platform API has been introduced to allow a platform to disable the
Accelerator Coherency Port (ACP) during a cluster power down sequence. The weak
definition of this function (plat_disable_acp()) does not take any action. It
should be overriden with a strong definition if the ACP is present on a
platform.
Change-Id: I8d09bd40d2f528a28d2d3f19b77101178778685d
Diffstat (limited to 'services')
-rw-r--r-- | services/std_svc/psci/psci_entry.S | 6 | ||||
-rw-r--r-- | services/std_svc/psci/psci_helpers.S | 34 |
2 files changed, 10 insertions, 30 deletions
diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S index cc57aa158..814501287 100644 --- a/services/std_svc/psci/psci_entry.S +++ b/services/std_svc/psci/psci_entry.S @@ -78,6 +78,12 @@ psci_aff_common_finish_entry: bl init_cpu_data_ptr /* --------------------------------------------- + * Initialize the cpu_ops pointer. + * --------------------------------------------- + */ + bl init_cpu_ops + + /* --------------------------------------------- * Set the exception vectors * --------------------------------------------- */ diff --git a/services/std_svc/psci/psci_helpers.S b/services/std_svc/psci/psci_helpers.S index 91c31725c..9a51d5c29 100644 --- a/services/std_svc/psci/psci_helpers.S +++ b/services/std_svc/psci/psci_helpers.S @@ -66,15 +66,6 @@ func psci_do_pwrdown_cache_maintenance b.ne 1f /* --------------------------------------------- - * Disable the Data Cache. - * --------------------------------------------- - */ - mrs x1, sctlr_el3 - bic x1, x1, #SCTLR_C_BIT - msr sctlr_el3, x1 - isb - - /* --------------------------------------------- * Determine to how many levels of cache will be * subject to cache maintenance. Affinity level * 0 implies that only the cpu is being powered @@ -87,29 +78,12 @@ func psci_do_pwrdown_cache_maintenance * --------------------------------------------- */ cmp x0, #MPIDR_AFFLVL0 - mov x0, #DCCISW - b.ne flush_caches_to_poc - - /* --------------------------------------------- - * Flush L1 cache to PoU. - * --------------------------------------------- - */ - bl dcsw_op_louis + b.eq do_core_pwr_dwn + bl prepare_cluster_pwr_dwn b do_stack_maintenance - /* --------------------------------------------- - * Flush L1 and L2 caches to PoC. - * --------------------------------------------- - */ -flush_caches_to_poc: - bl dcsw_op_all - - /* --------------------------------------------- - * TODO: Intra-cluster coherency should be - * turned off here once cpu-specific - * abstractions are in place. - * --------------------------------------------- - */ +do_core_pwr_dwn: + bl prepare_core_pwr_dwn /* --------------------------------------------- * Do stack maintenance by flushing the used |