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| author | Yann Gautier <yann.gautier@foss.st.com> | 2021-05-25 18:14:24 +0200 |
|---|---|---|
| committer | Yann Gautier <yann.gautier@foss.st.com> | 2021-06-14 10:05:48 +0200 |
| commit | f1b6b014d79b7522b0494c1595f7cd5900964681 (patch) | |
| tree | a690c1620c675bd09b680929d93b9f1e42b6f1c6 /include/dt-bindings | |
| parent | a57e6e4995b344c5f94c9a5cc0f087421d195e40 (diff) | |
| download | arm-trusted-firmware-f1b6b014d79b7522b0494c1595f7cd5900964681.tar.gz | |
refactor(dt-bindings): align irq bindings with kernel
The arm-gic.h was a concatenation of arm-gic.h and irq.h from Linux.
Just copy the 2 files here. They both have MIT license which is accepted
in TF-A.
With this alignment, a new macro is added (GIC_CPU_MASK_SIMPLE).
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib45174f35f1796ebb7f34af861b59810cfb808b0
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/interrupt-controller/arm-gic.h | 13 | ||||
| -rw-r--r-- | include/dt-bindings/interrupt-controller/irq.h | 23 |
2 files changed, 28 insertions, 8 deletions
diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h index fbe07da98..803cd9cd3 100644 --- a/include/dt-bindings/interrupt-controller/arm-gic.h +++ b/include/dt-bindings/interrupt-controller/arm-gic.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2019-2021, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: MIT * @@ -9,21 +9,18 @@ #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H #define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H +#include <dt-bindings/interrupt-controller/irq.h> + /* interrupt specifier cell 0 */ #define GIC_SPI 0 #define GIC_PPI 1 -#define IRQ_TYPE_NONE 0 -#define IRQ_TYPE_EDGE_RISING 1 -#define IRQ_TYPE_EDGE_FALLING 2 -#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) -#define IRQ_TYPE_LEVEL_HIGH 4 -#define IRQ_TYPE_LEVEL_LOW 8 - /* * Interrupt specifier cell 2. + * The flags in irq.h are valid, plus those below. */ #define GIC_CPU_MASK_RAW(x) ((x) << 8) +#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) #endif diff --git a/include/dt-bindings/interrupt-controller/irq.h b/include/dt-bindings/interrupt-controller/irq.h new file mode 100644 index 000000000..94e7f95e5 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/irq.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: MIT + * + * This header provides constants for most IRQ bindings. + * + * Most IRQ bindings include a flags cell as part of the IRQ specifier. + * In most cases, the format of the flags cell uses the standard values + * defined in this header. + */ + +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H + +#define IRQ_TYPE_NONE 0 +#define IRQ_TYPE_EDGE_RISING 1 +#define IRQ_TYPE_EDGE_FALLING 2 +#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) +#define IRQ_TYPE_LEVEL_HIGH 4 +#define IRQ_TYPE_LEVEL_LOW 8 + +#endif |