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authorRaghu Krishnamurthy <raghu.ncstate@gmail.com>2022-07-25 14:44:33 -0700
committerRaghu Krishnamurthy <raghu.ncstate@gmail.com>2022-08-30 08:29:25 -0700
commit7c2fe62f1347bb94d82e9fdd3bc5eaebedaf0bc7 (patch)
tree64db9c876c12a98c59bc100c0ee68d6d09919d93 /bl31
parent6a5022278b0bda10708534ef5cc6c1b5256081ee (diff)
downloadarm-trusted-firmware-7c2fe62f1347bb94d82e9fdd3bc5eaebedaf0bc7.tar.gz
fix(bl31): allow use of EHF with S-EL2 SPMC
Currently, when SPMC at S-EL2 is used, we cannot use the RAS framework to handle Group 0 interrupts. This is required on platforms where first level of triaging needs to occur at EL3, before forwarding RAS handling to a secure partition running atop an SPMC (hafnium). The RAS framework depends on EHF and EHF registers for Group 0 interrupts to be trapped to EL3 when execution is both in secure world and normal world. However, an FF-A compliant SPMC requires secure interrupts to be trapped by the SPMC when execution is in S-EL0/S-EL1. Consequently, the SPMC (hafnium) is incompatible with EHF, since it is not re-entrant, and a Group 0 interrupt trapped to EL3 when execution is in secure world, cannot be forwarded to an SP running atop SPMC. This patch changes EHF to only register for Group 0 interrupts to be trapped to EL3 when execution is in normal world and also makes it a valid routing model to do so, when EL3_EXCEPTION_HANDLING is set (when enabling the RAS framework). Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com> Change-Id: I72d4cf4d8ecc549a832d1c36055fbe95866747fe
Diffstat (limited to 'bl31')
-rw-r--r--bl31/ehf.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/bl31/ehf.c b/bl31/ehf.c
index 745f165d4..b328380d1 100644
--- a/bl31/ehf.c
+++ b/bl31/ehf.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -475,9 +475,16 @@ void __init ehf_init(void)
assert((exception_data.pri_bits >= 1U) ||
(exception_data.pri_bits < 8U));
- /* Route EL3 interrupts when in Secure and Non-secure. */
+ /* Route EL3 interrupts when in Non-secure. */
set_interrupt_rm_flag(flags, NON_SECURE);
+
+ /*
+ * Route EL3 interrupts when in secure, only when SPMC is not present
+ * in S-EL2.
+ */
+#if !(defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1))
set_interrupt_rm_flag(flags, SECURE);
+#endif /* !(defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1)) */
/* Register handler for EL3 interrupts */
ret = register_interrupt_type_handler(INTR_TYPE_EL3,