summaryrefslogtreecommitdiff
path: root/Makefile
diff options
context:
space:
mode:
authorManish Pandey <manish.pandey2@arm.com>2022-09-27 14:30:34 +0100
committerManish Pandey <manish.pandey2@arm.com>2022-09-28 17:10:57 +0100
commit00e8f79c15d36f65f6c7f127177105e02177cbc0 (patch)
tree06569ac7e9de7f15a77bd4826834b259a422c11a /Makefile
parentd8d0ea9a7fcd5ace63a8c863176d9535adfc581d (diff)
downloadarm-trusted-firmware-00e8f79c15d36f65f6c7f127177105e02177cbc0.tar.gz
fix(ras): trap "RAS error record" accesses only for NS
RAS_TRAP_LOWER_EL_ERR_ACCESS was used to prevent access to RAS error record registers (RAS ERR* & RAS ERX*) from lower EL's in any security state. To give more fine grain control per world basis re-purpose this macro to RAS_TRAP_NS_ERR_REC_ACCESS, which will enable the trap only if Error record registers are accessed from NS. This will also help in future scenarios when RAS handling(in Firmware first handling paradigm)can be offloaded to a secure partition. This is first patch in series to refactor RAS framework in TF-A. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ifa7f60bc8c82c9960adf029001bc36c443016d5d
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile4
1 files changed, 2 insertions, 2 deletions
diff --git a/Makefile b/Makefile
index afa417b60..6d15e27c2 100644
--- a/Makefile
+++ b/Makefile
@@ -1051,7 +1051,7 @@ $(eval $(call assert_booleans,\
ENCRYPT_BL31 \
ENCRYPT_BL32 \
ERRATA_SPECULATIVE_AT \
- RAS_TRAP_LOWER_EL_ERR_ACCESS \
+ RAS_TRAP_NS_ERR_REC_ACCESS \
COT_DESC_IN_DTB \
USE_SP804_TIMER \
PSA_FWU_SUPPORT \
@@ -1191,7 +1191,7 @@ $(eval $(call add_defines,\
BL2_INV_DCACHE \
USE_SPINLOCK_CAS \
ERRATA_SPECULATIVE_AT \
- RAS_TRAP_LOWER_EL_ERR_ACCESS \
+ RAS_TRAP_NS_ERR_REC_ACCESS \
COT_DESC_IN_DTB \
USE_SP804_TIMER \
ENABLE_FEAT_RNG \