diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2020-04-09 10:10:09 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2020-05-05 15:36:51 +0100 |
| commit | 93bb7a0ac35bb1490bac0b0b667f5845f9dbdd3c (patch) | |
| tree | 4d7bb5e155f1d39e4b04008be8c152c587534583 | |
| parent | 7a61114da619f3d0fe0d068f879ad2f7f99ee3c4 (diff) | |
| download | arm-trusted-firmware-93bb7a0ac35bb1490bac0b0b667f5845f9dbdd3c.tar.gz | |
arm_fpga: Use Generic UART
The SCP firmware on the ARM FPGA initialises the UART already. This allows
us to treat the PL011 as an SBSA Generic UART, which does not require
any further setup.
This in particular removes the need for any baudrate and base clock related
settings to be hard coded into the BL31 image.
Change-Id: I16fc943526267356b97166a7068459e06ff77f0f
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| -rw-r--r-- | plat/arm/board/arm_fpga/aarch64/fpga_helpers.S | 2 | ||||
| -rw-r--r-- | plat/arm/board/arm_fpga/fpga_console.c | 4 | ||||
| -rw-r--r-- | plat/arm/board/arm_fpga/fpga_def.h | 6 | ||||
| -rw-r--r-- | plat/arm/board/arm_fpga/include/platform_def.h | 2 | ||||
| -rw-r--r-- | plat/arm/board/arm_fpga/platform.mk | 2 |
5 files changed, 4 insertions, 12 deletions
diff --git a/plat/arm/board/arm_fpga/aarch64/fpga_helpers.S b/plat/arm/board/arm_fpga/aarch64/fpga_helpers.S index f350455d5..aeed3108e 100644 --- a/plat/arm/board/arm_fpga/aarch64/fpga_helpers.S +++ b/plat/arm/board/arm_fpga/aarch64/fpga_helpers.S @@ -108,8 +108,6 @@ endfunc plat_fpga_calc_core_pos func plat_crash_console_init mov_imm x0, PLAT_FPGA_CRASH_UART_BASE - mov_imm x1, PLAT_FPGA_CRASH_UART_CLK_IN_HZ - mov_imm x2, PLAT_FPGA_CONSOLE_BAUDRATE b console_pl011_core_init endfunc plat_crash_console_init diff --git a/plat/arm/board/arm_fpga/fpga_console.c b/plat/arm/board/arm_fpga/fpga_console.c index b4ebf3424..a1fdb7832 100644 --- a/plat/arm/board/arm_fpga/fpga_console.c +++ b/plat/arm/board/arm_fpga/fpga_console.c @@ -13,9 +13,7 @@ static console_t console; void fpga_console_init(void) { - (void)console_pl011_register(PLAT_FPGA_BOOT_UART_BASE, - PLAT_FPGA_BOOT_UART_CLK_IN_HZ, - PLAT_FPGA_CONSOLE_BAUDRATE, + (void)console_pl011_register(PLAT_FPGA_BOOT_UART_BASE, 0, 0, &console); console_set_scope(&console, CONSOLE_FLAG_BOOT | diff --git a/plat/arm/board/arm_fpga/fpga_def.h b/plat/arm/board/arm_fpga/fpga_def.h index dbdbe6f4d..609263745 100644 --- a/plat/arm/board/arm_fpga/fpga_def.h +++ b/plat/arm/board/arm_fpga/fpga_def.h @@ -23,17 +23,13 @@ #define FPGA_MAX_PE_PER_CPU 4 #define FPGA_PRIMARY_CPU 0x0 - /******************************************************************************* * FPGA image memory map related constants ******************************************************************************/ -/* UART base address and clock frequency, as configured by the image */ +/* UART base address, as configured by the image */ #define PLAT_FPGA_BOOT_UART_BASE 0x7ff80000 -#define PLAT_FPGA_BOOT_UART_CLK_IN_HZ 10000000 - #define PLAT_FPGA_CRASH_UART_BASE PLAT_FPGA_BOOT_UART_BASE -#define PLAT_FPGA_CRASH_UART_CLK_IN_HZ PLAT_FPGA_BOOT_UART_CLK_IN_HZ #define FPGA_TIMER_FREQUENCY 10000000 diff --git a/plat/arm/board/arm_fpga/include/platform_def.h b/plat/arm/board/arm_fpga/include/platform_def.h index 5c8aff691..37f3d8ae5 100644 --- a/plat/arm/board/arm_fpga/include/platform_def.h +++ b/plat/arm/board/arm_fpga/include/platform_def.h @@ -87,6 +87,4 @@ #define PLAT_FPGA_HOLD_STATE_WAIT 0 #define PLAT_FPGA_HOLD_STATE_GO 1 -#define PLAT_FPGA_CONSOLE_BAUDRATE 38400 - #endif diff --git a/plat/arm/board/arm_fpga/platform.mk b/plat/arm/board/arm_fpga/platform.mk index 302aabf38..335000037 100644 --- a/plat/arm/board/arm_fpga/platform.mk +++ b/plat/arm/board/arm_fpga/platform.mk @@ -38,6 +38,8 @@ USE_COHERENT_MEM := 0 # This can be overridden depending on CPU(s) used in the FPGA image HW_ASSISTED_COHERENCY := 1 +PL011_GENERIC_UART := 1 + FPGA_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S # select a different set of CPU files, depending on whether we compile for |