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author | Craig Topper <craig.topper@intel.com> | 2017-07-19 05:11:20 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-07-19 05:11:20 +0000 |
commit | 6553f3f19ef0f5bdcdde8f4ffc6303da06087e81 (patch) | |
tree | 3a4080790c40712fd2789221b8b133fb26381e1c /lib/builtins | |
parent | 02a9951ea0c9257c1968f0613c06f2aed1e48e00 (diff) | |
download | compiler-rt-6553f3f19ef0f5bdcdde8f4ffc6303da06087e81.tar.gz |
[X86][builtins] Sync getX86CpuIDAndInfoEx with llvm's Host.cpp again.
We now use __cpuidex intrinsics intead of inline asm on 32-bit Windows. We already used it on 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@308420 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/builtins')
-rw-r--r-- | lib/builtins/cpu_model.c | 39 |
1 files changed, 10 insertions, 29 deletions
diff --git a/lib/builtins/cpu_model.c b/lib/builtins/cpu_model.c index c6b30eda0..83ea7a49f 100644 --- a/lib/builtins/cpu_model.c +++ b/lib/builtins/cpu_model.c @@ -190,8 +190,8 @@ static bool getX86CpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX, static bool getX86CpuIDAndInfoEx(unsigned value, unsigned subleaf, unsigned *rEAX, unsigned *rEBX, unsigned *rECX, unsigned *rEDX) { -#if defined(__x86_64__) || defined(_M_X64) #if defined(__GNUC__) || defined(__clang__) +#if defined(__x86_64__) // gcc doesn't know cpuid would clobber ebx/rbx. Preserve it manually. // FIXME: should we save this for Clang? __asm__("movq\t%%rbx, %%rsi\n\t" @@ -200,43 +200,24 @@ static bool getX86CpuIDAndInfoEx(unsigned value, unsigned subleaf, : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) : "a"(value), "c"(subleaf)); return false; -#elif defined(_MSC_VER) - int registers[4]; - __cpuidex(registers, value, subleaf); - *rEAX = registers[0]; - *rEBX = registers[1]; - *rECX = registers[2]; - *rEDX = registers[3]; - return false; -#else - return true; -#endif -#elif defined(__i386__) || defined(_M_IX86) -#if defined(__GNUC__) || defined(__clang__) +#elif defined(__i386__) __asm__("movl\t%%ebx, %%esi\n\t" "cpuid\n\t" "xchgl\t%%ebx, %%esi\n\t" : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) : "a"(value), "c"(subleaf)); return false; -#elif defined(_MSC_VER) - __asm { - mov eax,value - mov ecx,subleaf - cpuid - mov esi,rEAX - mov dword ptr [esi],eax - mov esi,rEBX - mov dword ptr [esi],ebx - mov esi,rECX - mov dword ptr [esi],ecx - mov esi,rEDX - mov dword ptr [esi],edx - } - return false; #else return true; #endif +#elif defined(_MSC_VER) + int registers[4]; + __cpuidex(registers, value, subleaf); + *rEAX = registers[0]; + *rEBX = registers[1]; + *rECX = registers[2]; + *rEDX = registers[3]; + return false; #else return true; #endif |