diff options
author | Alina Sbirlea <asbirlea@google.com> | 2016-07-17 23:45:55 +0000 |
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committer | Alina Sbirlea <asbirlea@google.com> | 2016-07-17 23:45:55 +0000 |
commit | 72a44e79ce4b46c9b6a5eb588d0378e3dc0e631b (patch) | |
tree | 1c64e4fc928d7cfc145037cafeca105352c4b1de | |
parent | 6b635bc08dd7c8313dba85f6d1877cbceef38f76 (diff) | |
download | compiler-rt-72a44e79ce4b46c9b6a5eb588d0378e3dc0e631b.tar.gz |
[compiler-rt] Change all asm directives to __asm__ in cpu_model.
Summary:
Aiming to resolve failure in sanitizer bot by changning all asm directives to __asm__.
Also, consistency.
Reviewers: llvm-commits, echristo, vitalybuka
Subscribers: mehdi_amini
Differential Revision: https://reviews.llvm.org/D22446
git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@275740 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/builtins/cpu_model.c | 72 |
1 files changed, 36 insertions, 36 deletions
diff --git a/lib/builtins/cpu_model.c b/lib/builtins/cpu_model.c index 1302c9dff..9a3737020 100644 --- a/lib/builtins/cpu_model.c +++ b/lib/builtins/cpu_model.c @@ -131,22 +131,22 @@ static bool isCpuIdSupported() { #if defined(__GNUC__) || defined(__clang__) #if defined(__i386__) int __cpuid_supported; - __asm(" pushfl\n" - " popl %%eax\n" - " movl %%eax,%%ecx\n" - " xorl $0x00200000,%%eax\n" - " pushl %%eax\n" - " popfl\n" - " pushfl\n" - " popl %%eax\n" - " movl $0,%0\n" - " cmpl %%eax,%%ecx\n" - " je 1f\n" - " movl $1,%0\n" - "1:" - : "=r"(__cpuid_supported) - : - : "eax", "ecx"); + __asm__(" pushfl\n" + " popl %%eax\n" + " movl %%eax,%%ecx\n" + " xorl $0x00200000,%%eax\n" + " pushl %%eax\n" + " popfl\n" + " pushfl\n" + " popl %%eax\n" + " movl $0,%0\n" + " cmpl %%eax,%%ecx\n" + " je 1f\n" + " movl $1,%0\n" + "1:" + : "=r"(__cpuid_supported) + : + : "eax", "ecx"); if (!__cpuid_supported) return false; #endif @@ -165,17 +165,17 @@ static void getX86CpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX, #if defined(__GNUC__) || defined(__clang__) #if defined(__x86_64__) // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually. - asm("movq\t%%rbx, %%rsi\n\t" - "cpuid\n\t" - "xchgq\t%%rbx, %%rsi\n\t" - : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) - : "a"(value)); + __asm__("movq\t%%rbx, %%rsi\n\t" + "cpuid\n\t" + "xchgq\t%%rbx, %%rsi\n\t" + : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) + : "a"(value)); #elif defined(__i386__) - asm("movl\t%%ebx, %%esi\n\t" - "cpuid\n\t" - "xchgl\t%%ebx, %%esi\n\t" - : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) - : "a"(value)); + __asm__("movl\t%%ebx, %%esi\n\t" + "cpuid\n\t" + "xchgl\t%%ebx, %%esi\n\t" + : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) + : "a"(value)); // pedantic #else returns to appease -Wunreachable-code (so we don't generate // postprocessed code that looks like "return true; return false;") #else @@ -204,11 +204,11 @@ static void getX86CpuIDAndInfoEx(unsigned value, unsigned subleaf, #if defined(__GNUC__) || defined(__clang__) // gcc doesn't know cpuid would clobber ebx/rbx. Preserve it manually. // FIXME: should we save this for Clang? - asm("movq\t%%rbx, %%rsi\n\t" - "cpuid\n\t" - "xchgq\t%%rbx, %%rsi\n\t" - : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) - : "a"(value), "c"(subleaf)); + __asm__("movq\t%%rbx, %%rsi\n\t" + "cpuid\n\t" + "xchgq\t%%rbx, %%rsi\n\t" + : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) + : "a"(value), "c"(subleaf)); #elif defined(_MSC_VER) int registers[4]; __cpuidex(registers, value, subleaf); @@ -221,11 +221,11 @@ static void getX86CpuIDAndInfoEx(unsigned value, unsigned subleaf, #endif #elif defined(__i386__) || defined(_M_IX86) #if defined(__GNUC__) || defined(__clang__) - asm("movl\t%%ebx, %%esi\n\t" - "cpuid\n\t" - "xchgl\t%%ebx, %%esi\n\t" - : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) - : "a"(value), "c"(subleaf)); + __asm__("movl\t%%ebx, %%esi\n\t" + "cpuid\n\t" + "xchgl\t%%ebx, %%esi\n\t" + : "=a"(*rEAX), "=S"(*rEBX), "=c"(*rECX), "=d"(*rEDX) + : "a"(value), "c"(subleaf)); #elif defined(_MSC_VER) __asm { mov eax,value |