summaryrefslogtreecommitdiff
path: root/test/Driver/ppc-features.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Add -m(no)-spe to clangJustin Hibbits2019-09-051-0/+3
| | | | | | | | | | | | | | Summary: r337347 added support for the Signal Processing Engine (SPE) to LLVM. This follows that up with the clang side. This adds -mspe and -mno-spe, to match GCC. Subscribers: nemanjai, kbarton, cfe-commits Differential Revision: https://reviews.llvm.org/D49754 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@371066 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Option for secure plt modeStrahinja Petrovic2018-04-111-0/+4
| | | | | | | | | | This patch enables option for secure plt mode in clang (-msecure-plt). Differential Revision: https://reviews.llvm.org/D44921 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329795 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Pass CPU to assembler with -no-integrated-asNemanja Ivanovic2017-07-271-1/+1
| | | | | | | | | | This just adds the CPU to a list of commands passed to GAS when not using the integrated assembler. Differential Revision: https://reviews.llvm.org/D33820 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@309256 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the -faltivec alias option and replace it with -maltivec everywhere.Eric Christopher2017-03-211-33/+16
| | | | | | | | | | | The alias was only ever used on darwin and had some issues there, and isn't used in practice much. Also fixes a problem with -mno-altivec not turning off -maltivec. Also add a diagnostic for faltivec/fno-altivec that directs users to use maltivec options and include the altivec.h file explicitly. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@298449 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on HTM on power8 and later (including powerpc64le) since it'sEric Christopher2017-03-201-0/+6
| | | | | | available by default on those cpus and configurations. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@298307 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Enable soft-float for PPC64, and +soft-float -> -hard-floatHal Finkel2016-10-021-10/+10
| | | | | | | | | | Enable soft-float support on PPC64, as the backend now supports it. Also, the backend now uses -hard-float instead of +soft-float, so set the target features accordingly. Fixes PR26970. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283061 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add support for -mlongcallHal Finkel2016-08-301-0/+6
| | | | | | | | | Add support for GCC's PowerPC -mlongcall option; the backend supports the corresponding target feature as of r280040. Fixes PR19098. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@280041 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Fix make-check issuesPetar Jovanovic2015-12-141-5/+5
| | | | | | | | Previous change r255515 introduced a couple of issues likely caused by a different configure setup. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@255533 91177308-0d34-0410-b5e6-96231b3b80d8
* [Power PC] add soft float support for ppc32Petar Jovanovic2015-12-141-0/+44
| | | | | | | | | | | | | This patch enables soft float support for ppc32 architecture and fixes the ABI for variadic functions. This is the first in a set of patches for soft float support in LLVM. Patch by Strahinja Petrovic. Differential Revision: http://reviews.llvm.org/D13351 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@255515 91177308-0d34-0410-b5e6-96231b3b80d8
* [OpenMP] Add TLS-based implementation for threadprivate directive.Samuel Antao2015-07-131-1/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@242080 91177308-0d34-0410-b5e6-96231b3b80d8
* Added flag to disable isel instruction on PPC target. Using regular branches ↵Olivier Sallenave2015-04-091-0/+6
| | | | | | instead of isel is more efficient in some cases. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@234509 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Remove the --no-tls-optimize workaround from the clang driverBill Schmidt2015-02-101-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@228739 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Re-disable linker optimizations for nowBill Schmidt2015-02-061-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@228402 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Revert workaround for TLS linker bugBill Schmidt2015-02-051-2/+0
| | | | | | | | | | | | | | | | | In r227480, Ulrich Weigand introduced a workaround for a linker optimization bug that can create mis-optimized code for accesses to general-dynamic or local-dynamic TLS variables. The linker optimization bug only occurred for Clang/LLVM because of some inefficient code being generated for these TLS accesses. I have recently corrected LLVM to produce the efficient code sequence expected by the linkers, so this workaround is no longer needed. Therefore this patch reverts r227480. I've tested that the previous bootstrap failure no longer occurs with the workaround reverted. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@228253 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Work around TLS linker bugUlrich Weigand2015-01-291-0/+2
| | | | | | | | | | | | | Work around a bug in GNU ld (and gold) linker versions up to 2.25 that may mis-optimize code generated by this version of clang/LLVM to access general-dynamic or local-dynamic TLS variables. Bug is fixed here: https://sourceware.org/ml/binutils/2015-01/msg00318.html git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@227480 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add a target option for invariant function descriptorsHal Finkel2015-01-151-0/+6
| | | | | | | | The PPC backend will now assume that PPC64 ELFv1 function descriptors are invariant. This must be true for well-defined C/C++ code, but I'm providing an option to disable this assumption in case someone's JIT-engine needs it. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@226209 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add support for -mcmpbHal Finkel2015-01-061-0/+6
| | | | | | | In r225106, support for the CMPB instruction was added to the PowerPC backend. This adds the associated GCC-compatible feature flag. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@225312 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add feature for Power8 vector extensionsBill Schmidt2014-10-101-0/+6
| | | | | | | | | | | | | | | | | | | The current VSX feature for PowerPC specifies availability of the VSX instructions added with the 2.06 architecture version. With 2.07, the architecture adds new instructions to both the Category:Vector and Category:VSX instruction sets. Additionally, unaligned vector storage operations have improved performance. This patch adds a feature to provide access to the new instructions and performance capabilities of Power8. For compatibility with GCC, the feature is controlled via a new -mpower8-vector switch, and the feature causes the __POWER8_VECTOR__ builtin define to be generated by the preprocessor. There is a companion patch for llvm being committed at the same time. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@219502 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on the integrated assembler by default for ppc64 andEric Christopher2014-10-061-2/+2
| | | | | | | | ppc64le. Reviewed by Hal Finkel and Bill Schmidt. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@219129 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ppc64/power8 as a targetWill Schmidt2014-06-261-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@211778 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the parameters passed to the assembler and linker forWill Schmidt2014-03-241-0/+18
| | | | | | | | | | | | the PPC64LE target. Specifically: (assembler) adds/uses -mppc64 -mlittle-endian (linker) adds/uses elf64lppc Testcase included. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@204626 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -mcrbits/-mno-crbits to control the PowerPC CR-bit-tracking featureHal Finkel2014-02-281-0/+6
| | | | | | | The backend currently enables CR-bit tracking by default at -O2 and higher. These flags allow the user to override that default. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@202453 91177308-0d34-0410-b5e6-96231b3b80d8
* Add minimal command line support for the VSX powerpc processor.Eric Christopher2013-10-161-0/+7
| | | | | | Preprocessor support is still needed. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192839 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework ppc options handling into a features group.Eric Christopher2013-10-161-1/+0
| | | | | | This should have no functional behavior. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192838 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Support powerpc64le as a syntax-checking target.Bill Schmidt2013-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | This patch provides basic support for powerpc64le as an LLVM target. However, use of this target will not actually generate little-endian code. Instead, use of the target will cause the correct little-endian built-in defines to be generated, so that code that tests for __LITTLE_ENDIAN__, for example, will be correctly parsed for syntax-only testing. Code generation will otherwise be the same as powerpc64 (big-endian), for now. The patch leaves open the possibility of creating a little-endian PowerPC64 back end, but there is no immediate intent to create such a thing. The new test case variant ensures that correct built-in defines for little-endian code are generated. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@187180 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 'not' to commands that are expected to fail.Rafael Espindola2013-07-041-7/+7
| | | | | | | This is at least good documentation, but also opens the possibility of using pipefail. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@185652 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for gcc-compatible -mfprnd -mno-fprnd PPC optionsHal Finkel2013-03-301-0/+6
| | | | | | | gcc provides -mfprnd and -mno-fprnd for controlling the fprnd target feature; support these options as well. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178414 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for gcc-compatible -mpopcntd -mno-popcntd PPC optionsHal Finkel2013-03-281-0/+6
| | | | | | | gcc provides -mpopcntd and -mno-popcntd for controlling the popcntd target feature; support these options as well. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178235 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for gcc-compatible -mmfcrf -mno-mfcrf PPC optionsHal Finkel2013-03-281-0/+6
| | | | | | | | gcc provides -mmfcrf and -mno-mfcrf for controlling what we call the mfocrf target feature. Also, PPC is now making use of the static function AddTargetFeature used by the Mips Driver code. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178227 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -mqpx and -mno-qpx feature flags to toggle use of the PPC QPX vector ↵Hal Finkel2013-02-011-0/+70
instruction set I've renamed the altivec test to ppc-features (because now there is more than one feature to test). git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@174204 91177308-0d34-0410-b5e6-96231b3b80d8