summaryrefslogtreecommitdiff
path: root/cpu/frv.opc
blob: 92b55867ee112a1bbe79dc3d127917d7af55e02c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
/* Fujitsu FRV opcode support, for GNU Binutils.  -*- C -*-

   Copyright 2000, 2001, 2003 Free Software Foundation, Inc.

   Contributed by Red Hat Inc; developed under contract from Fujitsu.

   This file is part of the GNU Binutils.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.

*/

/* This file is an addendum to frv.cpu.  Heavy use of C code isn't
   appropriate in .cpu files, so it resides here.  This especially applies
   to assembly/disassembly where parsing/printing can be quite involved.
   Such things aren't really part of the specification of the cpu, per se,
   so .cpu files provide the general framework and .opc files handle the
   nitty-gritty details as necessary.

   Each section is delimited with start and end markers.

   <arch>-opc.h additions use: "-- opc.h"
   <arch>-opc.c additions use: "-- opc.c"
   <arch>-asm.c additions use: "-- asm.c"
   <arch>-dis.c additions use: "-- dis.c"
   <arch>-ibd.h additions use: "-- ibd.h"
*/

/* -- opc.h */

#undef  CGEN_DIS_HASH_SIZE
#define CGEN_DIS_HASH_SIZE 128
#undef  CGEN_DIS_HASH
#define CGEN_DIS_HASH(buffer, value) (((value) >> 18) & 127)

/* Allows reason codes to be output when assembler errors occur.  */
#define CGEN_VERBOSE_ASSEMBLER_ERRORS

/* Vliw support.  */
#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8.  */
#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
typedef CGEN_ATTR_VALUE_TYPE VLIW_COMBO[FRV_VLIW_SIZE];

typedef struct
{
  int                   next_slot;
  int                   constraint_violation;
  unsigned long         mach;
  unsigned long         elf_flags;
  CGEN_ATTR_VALUE_TYPE *unit_mapping;
  VLIW_COMBO           *current_vliw;
  CGEN_ATTR_VALUE_TYPE  major[FRV_VLIW_SIZE];
  const CGEN_INSN*      insn[FRV_VLIW_SIZE];
} FRV_VLIW;

int frv_is_branch_major PARAMS ((CGEN_ATTR_VALUE_TYPE, unsigned long));
int frv_is_float_major  PARAMS ((CGEN_ATTR_VALUE_TYPE, unsigned long));
int frv_is_media_major  PARAMS ((CGEN_ATTR_VALUE_TYPE, unsigned long));
int frv_is_branch_insn  PARAMS ((const CGEN_INSN *));
int frv_is_float_insn   PARAMS ((const CGEN_INSN *));
int frv_is_media_insn   PARAMS ((const CGEN_INSN *));
void frv_vliw_reset     PARAMS ((FRV_VLIW *, unsigned long mach, unsigned long elf_flags));
int frv_vliw_add_insn   PARAMS ((FRV_VLIW *, const CGEN_INSN *));
int spr_valid           PARAMS ((long));
/* -- */

/* -- opc.c */
#include "elf/frv.h"
#include <stdio.h>

static int match_unit
  PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, CGEN_ATTR_VALUE_TYPE));
static int match_vliw
  PARAMS ((VLIW_COMBO *, VLIW_COMBO *, int));
static VLIW_COMBO * add_next_to_vliw
  PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
static int find_major_in_vliw
  PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
static int fr400_check_insn_major_constraints
  PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
static int fr500_check_insn_major_constraints
  PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
static int fr550_check_insn_major_constraints
  PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, const CGEN_INSN *));
static int check_insn_major_constraints
  PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, const CGEN_INSN *));

int
frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
  switch (mach)
    {
    case bfd_mach_fr400:
      if (major >= FR400_MAJOR_B_1 && major <= FR400_MAJOR_B_6)
	return 1; /* is a branch */
      break;
    default:
      if (major >= FR500_MAJOR_B_1 && major <= FR500_MAJOR_B_6)
	return 1; /* is a branch */
      break;
    }

  return 0; /* not a branch */
}

int
frv_is_float_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
  switch (mach)
    {
    case bfd_mach_fr400:
      return 0; /* No float insns */
    default:
      if (major >= FR500_MAJOR_F_1 && major <= FR500_MAJOR_F_8)
	return 1; /* is a float insn */
      break;
    }

  return 0; /* not a branch */
}

int
frv_is_media_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
{
  switch (mach)
    {
    case bfd_mach_fr400:
      if (major >= FR400_MAJOR_M_1 && major <= FR400_MAJOR_M_2)
	return 1; /* is a media insn */
      break;
    default:
      if (major >= FR500_MAJOR_M_1 && major <= FR500_MAJOR_M_8)
	return 1; /* is a media insn */
      break;
    }

  return 0; /* not a branch */
}

int
frv_is_branch_insn (const CGEN_INSN *insn)
{
  if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR),
			   bfd_mach_fr400))
    return 1;
  if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR),
			   bfd_mach_fr500))
    return 1;

  return 0;
}

int
frv_is_float_insn (const CGEN_INSN *insn)
{
  if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR),
			  bfd_mach_fr400))
    return 1;
  if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR),
			  bfd_mach_fr500))
    return 1;

  return 0;
}

int
frv_is_media_insn (const CGEN_INSN *insn)
{
  if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR),
			  bfd_mach_fr400))
    return 1;
  if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR),
			  bfd_mach_fr500))
    return 1;

  return 0;
}

/* This table represents the allowable packing for vliw insns for the fr400.
   The fr400 has only 2 vliw slots. Represent this by not allowing any insns
   in the extra slots.
   Subsets of any given row are also allowed.  */
static VLIW_COMBO fr400_allowed_vliw[] =
{
  /*  slot0       slot1       slot2       slot3    */
  {  UNIT_I0,    UNIT_I1,    UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_I0,    UNIT_FM0,   UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_I0,    UNIT_B0,    UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_FM0,   UNIT_FM1,   UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_FM0,   UNIT_B0,    UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_B0,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_C,     UNIT_NIL,   UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO }
};

/* This table represents the allowable packing for vliw insns for the fr500.
   The fr500 has only 4 vliw slots. Represent this by not allowing any insns
   in the extra slots.
   Subsets of any given row are also allowed.  */
static VLIW_COMBO fr500_allowed_vliw[] =
{
  /*  slot0       slot1       slot2       slot3    */
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1  PAD_VLIW_COMBO },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_B0   PAD_VLIW_COMBO },
  {  UNIT_I0,    UNIT_FM0,   UNIT_FM1,   UNIT_B0   PAD_VLIW_COMBO },
  {  UNIT_I0,    UNIT_FM0,   UNIT_B0,    UNIT_B1   PAD_VLIW_COMBO },
  {  UNIT_I0,    UNIT_I1,    UNIT_B0,    UNIT_B1   PAD_VLIW_COMBO },
  {  UNIT_I0,    UNIT_B0,    UNIT_B1,    UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_FM0,   UNIT_FM1,   UNIT_B0,    UNIT_B1   PAD_VLIW_COMBO },
  {  UNIT_FM0,   UNIT_B0,    UNIT_B1,    UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_C,     UNIT_NIL,   UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO },
  {  UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL  PAD_VLIW_COMBO }
};

/* This table represents the allowable packing for vliw insns for the fr550.
   Subsets of any given row are also allowed.  */
static VLIW_COMBO fr550_allowed_vliw[] =
{
  /*  slot0       slot1       slot2       slot3       slot4       slot5       slot6       slot7   */
  {  UNIT_I0,    UNIT_I1,    UNIT_I2,    UNIT_I3,    UNIT_B0,    UNIT_B1 ,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_I1,    UNIT_I2,    UNIT_B0,    UNIT_B1 ,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_I1,    UNIT_B0,    UNIT_B1 ,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_B0,    UNIT_B1 ,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_I2,    UNIT_FM2,   UNIT_I3,    UNIT_FM3 },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_I2,    UNIT_FM2,   UNIT_I3,    UNIT_B0  },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_I2,    UNIT_FM2,   UNIT_FM3,   UNIT_B0  },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_I2,    UNIT_FM2,   UNIT_B0,    UNIT_B1  },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_I2,    UNIT_I3,    UNIT_B0,    UNIT_B1  },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_I2,    UNIT_B0,    UNIT_B1,    UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_FM2,   UNIT_FM3,   UNIT_B0,    UNIT_B1  },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_FM2,   UNIT_FM3,   UNIT_B0,    UNIT_B1  },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_FM2,   UNIT_B0,    UNIT_B1,    UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_FM1,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_I2,    UNIT_I3,    UNIT_B0,    UNIT_B1,    UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_I2,    UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_I1,    UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_FM1,   UNIT_FM2,   UNIT_FM3,   UNIT_B0,    UNIT_B1,    UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_FM1,   UNIT_FM2,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_FM1,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_I0,    UNIT_FM0,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_C,     UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_FM0,   UNIT_FM1,   UNIT_FM2,   UNIT_FM3,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL },
  {  UNIT_FM0,   UNIT_FM1,   UNIT_FM2,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_FM0,   UNIT_FM1,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_FM0,   UNIT_B0,    UNIT_B1,    UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL },
  {  UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL,   UNIT_NIL }
};

/* Some insns are assigned specialized implementation units which map to
   different actual implementation units on different machines.  These
   tables perform that mapping.  */
static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] =
{
/* unit in insn    actual unit */
/* NIL      */     UNIT_NIL,
/* I0       */     UNIT_I0,
/* I1       */     UNIT_I1,
/* I01      */     UNIT_I01, 
/* I2       */     UNIT_NIL, /* no I2 or I3 unit */
/* I3       */     UNIT_NIL,
/* IALL     */     UNIT_I01, /* only I0 and I1 units */
/* FM0      */     UNIT_FM0,
/* FM1      */     UNIT_FM1,
/* FM01     */     UNIT_FM01,
/* FM2      */     UNIT_NIL, /* no F2 or M2 units */
/* FM3      */     UNIT_NIL, /* no F3 or M3 units */
/* FMALL    */     UNIT_FM01,/* Only F0,F1,M0,M1 units */
/* FMLOW    */     UNIT_FM0, /* Only F0,M0 units */
/* B0       */     UNIT_B0,  /* branches only in B0 unit.  */
/* B1       */     UNIT_B0,
/* B01      */     UNIT_B0,
/* C        */     UNIT_C,
/* MULT-DIV */     UNIT_I0,  /* multiply and divide only in I0  unit.  */
/* LOAD     */     UNIT_I0,  /* load                only in I0  unit.  */
/* STORE    */     UNIT_I0,  /* store               only in I0  unit.  */
/* SCAN     */     UNIT_I0,  /* scan                only in I0  unit.  */
/* DCPL     */     UNIT_C,   /* dcpl                only in C   unit.  */
/* MDUALACC */     UNIT_FM0, /* media dual acc insn only in FM0 unit.  */
/* MCLRACC-1*/     UNIT_FM0  /* mclracc,A==1   insn only in FM0 unit.  */
};

static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] =
{
/* unit in insn    actual unit */
/* NIL      */     UNIT_NIL,
/* I0       */     UNIT_I0,
/* I1       */     UNIT_I1,
/* I01      */     UNIT_I01, 
/* I2       */     UNIT_NIL, /* no I2 or I3 unit */
/* I3       */     UNIT_NIL,
/* IALL     */     UNIT_I01, /* only I0 and I1 units */
/* FM0      */     UNIT_FM0,
/* FM1      */     UNIT_FM1,
/* FM01     */     UNIT_FM01,
/* FM2      */     UNIT_NIL, /* no F2 or M2 units */
/* FM3      */     UNIT_NIL, /* no F3 or M2 units */
/* FMALL    */     UNIT_FM01,/* Only F0,F1,M0,M1 units */
/* FMLOW    */     UNIT_FM0, /* Only F0,M0 units */
/* B0       */     UNIT_B0,
/* B1       */     UNIT_B1,
/* B01      */     UNIT_B01,
/* C        */     UNIT_C,
/* MULT-DIV */     UNIT_I01, /* multiply and divide in I0 or I1 unit.  */
/* LOAD     */     UNIT_I01, /* load                in I0 or I1 unit.  */
/* STORE    */     UNIT_I0,  /* store               only in I0 unit.  */
/* SCAN     */     UNIT_I01, /* scan                in I0 or I1 unit.  */
/* DCPL     */     UNIT_C,   /* dcpl                only in C unit.  */
/* MDUALACC */     UNIT_FM0, /* media dual acc insn only in FM0 unit.  */
/* MCLRACC-1*/     UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit.  */
};

static CGEN_ATTR_VALUE_TYPE fr550_unit_mapping[] =
{
/* unit in insn    actual unit */
/* NIL      */     UNIT_NIL,
/* I0       */     UNIT_I0,
/* I1       */     UNIT_I1,
/* I01      */     UNIT_I01, 
/* I2       */     UNIT_I2,
/* I3       */     UNIT_I3,
/* IALL     */     UNIT_IALL, 
/* FM0      */     UNIT_FM0,
/* FM1      */     UNIT_FM1,
/* FM01     */     UNIT_FM01,
/* FM2      */     UNIT_FM2,
/* FM3      */     UNIT_FM3,
/* FMALL    */     UNIT_FMALL,
/* FMLOW    */     UNIT_FM01, /* Only F0,F1,M0,M1 units */
/* B0       */     UNIT_B0,
/* B1       */     UNIT_B1,
/* B01      */     UNIT_B01,
/* C        */     UNIT_C,
/* MULT-DIV */     UNIT_I01,  /* multiply and divide in I0 or I1 unit.    */
/* LOAD     */     UNIT_I01,  /* load                in I0 or I1 unit.    */
/* STORE    */     UNIT_I01,  /* store               in I0 or I1 unit.    */
/* SCAN     */     UNIT_IALL, /* scan                in any integer unit. */
/* DCPL     */     UNIT_I0,   /* dcpl                only in I0 unit.     */
/* MDUALACC */     UNIT_FMALL,/* media dual acc insn in all media units   */
/* MCLRACC-1*/     UNIT_FM01  /* mclracc,A==1 in FM0 or FM1 unit.         */
};

void
frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags)
{
  vliw->next_slot = 0;
  vliw->constraint_violation = 0;
  vliw->mach = mach;
  vliw->elf_flags = elf_flags;

  switch (mach)
    {
    case bfd_mach_fr400:
      vliw->current_vliw = fr400_allowed_vliw;
      vliw->unit_mapping = fr400_unit_mapping;
      break;
    case bfd_mach_fr550:
      vliw->current_vliw = fr550_allowed_vliw;
      vliw->unit_mapping = fr550_unit_mapping;
      break;
    default:
      vliw->current_vliw = fr500_allowed_vliw;
      vliw->unit_mapping = fr500_unit_mapping;
      break;
    }
}

/* Return 1 if unit1 is a match for unit2.
   Unit1 comes from the insn's UNIT attribute. unit2 comes from one of the
   *_allowed_vliw tables above.  */
static int
match_unit (FRV_VLIW *vliw,
	    CGEN_ATTR_VALUE_TYPE unit1, CGEN_ATTR_VALUE_TYPE unit2)
{
  /* Map any specialized implementation units to actual ones.  */
  unit1 = vliw->unit_mapping[unit1];

  if (unit1 == unit2)
    return 1;
  if (unit1 < unit2)
    return 0;

  switch (unit1)
    {
    case UNIT_I01:
    case UNIT_FM01:
    case UNIT_B01:
      /* The 01 versions of these units are within 2 enums of the 0 or 1
	 versions.  */
      if (unit1 - unit2 <= 2)
	return 1;
      break;
    case UNIT_IALL:
    case UNIT_FMALL:
      /* The ALL versions of these units are within 5 enums of the 0, 1, 2 or 3
	 versions.  */
      if (unit1 - unit2 <= 5)
	return 1;
      break;
    default:
      break;
    }

  return 0;
}

/* Return 1 if the vliws match, 0 otherwise.  */

static int
match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size)
{
  int i;

  for (i = 0; i < vliw_size; ++i)
    {
      if ((*vliw1)[i] != (*vliw2)[i])
	return 0;
    }

  return 1;
}

/* Find the next vliw vliw in the table that can accomodate the new insn.
   If one is found then return it. Otherwise return NULL.  */

static VLIW_COMBO *
add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit)
{
  int           next    = vliw->next_slot;
  VLIW_COMBO    *current = vliw->current_vliw;
  VLIW_COMBO    *potential;

  if (next <= 0)
    {
      fprintf (stderr, "frv-opc.c line %d: bad vliw->next_slot value.\n",
	       __LINE__);
      abort (); /* Should never happen */
    }

  /* The table is sorted by units allowed within slots, so vliws with
     identical starting sequences are together.  */
  potential = current;
  do
    {
      if (match_unit (vliw, unit, (*potential)[next]))
	return potential;
      ++potential;
    }
  while (match_vliw (potential, current, next));

  return NULL;
}

/* Look for the given major insn type in the given vliw. Return 1 if found,
   return 0 otherwise.  */

static int
find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major)
{
  int i;

  for (i = 0; i < vliw->next_slot; ++i)
    if (vliw->major[i] == major)
      return 1;

  return 0;
}

/* Check for constraints between the insns in the vliw due to major insn
   types.  */

static int
fr400_check_insn_major_constraints (
  FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major
)
{
  /* In the cpu file, all media insns are represented as being allowed in
     both media units. This makes it easier since this is the case for fr500.
     Catch the invalid combinations here.  Insns of major class FR400_MAJOR_M_2
     cannot coexist with any other media insn in a vliw.  */
  switch (major)
    {
    case FR400_MAJOR_M_2:
      return ! find_major_in_vliw (vliw, FR400_MAJOR_M_1)
	&&   ! find_major_in_vliw (vliw, FR400_MAJOR_M_2);
    default:
      break;
    }
  return 1;
}

static int
find_unit_in_vliw (
  FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit
)
{
  int i;
  for (i = 0; i < vliw->next_slot; ++i)
    if (CGEN_INSN_ATTR_VALUE (vliw->insn[i], CGEN_INSN_UNIT) == unit)
      return 1;

  return 0; /* not found */
}

static int
find_major_in_slot (
  FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, CGEN_ATTR_VALUE_TYPE slot
)
{
  int i;

  for (i = 0; i < vliw->next_slot; ++i)
    if (vliw->major[i] == major && (*vliw->current_vliw)[i] == slot)
      return 1;

  return 0;
}

static int
fr550_find_media_in_vliw (FRV_VLIW *vliw)
{
  int i;

  for (i = 0; i < vliw->next_slot; ++i)
    {
      if (vliw->major[i] < FR550_MAJOR_M_1 || vliw->major[i] > FR550_MAJOR_M_5)
	continue;

      /* Found a media insn, however, MNOP and MCLRACC don't count.  */
      if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MNOP
	  || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_0
	  || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_1)
	continue;

      return 1; /* found one */
    }

  return 0;
}

static int
fr550_find_float_in_vliw (FRV_VLIW *vliw)
{
  int i;

  for (i = 0; i < vliw->next_slot; ++i)
    {
      if (vliw->major[i] < FR550_MAJOR_F_1 || vliw->major[i] > FR550_MAJOR_F_4)
	continue;

      /* Found a floating point insn, however, FNOP doesn't count.  */
      if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_FNOP)
	continue;

      return 1; /* found one */
    }

  return 0;
}

static int
fr550_check_insn_major_constraints (
  FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, const CGEN_INSN *insn
)
{
  CGEN_ATTR_VALUE_TYPE unit;
  CGEN_ATTR_VALUE_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
  switch (slot)
    {
    case UNIT_I2:
      /* If it's a store, then there must be another store in I1 */
      unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
      if (unit == UNIT_STORE)
	return find_unit_in_vliw (vliw, UNIT_STORE);
      break;
    case UNIT_FM2:
    case UNIT_FM3:
      /* Floating point insns other than FNOP in slot f2 or f3 cannot coexist with
	 media insns.  */
      if (major >= FR550_MAJOR_F_1 && major <= FR550_MAJOR_F_4
	  && CGEN_INSN_NUM (insn) != FRV_INSN_FNOP)
	return ! fr550_find_media_in_vliw (vliw);
      /* Media insns other than MNOP in slot m2 or m3 cannot coexist with
	 floating point insns.  */
      if (major >= FR550_MAJOR_M_1 && major <= FR550_MAJOR_M_5
	  && CGEN_INSN_NUM (insn) != FRV_INSN_MNOP)
	return ! fr550_find_float_in_vliw (vliw);
      /* F-2 in slot f2 or f3 cannot coexist with F-2 or F-4 in slot f1 or f2
	 respectively.
       */
      if (major == FR550_MAJOR_F_2)
	return ! find_major_in_slot (vliw, FR550_MAJOR_F_2, slot - (UNIT_FM2 - UNIT_FM0))
	  &&   ! find_major_in_slot (vliw, FR550_MAJOR_F_4, slot - (UNIT_FM2 - UNIT_FM0));
      /* M-2 or M-5 in slot m2 or m3 cannot coexist with M-2 in slot m1 or m2
	 respectively.  */
      if (major == FR550_MAJOR_M_2 || major == FR550_MAJOR_M_5)
	return ! find_major_in_slot (vliw, FR550_MAJOR_M_2, slot - (UNIT_FM2 - UNIT_FM0));
      /* M-4 in slot m2 or m3 cannot coexist with M-4 in slot m1 or m2
	 respectively.  */
      if (major == FR550_MAJOR_M_4)
	return ! find_major_in_slot (vliw, FR550_MAJOR_M_4, slot - (UNIT_FM2 - UNIT_FM0));
      break;
    default:
      break;
    }
  return 1; /* all ok */
}

static int
fr500_check_insn_major_constraints (
  FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major
)
{
  /* TODO: A table might be faster for some of the more complex instances
     here.  */
  switch (major)
    {
    case FR500_MAJOR_I_1:
    case FR500_MAJOR_I_4:
    case FR500_MAJOR_I_5:
    case FR500_MAJOR_I_6:
    case FR500_MAJOR_B_1:
    case FR500_MAJOR_B_2:
    case FR500_MAJOR_B_3:
    case FR500_MAJOR_B_4:
    case FR500_MAJOR_B_5:
    case FR500_MAJOR_B_6:
    case FR500_MAJOR_F_4:
    case FR500_MAJOR_F_8:
    case FR500_MAJOR_M_8:
      return 1; /* OK */
    case FR500_MAJOR_I_2:
      /* Cannot coexist with I-3 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_I_3);
    case FR500_MAJOR_I_3:
      /* Cannot coexist with I-2 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_I_2);
    case FR500_MAJOR_F_1:
    case FR500_MAJOR_F_2:
      /* Cannot coexist with F-5, F-6, or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_F_3:
      /* Cannot coexist with F-7, or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_F_7)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_F_5:
      /* Cannot coexist with F-1, F-2, F-6, F-7, or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_F_1)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_2)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_7)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_F_6:
      /* Cannot coexist with F-1, F-2, F-5, F-6, or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_F_1)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_2)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_F_7:
      /* Cannot coexist with F-3, F-5, F-7, or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_F_3)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_7)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_M_1:
      /* Cannot coexist with M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_M_2:
    case FR500_MAJOR_M_3:
      /* Cannot coexist with M-5, M-6 or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_M_4:
      /* Cannot coexist with M-6 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_M_6);
    case FR500_MAJOR_M_5:
      /* Cannot coexist with M-2, M-3, M-5, M-6  or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_M_2)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_3)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_M_6:
      /* Cannot coexist with M-2, M-3, M-4, M-5, M-6  or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_M_2)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_3)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_4)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
    case FR500_MAJOR_M_7:
      /* Cannot coexist with M-1, M-2, M-3, M-5, M-6  or M-7 insn.  */
      return ! find_major_in_vliw (vliw, FR500_MAJOR_M_1)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_2)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_3)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_M_7)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_1)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_2)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_3)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
	&&   ! find_major_in_vliw (vliw, FR500_MAJOR_F_7);
    default:
      fprintf (stderr, "frv-opc.c, line %d: bad major code, aborting.\n",
	       __LINE__);
      abort ();
      break;
    }
  return 1;
}

static int
check_insn_major_constraints (
  FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, const CGEN_INSN *insn
)
{
  int rc;
  switch (vliw->mach)
    {
    case bfd_mach_fr400:
      rc = fr400_check_insn_major_constraints (vliw, major);
      break;
    case bfd_mach_fr550:
      rc = fr550_check_insn_major_constraints (vliw, major, insn);
      break;
    default:
      rc = fr500_check_insn_major_constraints (vliw, major);
      break;
    }
  return rc;
}

/* Add in insn to the VLIW vliw if possible. Return 0 if successful,
   non-zero otherwise.  */
int
frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
{
  int index;
  CGEN_ATTR_VALUE_TYPE major;
  CGEN_ATTR_VALUE_TYPE unit;
  VLIW_COMBO *new_vliw;

  if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn))
    return 1;

  index = vliw->next_slot;
  if (index >= FRV_VLIW_SIZE)
    return 1;

  unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
  if (unit == UNIT_NIL)
    {
      fprintf (stderr, "frv-opc.c line %d: bad insn unit.\n",
	       __LINE__);
      abort (); /* no UNIT specified for this insn in frv.cpu  */
    }

  switch (vliw->mach)
    {
    case bfd_mach_fr400:
      major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR);
      break;
    case bfd_mach_fr550:
      major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR550_MAJOR);
      break;
    default:
      major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR);
      break;
    }

  if (index <= 0)
    {
      /* Any insn can be added to slot 0.  */
      while (! match_unit (vliw, unit, (*vliw->current_vliw)[0]))
	++vliw->current_vliw;
      vliw->major[0] = major;
      vliw->insn[0] = insn;
      vliw->next_slot = 1;
      return 0;
    }

  /* If there are already insns in the vliw(s) check to see that
     this one can be added.  Do this by finding an allowable vliw
     combination that can accept the new insn.  */
  if (! (vliw->elf_flags & EF_FRV_NOPACK))
    {
      new_vliw = add_next_to_vliw (vliw, unit);
      if (new_vliw && check_insn_major_constraints (vliw, major, insn))
	{
	  vliw->current_vliw = new_vliw;
	  vliw->major[index] = major;
	  vliw->insn[index] = insn;
	  vliw->next_slot++;
	  return 0;
	}

      /* The frv machine supports all packing conbinations.  If we fail,
	 to add the insn, then it could not be handled as if it was the fr500.
	 Just return as if it was handled ok.  */
      if (vliw->mach == bfd_mach_frv)
	return 0;
    }

  vliw->constraint_violation = 1;
  return 1;
}

int
spr_valid (regno)
     long regno;
{
  if (regno < 0)     return 0;
  if (regno <= 4095) return 1;
  return 0;
}
/* -- */

/* -- asm.c */
static const char * parse_ulo16
  PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * parse_uslo16
  PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static const char * parse_uhi16
  PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
static long parse_register_number
  PARAMS ((const char **));
static const char * parse_spr
  PARAMS ((CGEN_CPU_DESC, const char **, CGEN_KEYWORD *, long *));
static const char * parse_d12
  PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
static const char * parse_s12
  PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
static const char * parse_u12
  PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
static const char * parse_even_register
  PARAMS ((CGEN_CPU_DESC, const char **, CGEN_KEYWORD *, long *));
static const char * parse_A0
  PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
static const char * parse_A1
  PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
static const char * parse_A
  PARAMS ((CGEN_CPU_DESC, const char **, int, long *, long));

static const char *
parse_ulo16 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     unsigned long *valuep;
{
  const char *errmsg;
  enum cgen_parse_operand_result result_type;
  bfd_vma value;
 
  if (**strp == '#' || **strp == '%')
    {
      if (strncasecmp (*strp + 1, "lo(", 3) == 0)
	{
	  *strp += 4;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_LO16,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing `)'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      if (strncasecmp (*strp + 1, "gprello(", 8) == 0)
	{
	  *strp += 9;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GPRELLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotlo(", 6) == 0)
	{
	  *strp += 7;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GOTLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotfuncdesclo(", 14) == 0)
	{
	  *strp += 15;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOTLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotofflo(", 9) == 0)
	{
	  *strp += 10;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_GOTOFFLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotofffuncdesclo(", 17) == 0)
	{
	  *strp += 18;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOTOFFLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
    }
  return cgen_parse_signed_integer (cd, strp, opindex, valuep);
}

static const char *
parse_uslo16 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     unsigned long *valuep;
{
  const char *errmsg;
  enum cgen_parse_operand_result result_type;
  bfd_vma value;
 
  if (**strp == '#' || **strp == '%')
    {
      if (strncasecmp (*strp + 1, "lo(", 3) == 0)
	{
	  *strp += 4;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_LO16,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing `)'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gprello(", 8) == 0)
	{
	  *strp += 9;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GPRELLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotlo(", 6) == 0)
	{
	  *strp += 7;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GOTLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotfuncdesclo(", 14) == 0)
	{
	  *strp += 15;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOTLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotofflo(", 9) == 0)
	{
	  *strp += 10;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_GOTOFFLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotofffuncdesclo(", 17) == 0)
	{
	  *strp += 18;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOTOFFLO,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value &= 0xffff;
	  *valuep = value;
	  return errmsg;
	}
    }
  return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
}

static const char *
parse_uhi16 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     unsigned long *valuep;
{
  const char *errmsg;
  enum cgen_parse_operand_result result_type;
  bfd_vma value;
 
  if (**strp == '#' || **strp == '%')
    {
      if (strncasecmp (*strp + 1, "hi(", 3) == 0)
	{
	  *strp += 4;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_HI16,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing `)'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value >>= 16;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gprelhi(", 8) == 0)
	{
	  *strp += 9;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GPRELHI,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value >>= 16;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gothi(", 6) == 0)
	{
	  *strp += 7;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GOTHI,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value >>= 16;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotfuncdeschi(", 14) == 0)
	{
	  *strp += 15;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOTHI,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value >>= 16;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotoffhi(", 9) == 0)
	{
	  *strp += 10;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_GOTOFFHI,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value >>= 16;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotofffuncdeschi(", 17) == 0)
	{
	  *strp += 18;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOTOFFHI,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  if (errmsg == NULL
	      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
	    value >>= 16;
	  *valuep = value;
	  return errmsg;
	}
    }
  return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
}

static long
parse_register_number (strp)
     const char **strp;
{
  int regno;
  if (**strp < '0' || **strp > '9')
    return -1; /* error */

  regno = **strp - '0';
  for (++*strp; **strp >= '0' && **strp <= '9'; ++*strp)
    regno = regno * 10 + (**strp - '0');

  return regno;
}

static const char *
parse_spr (cd, strp, table, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     CGEN_KEYWORD * table;
     long *valuep;
{
  const char *save_strp;
  long regno;

  /* Check for spr index notation.  */
  if (strncasecmp (*strp, "spr[", 4) == 0)
    {
      *strp += 4;
      regno = parse_register_number (strp);
      if (**strp != ']')
        return "missing `]'";
      ++*strp;
      if (! spr_valid (regno))
	return "Special purpose register number is out of range";
      *valuep = regno;
      return NULL;
    }

  save_strp = *strp;
  regno = parse_register_number (strp);
  if (regno != -1)
    {
      if (! spr_valid (regno))
	return "Special purpose register number is out of range";
      *valuep = regno;
      return NULL;
    }

  *strp = save_strp;
  return cgen_parse_keyword (cd, strp, table, valuep);
}

static const char *
parse_d12 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     long *valuep;
{
  const char *errmsg;
  enum cgen_parse_operand_result result_type;
  bfd_vma value;
 
  /* Check for small data reference.  */
  if (**strp == '#' || **strp == '%')
    {
      if (strncasecmp (*strp + 1, "gprel12(", 8) == 0)
        {
          *strp += 9;
          errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GPREL12,
                                       &result_type, &value);
          if (**strp != ')')
            return "missing `)'";
          ++*strp;
          *valuep = value;
          return errmsg;
        }
      else if (strncasecmp (*strp + 1, "got12(", 6) == 0)
	{
	  *strp += 7;
	  errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GOT12,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotfuncdesc12(", 14) == 0)
	{
	  *strp += 15;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOT12,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotoff12(", 9) == 0)
	{
	  *strp += 10;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_GOTOFF12,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  *valuep = value;
	  return errmsg;
	}
      else if (strncasecmp (*strp + 1, "gotofffuncdesc12(", 17) == 0)
	{
	  *strp += 18;
	  errmsg = cgen_parse_address (cd, strp, opindex,
				       BFD_RELOC_FRV_FUNCDESC_GOTOFF12,
				       &result_type, &value);
	  if (**strp != ')')
	    return "missing ')'";
	  ++*strp;
	  *valuep = value;
	  return errmsg;
	}
    }
  return cgen_parse_signed_integer (cd, strp, opindex, valuep);
}

static const char *
parse_s12 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     long *valuep;
{
  const char *errmsg;
  enum cgen_parse_operand_result result_type;
  bfd_vma value;
 
  /* Check for small data reference.  */
  if ((**strp == '#' || **strp == '%')
      && strncasecmp (*strp + 1, "gprel12(", 8) == 0)
    {
      *strp += 9;
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GPREL12,
                                    &result_type, &value);
      if (**strp != ')')
        return "missing `)'";
      ++*strp;
      *valuep = value;
      return errmsg;
    }
  else if ((**strp == '#' || **strp == '%')
	   && strncasecmp (*strp + 1, "got12(", 6) == 0)
    {
      *strp += 7;
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GOT12,
				   &result_type, &value);
      if (**strp != ')')
	return "missing ')'";
      ++*strp;
      *valuep = value;
      return errmsg;
    }
  else if ((**strp == '#' || **strp == '%')
	   && strncasecmp (*strp + 1, "gotfuncdesc12(", 14) == 0)
    {
      *strp += 15;
      errmsg = cgen_parse_address (cd, strp, opindex,
				   BFD_RELOC_FRV_FUNCDESC_GOT12,
				   &result_type, &value);
      if (**strp != ')')
	return "missing ')'";
      ++*strp;
      *valuep = value;
      return errmsg;
    }
  else if ((**strp == '#' || **strp == '%')
	   && strncasecmp (*strp + 1, "gotoff12(", 9) == 0)
    {
      *strp += 10;
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GOTOFF12,
				   &result_type, &value);
      if (**strp != ')')
	return "missing ')'";
      ++*strp;
      *valuep = value;
      return errmsg;
    }
  else if ((**strp == '#' || **strp == '%')
	   && strncasecmp (*strp + 1, "gotofffuncdesc12(", 17) == 0)
    {
      *strp += 18;
      errmsg = cgen_parse_address (cd, strp, opindex,
				   BFD_RELOC_FRV_FUNCDESC_GOTOFF12,
				   &result_type, &value);
      if (**strp != ')')
	return "missing ')'";
      ++*strp;
      *valuep = value;
      return errmsg;
    }
  else
    {
      if (**strp == '#')
        ++*strp;
      return cgen_parse_signed_integer (cd, strp, opindex, valuep);
    }
}

static const char *
parse_u12 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     long *valuep;
{
  const char *errmsg;
  enum cgen_parse_operand_result result_type;
  bfd_vma value;
 
  /* Check for small data reference.  */
  if ((**strp == '#' || **strp == '%')
      && strncasecmp (*strp + 1, "gprel12(", 8) == 0)
    {
      *strp += 9;
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_GPRELU12,
                                    &result_type, &value);
      if (**strp != ')')
        return "missing `)'";
      ++*strp;
      *valuep = value;
      return errmsg;
    }
  else
    {
      if (**strp == '#')
        ++*strp;
      return cgen_parse_signed_integer (cd, strp, opindex, valuep);
    }
}

static const char *
parse_A (cd, strp, opindex, valuep, A)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     long *valuep;
     long A;
{
  const char *errmsg;
 
  if (**strp == '#')
    ++*strp;

  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
  if (errmsg)
    return errmsg;

  if (*valuep != A)
    return "Value of A operand must be 0 or 1";

  return NULL;
}

static const char *
parse_A0 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     long *valuep;
{
  return parse_A (cd, strp, opindex, valuep, 0);
}

static const char *
parse_A1 (cd, strp, opindex, valuep)
     CGEN_CPU_DESC cd;
     const char **strp;
     int opindex;
     long *valuep;
{
  return parse_A (cd, strp, opindex, valuep, 1);
}

static const char *
parse_even_register (cd, strP, tableP, valueP)
     CGEN_CPU_DESC  cd;
     const char **  strP;
     CGEN_KEYWORD * tableP;
     long *         valueP;
{
  const char * errmsg;
  const char * saved_star_strP = * strP;

  errmsg = cgen_parse_keyword (cd, strP, tableP, valueP);

  if (errmsg == NULL && ((* valueP) & 1))
    {
      errmsg = _("register number must be even");
      * strP = saved_star_strP;
    }

  return errmsg;
}
/* -- */

/* -- dis.c */
static void print_spr
  PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned));
static void print_hi
  PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
static void print_lo
  PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));

static void
print_spr (cd, dis_info, names, regno, attrs)
     CGEN_CPU_DESC cd;
     PTR dis_info;
     CGEN_KEYWORD *names;
     long regno;
     unsigned int attrs;
{
  /* Use the register index format for any unnamed registers.  */
  if (cgen_keyword_lookup_value (names, regno) == NULL)
    {
      disassemble_info *info = (disassemble_info *) dis_info;
      (*info->fprintf_func) (info->stream, "spr[%ld]", regno);
    }
  else
    print_keyword (cd, dis_info, names, regno, attrs);
}

static void
print_hi (cd, dis_info, value, attrs, pc, length)
     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
     PTR dis_info;
     long value;
     unsigned int attrs ATTRIBUTE_UNUSED;
     bfd_vma pc ATTRIBUTE_UNUSED;
     int length ATTRIBUTE_UNUSED;
{
  disassemble_info *info = (disassemble_info *) dis_info;
  if (value)
    (*info->fprintf_func) (info->stream, "0x%lx", value);
  else
    (*info->fprintf_func) (info->stream, "hi(0x%lx)", value);
}

static void
print_lo (cd, dis_info, value, attrs, pc, length)
     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
     PTR dis_info;
     long value;
     unsigned int attrs ATTRIBUTE_UNUSED;
     bfd_vma pc ATTRIBUTE_UNUSED;
     int length ATTRIBUTE_UNUSED;
{
  disassemble_info *info = (disassemble_info *) dis_info;
  if (value)
    (*info->fprintf_func) (info->stream, "0x%lx", value);
  else
    (*info->fprintf_func) (info->stream, "lo(0x%lx)", value);
}

/* -- */