diff options
Diffstat (limited to 'gas/testsuite/gas/arm')
46 files changed, 0 insertions, 4907 deletions
diff --git a/gas/testsuite/gas/arm/adrl.d b/gas/testsuite/gas/arm/adrl.d deleted file mode 100644 index badab1ae3e..0000000000 --- a/gas/testsuite/gas/arm/adrl.d +++ /dev/null @@ -1,20 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: ADRL - -# Test the `ADRL' pseudo-op - -.*: +file format .*arm.* - -Disassembly of section .text: - ... -0+2000 <.*> e24f0008 sub r0, pc, #8 ; 0x8 -0+2004 <.*> e2400c20 sub r0, r0, #8192 ; 0x2000 -0+2008 <.*> e28f0020 add r0, pc, #32 ; 0x20 -0+200c <.*> e2800c20 add r0, r0, #8192 ; 0x2000 -0+2010 <.*> e24f0018 sub r0, pc, #24 ; 0x18 -0+2014 <.*> e1a00000 nop \(mov r0,r0\) -0+2018 <.*> e28f0008 add r0, pc, #8 ; 0x8 -0+201c <.*> e1a00000 nop \(mov r0,r0\) -0+2020 <.*> 028f0000 addeq r0, pc, #0 ; 0x0 -0+2024 <.*> e1a00000 nop \(mov r0,r0\) - ... diff --git a/gas/testsuite/gas/arm/adrl.s b/gas/testsuite/gas/arm/adrl.s deleted file mode 100644 index 1a96d0b0ee..0000000000 --- a/gas/testsuite/gas/arm/adrl.s +++ /dev/null @@ -1,15 +0,0 @@ - @ test ADRL pseudo-op -.text -foo: -.align 0 -1: - .space 8192 -2: - adrl r0, 1b - adrl r0, 1f - adrl r0, 2b - adrl r0, 2f - adrEQl r0, 2f -2: - .space 8200 -1: diff --git a/gas/testsuite/gas/arm/arch4t.s b/gas/testsuite/gas/arm/arch4t.s deleted file mode 100644 index 417b3c6bee..0000000000 --- a/gas/testsuite/gas/arm/arch4t.s +++ /dev/null @@ -1,35 +0,0 @@ -.text -.align 0 - - bx r0 - bxeq r1 - -foo: - ldrh r3, foo - ldrsh r4, [r5] - ldrsb r4, [r1, r3] - ldrsh r1, [r4, r4]! - ldreqsb r1, [r5, -r3] - ldrneh r2, [r6], r7 - ldrccsh r2, [r7], +r8 - ldrsb r2, [r3, #255] - ldrsh r1, [r4, #-250] - ldrsb r1, [r5, #+240] - - strh r2, bar - strneh r3, [r3] - - msr CPSR_f, #2 - msr CPSR_c, r3 - msr CPSR_x, r4 - msr CPSR_s, r5 - msr CPSR_f, r6 - msr CPSR_all, r7 - - msr SPSR_f, #4 - msr SPSR_c, r8 - msr SPSR_x, r9 - msr SPSR_s, r10 - msr SPSR_f, r11 - msr SPSR_all, r12 -bar: diff --git a/gas/testsuite/gas/arm/arch5tej.d b/gas/testsuite/gas/arm/arch5tej.d deleted file mode 100644 index a4bcddeab1..0000000000 --- a/gas/testsuite/gas/arm/arch5tej.d +++ /dev/null @@ -1,15 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: ARM Architecture v5TEJ instructions -#as: -march=armv5tej - -# Test the ARM Architecture v5TEJ instructions - -.*: +file format .*arm.* - -Disassembly of section .text: -0+00 <[^>]*> e12fff20 ? bxj r0 -0+04 <[^>]*> e12fff21 ? bxj r1 -0+08 <[^>]*> e12fff2e ? bxj lr -0+0c <[^>]*> 012fff20 ? bxjeq r0 -0+10 <[^>]*> 412fff20 ? bxjmi r0 -0+14 <[^>]*> 512fff27 ? bxjpl r7 diff --git a/gas/testsuite/gas/arm/arch5tej.s b/gas/testsuite/gas/arm/arch5tej.s deleted file mode 100644 index f4735ff3d3..0000000000 --- a/gas/testsuite/gas/arm/arch5tej.s +++ /dev/null @@ -1,9 +0,0 @@ - .text - .align 0 -label: - bxj r0 - bxj r1 - bxj r14 - bxjeq r0 - bxjmi r0 - bxjpl r7 diff --git a/gas/testsuite/gas/arm/arm.exp b/gas/testsuite/gas/arm/arm.exp deleted file mode 100644 index 0f6d8f0d9d..0000000000 --- a/gas/testsuite/gas/arm/arm.exp +++ /dev/null @@ -1,79 +0,0 @@ -# -# Some ARM tests -# -proc run_errors_test { name opts tname} { - global srcdir subdir - set testname "$tname" - set file $srcdir/$subdir/$name - gas_run ${name}.s $opts ">&${name}.out" - if { [regexp_diff "${name}.out" "${file}.l"] } then { - fail $testname - verbose "output is [file_contents "${name}.out"]" 2 - return - } - pass $testname -} - -if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then { - run_dump_test "inst" - - run_dump_test "ldconst" - - run_dump_test "armv1" - - run_errors_test "armv1-bad" "-marm1" "ARM v1 errors" - - gas_test "arm3.s" "-marm3" $stdoptlist "Arm 3 instructions" - - gas_test "arm6.s" "-marm6" $stdoptlist "Arm 6 instructions" - - gas_test "arm7dm.s" "-marm7dm" $stdoptlist "Arm 7DM instructions" - - run_dump_test "arm7t" - - gas_test "thumb.s" "-marm7t" $stdoptlist "Thumb instructions" - - gas_test "arch4t.s" "-marmv4t" $stdoptlist "Arm architecture 4t instructions" - - run_dump_test "arch5tej" - - gas_test "copro.s" "" $stdoptlist "Co processor instructions" - - gas_test "immed.s" "" $stdoptlist "immediate expressions" - - gas_test "float.s" "" $stdoptlist "Core floating point instructions" - - run_dump_test "fpa-monadic" - - run_dump_test "fpa-dyadic" - - run_dump_test "fpa-mem" - - run_dump_test "vfp1xD" - - run_dump_test "vfp1" - - run_errors_test "vfp-bad" "-mfpu=vfp" "VFP errors" - - run_dump_test "xscale" - - run_dump_test "adrl" - - if {[istarget *-*-elf*] || [istarget *-*-linux*]} then { - run_dump_test "pic" - } -} - -# Not all arm targets are bi-endian, so only run this test on ones -# we know that are. FIXME: We should probably also key off armeb/armel. - -if [istarget arm-*-pe] { - run_dump_test "le-fpconst" - - # Since big-endian numbers have the normal format, this doesn't exist. - #run_dump_test "be-fpconst" -} - -if [istarget arm9e-*] { - run_dump_test "maverick" -} diff --git a/gas/testsuite/gas/arm/arm3.s b/gas/testsuite/gas/arm/arm3.s deleted file mode 100644 index ebcf915ccb..0000000000 --- a/gas/testsuite/gas/arm/arm3.s +++ /dev/null @@ -1,6 +0,0 @@ -.text -.align 0 - swp r0, r1, [r8] - swpb r2, r3, [r3] - swpgeb r4, r1, [r4] - diff --git a/gas/testsuite/gas/arm/arm6.s b/gas/testsuite/gas/arm/arm6.s deleted file mode 100644 index e82837f71b..0000000000 --- a/gas/testsuite/gas/arm/arm6.s +++ /dev/null @@ -1,19 +0,0 @@ -.text -.align 0 - - mrs r8, cpsr - mrs r2, spsr - - msr cpsr, r1 - msrne cpsr_flg, #0xf0000000 - msr spsr_flg, r8 - msr spsr_all, r9 - - mrs r8, CPSR - mrs r2, SPSR - - msr CPSR, r1 - msrne CPSR_flg, #0xf0000000 - msr SPSR_flg, r8 - msr SPSR_all, r9 - diff --git a/gas/testsuite/gas/arm/arm7dm.s b/gas/testsuite/gas/arm/arm7dm.s deleted file mode 100644 index 99eaa9fd51..0000000000 --- a/gas/testsuite/gas/arm/arm7dm.s +++ /dev/null @@ -1,14 +0,0 @@ -.text -.align 0 - - smull r0, r1, r2, r3 - umull r0, r1, r2, r3 - smlal r0, r1, r2, r3 - umlal r0, r1, r4, r3 - - smullne r0, r1, r3, r4 - smulls r1, r0, r9, r11 - umlaleqs r2, r9, r4, r9 - smlalge r14, r10, r8, r14 - - msr CPSR_x, #0 @ This used to be illegal, but rev 2 of the ARM ARM allows it. diff --git a/gas/testsuite/gas/arm/arm7t.d b/gas/testsuite/gas/arm/arm7t.d deleted file mode 100644 index dc4993a0b5..0000000000 --- a/gas/testsuite/gas/arm/arm7t.d +++ /dev/null @@ -1,68 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: ARM arm7t -#as: -marm7t -EL - -# Test the halfword and signextend memory transfers: - -.*: +file format .*arm.* - -Disassembly of section .text: -0+00 <[^>]*> e1d100b0 ? ldrh r0, \[r1\] -0+04 <[^>]*> e1f100b0 ? ldrh r0, \[r1\]! -0+08 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\] -0+0c <[^>]*> e1b100b2 ? ldrh r0, \[r1, r2\]! -0+10 <[^>]*> e1d100bc ? ldrh r0, \[r1, #12\] -0+14 <[^>]*> e1f100bc ? ldrh r0, \[r1, #12\]! -0+18 <[^>]*> e15100bc ? ldrh r0, \[r1, -#12\] -0+1c <[^>]*> e09100b2 ? ldrh r0, \[r1\], r2 -0+20 <[^>]*> e3a00cff ? mov r0, #65280 ; 0xff00 -0+24 <[^>]*> e1df0bb4 ? ldrh r0, \[pc, #180\] ; 0+e0 <[^>]*> -0+28 <[^>]*> e1df0abc ? ldrh r0, \[pc, #172\] ; 0+dc <[^>]*> -0+2c <[^>]*> e1c100b0 ? strh r0, \[r1\] -0+30 <[^>]*> e1e100b0 ? strh r0, \[r1\]! -0+34 <[^>]*> e18100b2 ? strh r0, \[r1, r2\] -0+38 <[^>]*> e1a100b2 ? strh r0, \[r1, r2\]! -0+3c <[^>]*> e1c100bc ? strh r0, \[r1, #12\] -0+40 <[^>]*> e1e100bc ? strh r0, \[r1, #12\]! -0+44 <[^>]*> e14100bc ? strh r0, \[r1, -#12\] -0+48 <[^>]*> e08100b2 ? strh r0, \[r1\], r2 -0+4c <[^>]*> e1cf08b8 ? strh r0, \[pc, #136\] ; 0+dc <[^>]*> -0+50 <[^>]*> e1d100d0 ? ldrsb r0, \[r1\] -0+54 <[^>]*> e1f100d0 ? ldrsb r0, \[r1\]! -0+58 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\] -0+5c <[^>]*> e1b100d2 ? ldrsb r0, \[r1, r2\]! -0+60 <[^>]*> e1d100dc ? ldrsb r0, \[r1, #12\] -0+64 <[^>]*> e1f100dc ? ldrsb r0, \[r1, #12\]! -0+68 <[^>]*> e15100dc ? ldrsb r0, \[r1, -#12\] -0+6c <[^>]*> e09100d2 ? ldrsb r0, \[r1\], r2 -0+70 <[^>]*> e3a000de ? mov r0, #222 ; 0xde -0+74 <[^>]*> e1df06d0 ? ldrsb r0, \[pc, #96\] ; 0+dc <[^>]*> -0+78 <[^>]*> e1d100f0 ? ldrsh r0, \[r1\] -0+7c <[^>]*> e1f100f0 ? ldrsh r0, \[r1\]! -0+80 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\] -0+84 <[^>]*> e1b100f2 ? ldrsh r0, \[r1, r2\]! -0+88 <[^>]*> e1d100fc ? ldrsh r0, \[r1, #12\] -0+8c <[^>]*> e1f100fc ? ldrsh r0, \[r1, #12\]! -0+90 <[^>]*> e15100fc ? ldrsh r0, \[r1, -#12\] -0+94 <[^>]*> e09100f2 ? ldrsh r0, \[r1\], r2 -0+98 <[^>]*> e3a00cff ? mov r0, #65280 ; 0xff00 -0+9c <[^>]*> e1df03fc ? ldrsh r0, \[pc, #60\] ; 0+e0 <[^>]*> -0+a0 <[^>]*> e1df03f4 ? ldrsh r0, \[pc, #52\] ; 0+dc <[^>]*> -0+a4 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\] -0+a8 <[^>]*> 119100b2 ? ldrneh r0, \[r1, r2\] -0+ac <[^>]*> 819100b2 ? ldrhih r0, \[r1, r2\] -0+b0 <[^>]*> b19100b2 ? ldrlth r0, \[r1, r2\] -0+b4 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\] -0+b8 <[^>]*> 119100f2 ? ldrnesh r0, \[r1, r2\] -0+bc <[^>]*> 819100f2 ? ldrhish r0, \[r1, r2\] -0+c0 <[^>]*> b19100f2 ? ldrltsh r0, \[r1, r2\] -0+c4 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\] -0+c8 <[^>]*> 119100d2 ? ldrnesb r0, \[r1, r2\] -0+cc <[^>]*> 819100d2 ? ldrhisb r0, \[r1, r2\] -0+d0 <[^>]*> b19100d2 ? ldrltsb r0, \[r1, r2\] -0+d4 <[^>]*> e1df00f4 ? ldrsh r0, \[pc, #4\] ; 0+e0 <[^>]*> -0+d8 <[^>]*> e1df00f4 ? ldrsh r0, \[pc, #4\] ; 0+e4 <[^>]*> -0+dc <[^>]*> 00000000 ? andeq r0, r0, r0 -[ ]*dc:.*fred -0+e0 <[^>]*> 0000c0de ? .* -0+e4 <[^>]*> 0000dead ? .* diff --git a/gas/testsuite/gas/arm/arm7t.s b/gas/testsuite/gas/arm/arm7t.s deleted file mode 100644 index d155752eed..0000000000 --- a/gas/testsuite/gas/arm/arm7t.s +++ /dev/null @@ -1,74 +0,0 @@ - .text - .align 0 - -loadhalfwords: - ldrh r0, [r1] - ldrh r0, [r1]! - ldrh r0, [r1, r2] - ldrh r0, [r1, r2]! - ldrh r0, [r1,#0x0C] - ldrh r0, [r1,#0x0C]! - ldrh r0, [r1,#-0x0C] - ldrh r0, [r1], r2 - ldrh r0, =0xFF00 - ldrh r0, =0xC0DE - ldrh r0, .L2 - -storehalfwords: - strh r0, [r1] - strh r0, [r1]! - strh r0, [r1, r2] - strh r0, [r1, r2]! - strh r0, [r1,#0x0C] - strh r0, [r1,#0x0C]! - strh r0, [r1,#-0x0C] - strh r0, [r1], r2 - strh r0, .L2 - -loadsignedbytes: - ldrsb r0, [r1] - ldrsb r0, [r1]! - ldrsb r0, [r1, r2] - ldrsb r0, [r1, r2]! - ldrsb r0, [r1,#0x0C] - ldrsb r0, [r1,#0x0C]! - ldrsb r0, [r1,#-0x0C] - ldrsb r0, [r1], r2 - ldrsb r0, =0xDE - ldrsb r0, .L2 - -loadsignedhalfwords: - ldrsh r0, [r1] - ldrsh r0, [r1]! - ldrsh r0, [r1, r2] - ldrsh r0, [r1, r2]! - ldrsh r0, [r1, #0x0C] - ldrsh r0, [r1, #0x0C]! - ldrsh r0, [r1, #-0x0C] - ldrsh r0, [r1], r2 - ldrsh r0, =0xFF00 - ldrsh r0, =0xC0DE - ldrsh r0, .L2 - -misc: - ldralh r0, [r1, r2] - ldrneh r0, [r1, r2] - ldrhih r0, [r1, r2] - ldrlth r0, [r1, r2] - - ldralsh r0, [r1, r2] - ldrnesh r0, [r1, r2] - ldrhish r0, [r1, r2] - ldrltsh r0, [r1, r2] - - ldralsb r0, [r1, r2] - ldrnesb r0, [r1, r2] - ldrhisb r0, [r1, r2] - ldrltsb r0, [r1, r2] - - ldrsh r0, =0xC0DE - ldrsh r0, =0xDEAD - - .align -.L2: - .word fred diff --git a/gas/testsuite/gas/arm/armv1-bad.l b/gas/testsuite/gas/arm/armv1-bad.l deleted file mode 100644 index 96d9e73981..0000000000 --- a/gas/testsuite/gas/arm/armv1-bad.l +++ /dev/null @@ -1,8 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:4: Error: invalid pseudo operation -- `str r0,=0x00ff0000' -[^:]*:5: Error: bad expression -- `ldr r0,{r1}' -[^:]*:6: Error: address offset too large -- `ldr r0,\[r1,#4096\]' -[^:]*:7: Error: address offset too large -- `ldr r0,\[r1,#-4096\]' -[^:]*:8: Error: invalid constant -- `mov r0,#0x1ff' -[^:]*:9: Error: bad instruction `cmpl r0,r0' -[^:]*:10: Error: selected processor does not support `strh r0,\[r1\]' diff --git a/gas/testsuite/gas/arm/armv1-bad.s b/gas/testsuite/gas/arm/armv1-bad.s deleted file mode 100644 index c879a739e0..0000000000 --- a/gas/testsuite/gas/arm/armv1-bad.s +++ /dev/null @@ -1,10 +0,0 @@ - .global entry - .text -entry: - str r0, =0x00ff0000 - ldr r0, {r1} - ldr r0, [r1, #4096] - ldr r0, [r1, #-4096] - mov r0, #0x1ff - cmpl r0, r0 - strh r0, [r1] diff --git a/gas/testsuite/gas/arm/armv1.d b/gas/testsuite/gas/arm/armv1.d deleted file mode 100644 index d4e5fd17dd..0000000000 --- a/gas/testsuite/gas/arm/armv1.d +++ /dev/null @@ -1,70 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: ARM v1 instructions -#as: -marm1 - -# Test the ARM v1 instructions - -.*: +file format .*arm.* - -Disassembly of section .text: -0+00 <[^>]*> e0000000 ? and r0, r0, r0 -0+04 <[^>]*> e0100000 ? ands r0, r0, r0 -0+08 <[^>]*> e0200000 ? eor r0, r0, r0 -0+0c <[^>]*> e0300000 ? eors r0, r0, r0 -0+10 <[^>]*> e0400000 ? sub r0, r0, r0 -0+14 <[^>]*> e0500000 ? subs r0, r0, r0 -0+18 <[^>]*> e0600000 ? rsb r0, r0, r0 -0+1c <[^>]*> e0700000 ? rsbs r0, r0, r0 -0+20 <[^>]*> e0800000 ? add r0, r0, r0 -0+24 <[^>]*> e0900000 ? adds r0, r0, r0 -0+28 <[^>]*> e0a00000 ? adc r0, r0, r0 -0+2c <[^>]*> e0b00000 ? adcs r0, r0, r0 -0+30 <[^>]*> e0c00000 ? sbc r0, r0, r0 -0+34 <[^>]*> e0d00000 ? sbcs r0, r0, r0 -0+38 <[^>]*> e0e00000 ? rsc r0, r0, r0 -0+3c <[^>]*> e0f00000 ? rscs r0, r0, r0 -0+40 <[^>]*> e1800000 ? orr r0, r0, r0 -0+44 <[^>]*> e1900000 ? orrs r0, r0, r0 -0+48 <[^>]*> e1c00000 ? bic r0, r0, r0 -0+4c <[^>]*> e1d00000 ? bics r0, r0, r0 -0+50 <[^>]*> e1100000 ? tst r0, r0 -0+54 <[^>]*> e1100000 ? tst r0, r0 -0+58 <[^>]*> e110f000 ? tstp r0, r0 -0+5c <[^>]*> e1300000 ? teq r0, r0 -0+60 <[^>]*> e1300000 ? teq r0, r0 -0+64 <[^>]*> e130f000 ? teqp r0, r0 -0+68 <[^>]*> e1500000 ? cmp r0, r0 -0+6c <[^>]*> e1500000 ? cmp r0, r0 -0+70 <[^>]*> e150f000 ? cmpp r0, r0 -0+74 <[^>]*> e1700000 ? cmn r0, r0 -0+78 <[^>]*> e1700000 ? cmn r0, r0 -0+7c <[^>]*> e170f000 ? cmnp r0, r0 -0+80 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) -0+84 <[^>]*> e1b00000 ? movs r0, r0 -0+88 <[^>]*> e1e00000 ? mvn r0, r0 -0+8c <[^>]*> e1f00000 ? mvns r0, r0 -0+90 <[^>]*> ef000000 ? swi 0x00000000 -0+94 <[^>]*> e5900000 ? ldr r0, \[r0\] -0+98 <[^>]*> e5d00000 ? ldrb r0, \[r0\] -0+9c <[^>]*> e4b10000 ? ldrt r0, \[r1\] -0+a0 <[^>]*> e4f10000 ? ldrbt r0, \[r1\] -0+a4 <[^>]*> e5800000 ? str r0, \[r0\] -0+a8 <[^>]*> e5c00000 ? strb r0, \[r0\] -0+ac <[^>]*> e4a10000 ? strt r0, \[r1\] -0+b0 <[^>]*> e4e10000 ? strbt r0, \[r1\] -0+b4 <[^>]*> e8800001 ? stmia r0, {r0} -0+b8 <[^>]*> e9800001 ? stmib r0, {r0} -0+bc <[^>]*> e8000001 ? stmda r0, {r0} -0+c0 <[^>]*> e9000001 ? stmdb r0, {r0} -0+c4 <[^>]*> e9000001 ? stmdb r0, {r0} -0+c8 <[^>]*> e9800001 ? stmib r0, {r0} -0+cc <[^>]*> e8800001 ? stmia r0, {r0} -0+d0 <[^>]*> e8000001 ? stmda r0, {r0} -0+d4 <[^>]*> e8900001 ? ldmia r0, {r0} -0+d8 <[^>]*> e9900001 ? ldmib r0, {r0} -0+dc <[^>]*> e8100001 ? ldmda r0, {r0} -0+e0 <[^>]*> e9100001 ? ldmdb r0, {r0} -0+e4 <[^>]*> e8900001 ? ldmia r0, {r0} -0+e8 <[^>]*> e8100001 ? ldmda r0, {r0} -0+ec <[^>]*> e9100001 ? ldmdb r0, {r0} -0+f0 <[^>]*> e9900001 ? ldmib r0, {r0} diff --git a/gas/testsuite/gas/arm/armv1.s b/gas/testsuite/gas/arm/armv1.s deleted file mode 100644 index b4b7b5af3b..0000000000 --- a/gas/testsuite/gas/arm/armv1.s +++ /dev/null @@ -1,70 +0,0 @@ - .global entry - .text -entry: - and r0, r0, r0 - ands r0, r0, r0 - eor r0, r0, r0 - eors r0, r0, r0 - sub r0, r0, r0 - subs r0, r0, r0 - rsb r0, r0, r0 - rsbs r0, r0, r0 - add r0, r0, r0 - adds r0, r0, r0 - adc r0, r0, r0 - adcs r0, r0, r0 - sbc r0, r0, r0 - sbcs r0, r0, r0 - rsc r0, r0, r0 - rscs r0, r0, r0 - orr r0, r0, r0 - orrs r0, r0, r0 - bic r0, r0, r0 - bics r0, r0, r0 - - tst r0, r0 - tsts r0, r0 - tstp r0, r0 - teq r0, r0 - teqs r0, r0 - teqp r0, r0 - cmp r0, r0 - cmps r0, r0 - cmpp r0, r0 - cmn r0, r0 - cmns r0, r0 - cmnp r0, r0 - - mov r0, r0 - movs r0, r0 - mvn r0, r0 - mvns r0, r0 - - swi #0 - - ldr r0, [r0, #-0] - ldrb r0, [r0, #-0] - ldrt r0, [r1] - ldrbt r0, [r1] - str r0, [r0, #-0] - strb r0, [r0, #-0] - strt r0, [r1] - strbt r0, [r1] - - stmia r0, {r0} - stmib r0, {r0} - stmda r0, {r0} - stmdb r0, {r0} - stmfd r0, {r0} - stmfa r0, {r0} - stmea r0, {r0} - stmed r0, {r0} - - ldmia r0, {r0} - ldmib r0, {r0} - ldmda r0, {r0} - ldmdb r0, {r0} - ldmfd r0, {r0} - ldmfa r0, {r0} - ldmea r0, {r0} - ldmed r0, {r0} diff --git a/gas/testsuite/gas/arm/copro.s b/gas/testsuite/gas/arm/copro.s deleted file mode 100644 index 46c9b920df..0000000000 --- a/gas/testsuite/gas/arm/copro.s +++ /dev/null @@ -1,24 +0,0 @@ -.text -.align 0 - cdp p1, 4, cr1, cr2, cr3 - cdpeq 4, 3, c1, c4, cr5, 5 - - ldc 5, cr9, [r3] - ldcl 1, cr14, [r1, #32] - ldcmi 0, cr0, [r2, #1020]! - ldcpll p7, c1, [r3], #64 - ldc p0, c8, foo -foo: - - stc 5, cr0, [r3] - stcl 3, cr15, [r0, #8] - stceq p4, cr12, [r2, #100]! - stccc p6, c8, [r4], #48 - stc p1, c7, bar -bar: - - mrc 2, 3, r5, c1, c2 - mrcge p4, 5, r15, cr1, cr2, 7 - - mcr p7, 1, r15, cr1, cr1 - mcrlt 5, 1, r8, cr2, cr9, 0 diff --git a/gas/testsuite/gas/arm/el_segundo.d b/gas/testsuite/gas/arm/el_segundo.d deleted file mode 100644 index 835e7a11ad..0000000000 --- a/gas/testsuite/gas/arm/el_segundo.d +++ /dev/null @@ -1,33 +0,0 @@ - -el_segundo.o: file format elf32-littlearm - -Disassembly of section .text: - -00000000 <main>: - 0: c1003281 smlabbgt r0, r1, r2, r3 - 4: e1003281 smlabb r0, r1, r2, r3 - 8: e10032a1 smlatb r0, r1, r2, r3 - c: e10032c1 smlabt r0, r1, r2, r3 - 10: e10032e1 smlatt r0, r1, r2, r3 - 14: c1203281 smlawbgt r0, r1, r2, r3 - 18: e1203281 smlawb r0, r1, r2, r3 - 1c: e12032c1 smlawt r0, r1, r2, r3 - 20: c1410382 smlalbbgt r0, r1, r2, r3 - 24: e1410382 smlalbb r0, r1, r2, r3 - 28: e14103a2 smlaltb r0, r1, r2, r3 - 2c: e14103c2 smlalbt r0, r1, r2, r3 - 30: e14103e2 smlaltt r0, r1, r2, r3 - 34: c1600281 smulbbgt r0, r1, r2 - 38: e1600281 smulbb r0, r1, r2 - 3c: e16002a1 smultb r0, r1, r2 - 40: e16002c1 smulbt r0, r1, r2 - 44: e16002e1 smultt r0, r1, r2 - 48: c12002a1 smulwbgt r0, r1, r2 - 4c: e12002a1 smulwb r0, r1, r2 - 50: e12002e1 smulwt r0, r1, r2 - 54: c1020051 qaddgt r0, r1, r2 - 58: e1020051 qadd r0, r1, r2 - 5c: e1420051 qdadd r0, r1, r2 - 60: e1220051 qsub r0, r1, r2 - 64: e1620051 qdsub r0, r1, r2 - 68: e1220051 qsub r0, r1, r2 diff --git a/gas/testsuite/gas/arm/el_segundo.s b/gas/testsuite/gas/arm/el_segundo.s deleted file mode 100644 index 9f403a10d5..0000000000 --- a/gas/testsuite/gas/arm/el_segundo.s +++ /dev/null @@ -1,54 +0,0 @@ -# el_segundo.s -# -# Tests that we generate the right code for v5e instructions. -# This is not a functional test, although it can be linked. -# (The section at the rear is non-Coyanosa stuff for comparison.) -# To verify a compiler, do: -# <gcc build area>/gcc/as el_segundo.s -o _temp.o -# <gcc build area>/binutils/objdump -dr _temp.o >! _temp.d -# diff _temp.d el_segundo.d - - .section .rdata - .align 0 -.LC0: - .ascii "some data\000" - - .text - .global main -# .type main,function - .align 0 - -main: - smlabbgt r0,r1,r2,r3 - smlabb r0,r1,r2,r3 - smlatb r0,r1,r2,r3 - smlabt r0,r1,r2,r3 - smlatt r0,r1,r2,r3 - - smlawbgt r0,r1,r2,r3 - smlawb r0,r1,r2,r3 - smlawt r0,r1,r2,r3 - - smlalbbgt r0,r1,r2,r3 - smlalbb r0,r1,r2,r3 - smlaltb r0,r1,r2,r3 - smlalbt r0,r1,r2,r3 - smlaltt r0,r1,r2,r3 - - smulbbgt r0,r1,r2 - smulbb r0,r1,r2 - smultb r0,r1,r2 - smulbt r0,r1,r2 - smultt r0,r1,r2 - - smulwbgt r0,r1,r2 - smulwb r0,r1,r2 - smulwt r0,r1,r2 - - qaddgt r0,r1,r2 - qadd r0,r1,r2 - - qdadd r0,r1,r2 - qsub r0,r1,r2 - qdsub r0,r1,r2 - qsub r0,r1,r2 diff --git a/gas/testsuite/gas/arm/float.s b/gas/testsuite/gas/arm/float.s deleted file mode 100644 index 48aee965cb..0000000000 --- a/gas/testsuite/gas/arm/float.s +++ /dev/null @@ -1,162 +0,0 @@ -.text -.align 0 - mvfe f0, f1 - mvfeqe f3, f5 - mvfeqd f4, #1.0 - mvfs f4, f7 - mvfsp f0, f1 - mvfdm f3, f4 - mvfez f7, f7 - - adfe f0, f1, #2.0 - adfeqe f1, f2, #0.5 - adfsm f3, f4, f5 - - sufd f0, f0, #2.0 - sufs f1, f2, #10.0 - sufneez f3, f4, f5 - - rsfs f1, f1, #0.0 - rsfdp f3, f0, #5.0 - rsfled f7, f6, f0 - - mufd f0, f0, f0 - mufez f1, f2, #3.0 - mufals f0, f0, #4.0 - - dvfd f0, f0, #1.0000 - dvfez f0, f1, #10e0 - dvfmism f3, f4, f5 - - rdfe f0, f1, #1.0e1 - rdfs f3, f7, #0f1 - rdfccdp f4, f4, f3 - - powd f0, f2, f3 - pows f1, f3, #0e1e1 - powcsez f4, f7, #1 - - rpws f7, f6, f7 - rpweqd f0, f1, f2 - rpwem f2, f2, f3 - - rmfd f1, f2, #3 - rmfvss f3, f4, f4 - rmfep f4, f7, f0 - - fmls f0, f1, f2 - fmleqs f1, f3, f5 - fmlplsz f4, f6, f0 - - fdvs f1, f3, #10 - fdvsp f0, f1, f2 - fdvhssm f4, f4, f4 - - frds f1, f1, #1.0 - frdgts f2, f1, f0 - frdgtsz f4, f4, f5 - - pold f0, f1, f2 - polsz f4, f6, #3.0 - poleqe f5, f6, f7 - - mnfs f0, f1 - mnfd f0, #3.0 - mnfez f0, #4.0 - mnfeqez f0, f5 - mnfsp f0, f4 - mnfdm f1, f7 - - absd f0, f1 - abssp f1, #3.0 - abseqe f4, f5 - - rnds f1, f2 - rndd f3, f4 - rndeqez f6, #4.0 - - sqts f5, f5 - sqtdp f6, f6 - sqtplez f7, f6 - - logs f0, #10 - loge f0, #0f10 - lognedz f0, f1 - - lgne f1, f2 - lgndz f1, f3 - lgnvcs f3, f4 - - exps f1, f3 - expem f3, #10.0 - exppld f6, f7 - - sind f0, f1 - sinsm f1, f2 - singte f4, #5 - - cosd f1, f3 - cosem f4, f5 - cosnedp f6, f1 - - tane f1, f5 - tansz f4, f7 - tangedz f1, #4.0 - - asne f4, f5 - asnsp f6, #5e-1 - asnmidz f5, f5 - - acss f5, f6 - acsd f6, f0 - acshsem f1, #0.05e1 - - atne f0, f5 - atnsz f1, #5 - atnltd f3, f2 - - urde f5, f4 - nrme f6, f5 - nrmpldz f7, f5 - - fltsp f0, r8 - flte f1, r0 - flteqdz f5, r7 - - fix r0, f1 - fixz r1, f7 - fixcsm r5, f5 - - wfc r0 - wfs r1 - rfseq r2 - rfc r4 - - cmf f0, #1 - cmf f1, f2 - cmfeq f0, f1 - - cnf f0, #3 - cnf f1, #0.5 - cnfvs f3, f4 - - cmfe f0, f1 - cmfeeq f1, f2 - cmfeqe f3, #5.0 - - cnfe f1, f3 - cnfeeq f3, f4 - cnfeqe f4, f7 - cnfale f4, #5.0 - - lfm f0, 4, [r0] - lfm f0, 4, [r0, #0] - lfm f1, 4, [r1, #64] - sfm f2, 4, [r14, #1020]! - sfmeq f7, 3, [r8], #-1020 - - lfmfd f6, 2, [r15] - sfmea f7, 1, [r8]! - lfmeqea f5, 4, [r6] - sfmnefd f4, 3, [r2] - sfmnefd f4, 3, [r2]! diff --git a/gas/testsuite/gas/arm/fpa-dyadic.d b/gas/testsuite/gas/arm/fpa-dyadic.d deleted file mode 100644 index 1eebe91da6..0000000000 --- a/gas/testsuite/gas/arm/fpa-dyadic.d +++ /dev/null @@ -1,166 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: FPA Dyadic instructions -#as: -mfpe-old - -# Test FPA Dyadic instructions -# This test should work for both big and little-endian assembly. - -.*: *file format .*arm.* - -Disassembly of section .text: -0+000 <[^>]*> ee000100 ? adfs f0, f0, f0 -0+004 <[^>]*> ee000120 ? adfsp f0, f0, f0 -0+008 <[^>]*> ee000140 ? adfsm f0, f0, f0 -0+00c <[^>]*> ee000160 ? adfsz f0, f0, f0 -0+010 <[^>]*> ee000180 ? adfd f0, f0, f0 -0+014 <[^>]*> ee0001a0 ? adfdp f0, f0, f0 -0+018 <[^>]*> ee0001c0 ? adfdm f0, f0, f0 -0+01c <[^>]*> ee0001e0 ? adfdz f0, f0, f0 -0+020 <[^>]*> ee080100 ? adfe f0, f0, f0 -0+024 <[^>]*> ee080120 ? adfep f0, f0, f0 -0+028 <[^>]*> ee080140 ? adfem f0, f0, f0 -0+02c <[^>]*> ee080160 ? adfez f0, f0, f0 -0+030 <[^>]*> ee200100 ? sufs f0, f0, f0 -0+034 <[^>]*> ee200120 ? sufsp f0, f0, f0 -0+038 <[^>]*> ee200140 ? sufsm f0, f0, f0 -0+03c <[^>]*> ee200160 ? sufsz f0, f0, f0 -0+040 <[^>]*> ee200180 ? sufd f0, f0, f0 -0+044 <[^>]*> ee2001a0 ? sufdp f0, f0, f0 -0+048 <[^>]*> ee2001c0 ? sufdm f0, f0, f0 -0+04c <[^>]*> ee2001e0 ? sufdz f0, f0, f0 -0+050 <[^>]*> ee280100 ? sufe f0, f0, f0 -0+054 <[^>]*> ee280120 ? sufep f0, f0, f0 -0+058 <[^>]*> ee280140 ? sufem f0, f0, f0 -0+05c <[^>]*> ee280160 ? sufez f0, f0, f0 -0+060 <[^>]*> ee300100 ? rsfs f0, f0, f0 -0+064 <[^>]*> ee300120 ? rsfsp f0, f0, f0 -0+068 <[^>]*> ee300140 ? rsfsm f0, f0, f0 -0+06c <[^>]*> ee300160 ? rsfsz f0, f0, f0 -0+070 <[^>]*> ee300180 ? rsfd f0, f0, f0 -0+074 <[^>]*> ee3001a0 ? rsfdp f0, f0, f0 -0+078 <[^>]*> ee3001c0 ? rsfdm f0, f0, f0 -0+07c <[^>]*> ee3001e0 ? rsfdz f0, f0, f0 -0+080 <[^>]*> ee380100 ? rsfe f0, f0, f0 -0+084 <[^>]*> ee380120 ? rsfep f0, f0, f0 -0+088 <[^>]*> ee380140 ? rsfem f0, f0, f0 -0+08c <[^>]*> ee380160 ? rsfez f0, f0, f0 -0+090 <[^>]*> ee100100 ? mufs f0, f0, f0 -0+094 <[^>]*> ee100120 ? mufsp f0, f0, f0 -0+098 <[^>]*> ee100140 ? mufsm f0, f0, f0 -0+09c <[^>]*> ee100160 ? mufsz f0, f0, f0 -0+0a0 <[^>]*> ee100180 ? mufd f0, f0, f0 -0+0a4 <[^>]*> ee1001a0 ? mufdp f0, f0, f0 -0+0a8 <[^>]*> ee1001c0 ? mufdm f0, f0, f0 -0+0ac <[^>]*> ee1001e0 ? mufdz f0, f0, f0 -0+0b0 <[^>]*> ee180100 ? mufe f0, f0, f0 -0+0b4 <[^>]*> ee180120 ? mufep f0, f0, f0 -0+0b8 <[^>]*> ee180140 ? mufem f0, f0, f0 -0+0bc <[^>]*> ee180160 ? mufez f0, f0, f0 -0+0c0 <[^>]*> ee400100 ? dvfs f0, f0, f0 -0+0c4 <[^>]*> ee400120 ? dvfsp f0, f0, f0 -0+0c8 <[^>]*> ee400140 ? dvfsm f0, f0, f0 -0+0cc <[^>]*> ee400160 ? dvfsz f0, f0, f0 -0+0d0 <[^>]*> ee400180 ? dvfd f0, f0, f0 -0+0d4 <[^>]*> ee4001a0 ? dvfdp f0, f0, f0 -0+0d8 <[^>]*> ee4001c0 ? dvfdm f0, f0, f0 -0+0dc <[^>]*> ee4001e0 ? dvfdz f0, f0, f0 -0+0e0 <[^>]*> ee480100 ? dvfe f0, f0, f0 -0+0e4 <[^>]*> ee480120 ? dvfep f0, f0, f0 -0+0e8 <[^>]*> ee480140 ? dvfem f0, f0, f0 -0+0ec <[^>]*> ee480160 ? dvfez f0, f0, f0 -0+0f0 <[^>]*> ee500100 ? rdfs f0, f0, f0 -0+0f4 <[^>]*> ee500120 ? rdfsp f0, f0, f0 -0+0f8 <[^>]*> ee500140 ? rdfsm f0, f0, f0 -0+0fc <[^>]*> ee500160 ? rdfsz f0, f0, f0 -0+100 <[^>]*> ee500180 ? rdfd f0, f0, f0 -0+104 <[^>]*> ee5001a0 ? rdfdp f0, f0, f0 -0+108 <[^>]*> ee5001c0 ? rdfdm f0, f0, f0 -0+10c <[^>]*> ee5001e0 ? rdfdz f0, f0, f0 -0+110 <[^>]*> ee580100 ? rdfe f0, f0, f0 -0+114 <[^>]*> ee580120 ? rdfep f0, f0, f0 -0+118 <[^>]*> ee580140 ? rdfem f0, f0, f0 -0+11c <[^>]*> ee580160 ? rdfez f0, f0, f0 -0+120 <[^>]*> ee600100 ? pows f0, f0, f0 -0+124 <[^>]*> ee600120 ? powsp f0, f0, f0 -0+128 <[^>]*> ee600140 ? powsm f0, f0, f0 -0+12c <[^>]*> ee600160 ? powsz f0, f0, f0 -0+130 <[^>]*> ee600180 ? powd f0, f0, f0 -0+134 <[^>]*> ee6001a0 ? powdp f0, f0, f0 -0+138 <[^>]*> ee6001c0 ? powdm f0, f0, f0 -0+13c <[^>]*> ee6001e0 ? powdz f0, f0, f0 -0+140 <[^>]*> ee680100 ? powe f0, f0, f0 -0+144 <[^>]*> ee680120 ? powep f0, f0, f0 -0+148 <[^>]*> ee680140 ? powem f0, f0, f0 -0+14c <[^>]*> ee680160 ? powez f0, f0, f0 -0+150 <[^>]*> ee700100 ? rpws f0, f0, f0 -0+154 <[^>]*> ee700120 ? rpwsp f0, f0, f0 -0+158 <[^>]*> ee700140 ? rpwsm f0, f0, f0 -0+15c <[^>]*> ee700160 ? rpwsz f0, f0, f0 -0+160 <[^>]*> ee700180 ? rpwd f0, f0, f0 -0+164 <[^>]*> ee7001a0 ? rpwdp f0, f0, f0 -0+168 <[^>]*> ee7001c0 ? rpwdm f0, f0, f0 -0+16c <[^>]*> ee7001e0 ? rpwdz f0, f0, f0 -0+170 <[^>]*> ee780100 ? rpwe f0, f0, f0 -0+174 <[^>]*> ee780120 ? rpwep f0, f0, f0 -0+178 <[^>]*> ee780140 ? rpwem f0, f0, f0 -0+17c <[^>]*> ee780160 ? rpwez f0, f0, f0 -0+180 <[^>]*> ee800100 ? rmfs f0, f0, f0 -0+184 <[^>]*> ee800120 ? rmfsp f0, f0, f0 -0+188 <[^>]*> ee800140 ? rmfsm f0, f0, f0 -0+18c <[^>]*> ee800160 ? rmfsz f0, f0, f0 -0+190 <[^>]*> ee800180 ? rmfd f0, f0, f0 -0+194 <[^>]*> ee8001a0 ? rmfdp f0, f0, f0 -0+198 <[^>]*> ee8001c0 ? rmfdm f0, f0, f0 -0+19c <[^>]*> ee8001e0 ? rmfdz f0, f0, f0 -0+1a0 <[^>]*> ee880100 ? rmfe f0, f0, f0 -0+1a4 <[^>]*> ee880120 ? rmfep f0, f0, f0 -0+1a8 <[^>]*> ee880140 ? rmfem f0, f0, f0 -0+1ac <[^>]*> ee880160 ? rmfez f0, f0, f0 -0+1b0 <[^>]*> ee900100 ? fmls f0, f0, f0 -0+1b4 <[^>]*> ee900120 ? fmlsp f0, f0, f0 -0+1b8 <[^>]*> ee900140 ? fmlsm f0, f0, f0 -0+1bc <[^>]*> ee900160 ? fmlsz f0, f0, f0 -0+1c0 <[^>]*> ee900180 ? fmld f0, f0, f0 -0+1c4 <[^>]*> ee9001a0 ? fmldp f0, f0, f0 -0+1c8 <[^>]*> ee9001c0 ? fmldm f0, f0, f0 -0+1cc <[^>]*> ee9001e0 ? fmldz f0, f0, f0 -0+1d0 <[^>]*> ee980100 ? fmle f0, f0, f0 -0+1d4 <[^>]*> ee980120 ? fmlep f0, f0, f0 -0+1d8 <[^>]*> ee980140 ? fmlem f0, f0, f0 -0+1dc <[^>]*> ee980160 ? fmlez f0, f0, f0 -0+1e0 <[^>]*> eea00100 ? fdvs f0, f0, f0 -0+1e4 <[^>]*> eea00120 ? fdvsp f0, f0, f0 -0+1e8 <[^>]*> eea00140 ? fdvsm f0, f0, f0 -0+1ec <[^>]*> eea00160 ? fdvsz f0, f0, f0 -0+1f0 <[^>]*> eea00180 ? fdvd f0, f0, f0 -0+1f4 <[^>]*> eea001a0 ? fdvdp f0, f0, f0 -0+1f8 <[^>]*> eea001c0 ? fdvdm f0, f0, f0 -0+1fc <[^>]*> eea001e0 ? fdvdz f0, f0, f0 -0+200 <[^>]*> eea80100 ? fdve f0, f0, f0 -0+204 <[^>]*> eea80120 ? fdvep f0, f0, f0 -0+208 <[^>]*> eea80140 ? fdvem f0, f0, f0 -0+20c <[^>]*> eea80160 ? fdvez f0, f0, f0 -0+210 <[^>]*> eeb00100 ? frds f0, f0, f0 -0+214 <[^>]*> eeb00120 ? frdsp f0, f0, f0 -0+218 <[^>]*> eeb00140 ? frdsm f0, f0, f0 -0+21c <[^>]*> eeb00160 ? frdsz f0, f0, f0 -0+220 <[^>]*> eeb00180 ? frdd f0, f0, f0 -0+224 <[^>]*> eeb001a0 ? frddp f0, f0, f0 -0+228 <[^>]*> eeb001c0 ? frddm f0, f0, f0 -0+22c <[^>]*> eeb001e0 ? frddz f0, f0, f0 -0+230 <[^>]*> eeb80100 ? frde f0, f0, f0 -0+234 <[^>]*> eeb80120 ? frdep f0, f0, f0 -0+238 <[^>]*> eeb80140 ? frdem f0, f0, f0 -0+23c <[^>]*> eeb80160 ? frdez f0, f0, f0 -0+240 <[^>]*> eec00100 ? pols f0, f0, f0 -0+244 <[^>]*> eec00120 ? polsp f0, f0, f0 -0+248 <[^>]*> eec00140 ? polsm f0, f0, f0 -0+24c <[^>]*> eec00160 ? polsz f0, f0, f0 -0+250 <[^>]*> eec00180 ? pold f0, f0, f0 -0+254 <[^>]*> eec001a0 ? poldp f0, f0, f0 -0+258 <[^>]*> eec001c0 ? poldm f0, f0, f0 -0+25c <[^>]*> eec001e0 ? poldz f0, f0, f0 -0+260 <[^>]*> eec80100 ? pole f0, f0, f0 -0+264 <[^>]*> eec80120 ? polep f0, f0, f0 -0+268 <[^>]*> eec80140 ? polem f0, f0, f0 -0+26c <[^>]*> eec80160 ? polez f0, f0, f0 diff --git a/gas/testsuite/gas/arm/fpa-dyadic.s b/gas/testsuite/gas/arm/fpa-dyadic.s deleted file mode 100644 index aebcd2b9c2..0000000000 --- a/gas/testsuite/gas/arm/fpa-dyadic.s +++ /dev/null @@ -1,172 +0,0 @@ - .text - .globl F -F: - adfs f0, f0, f0 - adfsp f0, f0, f0 - adfsm f0, f0, f0 - adfsz f0, f0, f0 - adfd f0, f0, f0 - adfdp f0, f0, f0 - adfdm f0, f0, f0 - adfdz f0, f0, f0 - adfe f0, f0, f0 - adfep f0, f0, f0 - adfem f0, f0, f0 - adfez f0, f0, f0 - - sufs f0, f0, f0 - sufsp f0, f0, f0 - sufsm f0, f0, f0 - sufsz f0, f0, f0 - sufd f0, f0, f0 - sufdp f0, f0, f0 - sufdm f0, f0, f0 - sufdz f0, f0, f0 - sufe f0, f0, f0 - sufep f0, f0, f0 - sufem f0, f0, f0 - sufez f0, f0, f0 - - rsfs f0, f0, f0 - rsfsp f0, f0, f0 - rsfsm f0, f0, f0 - rsfsz f0, f0, f0 - rsfd f0, f0, f0 - rsfdp f0, f0, f0 - rsfdm f0, f0, f0 - rsfdz f0, f0, f0 - rsfe f0, f0, f0 - rsfep f0, f0, f0 - rsfem f0, f0, f0 - rsfez f0, f0, f0 - - mufs f0, f0, f0 - mufsp f0, f0, f0 - mufsm f0, f0, f0 - mufsz f0, f0, f0 - mufd f0, f0, f0 - mufdp f0, f0, f0 - mufdm f0, f0, f0 - mufdz f0, f0, f0 - mufe f0, f0, f0 - mufep f0, f0, f0 - mufem f0, f0, f0 - mufez f0, f0, f0 - - dvfs f0, f0, f0 - dvfsp f0, f0, f0 - dvfsm f0, f0, f0 - dvfsz f0, f0, f0 - dvfd f0, f0, f0 - dvfdp f0, f0, f0 - dvfdm f0, f0, f0 - dvfdz f0, f0, f0 - dvfe f0, f0, f0 - dvfep f0, f0, f0 - dvfem f0, f0, f0 - dvfez f0, f0, f0 - - rdfs f0, f0, f0 - rdfsp f0, f0, f0 - rdfsm f0, f0, f0 - rdfsz f0, f0, f0 - rdfd f0, f0, f0 - rdfdp f0, f0, f0 - rdfdm f0, f0, f0 - rdfdz f0, f0, f0 - rdfe f0, f0, f0 - rdfep f0, f0, f0 - rdfem f0, f0, f0 - rdfez f0, f0, f0 - - pows f0, f0, f0 - powsp f0, f0, f0 - powsm f0, f0, f0 - powsz f0, f0, f0 - powd f0, f0, f0 - powdp f0, f0, f0 - powdm f0, f0, f0 - powdz f0, f0, f0 - powe f0, f0, f0 - powep f0, f0, f0 - powem f0, f0, f0 - powez f0, f0, f0 - - rpws f0, f0, f0 - rpwsp f0, f0, f0 - rpwsm f0, f0, f0 - rpwsz f0, f0, f0 - rpwd f0, f0, f0 - rpwdp f0, f0, f0 - rpwdm f0, f0, f0 - rpwdz f0, f0, f0 - rpwe f0, f0, f0 - rpwep f0, f0, f0 - rpwem f0, f0, f0 - rpwez f0, f0, f0 - - rmfs f0, f0, f0 - rmfsp f0, f0, f0 - rmfsm f0, f0, f0 - rmfsz f0, f0, f0 - rmfd f0, f0, f0 - rmfdp f0, f0, f0 - rmfdm f0, f0, f0 - rmfdz f0, f0, f0 - rmfe f0, f0, f0 - rmfep f0, f0, f0 - rmfem f0, f0, f0 - rmfez f0, f0, f0 - - fmls f0, f0, f0 - fmlsp f0, f0, f0 - fmlsm f0, f0, f0 - fmlsz f0, f0, f0 - fmld f0, f0, f0 - fmldp f0, f0, f0 - fmldm f0, f0, f0 - fmldz f0, f0, f0 - fmle f0, f0, f0 - fmlep f0, f0, f0 - fmlem f0, f0, f0 - fmlez f0, f0, f0 - - fdvs f0, f0, f0 - fdvsp f0, f0, f0 - fdvsm f0, f0, f0 - fdvsz f0, f0, f0 - fdvd f0, f0, f0 - fdvdp f0, f0, f0 - fdvdm f0, f0, f0 - fdvdz f0, f0, f0 - fdve f0, f0, f0 - fdvep f0, f0, f0 - fdvem f0, f0, f0 - fdvez f0, f0, f0 - - frds f0, f0, f0 - frdsp f0, f0, f0 - frdsm f0, f0, f0 - frdsz f0, f0, f0 - frdd f0, f0, f0 - frddp f0, f0, f0 - frddm f0, f0, f0 - frddz f0, f0, f0 - frde f0, f0, f0 - frdep f0, f0, f0 - frdem f0, f0, f0 - frdez f0, f0, f0 - - pols f0, f0, f0 - polsp f0, f0, f0 - polsm f0, f0, f0 - polsz f0, f0, f0 - pold f0, f0, f0 - poldp f0, f0, f0 - poldm f0, f0, f0 - poldz f0, f0, f0 - pole f0, f0, f0 - polep f0, f0, f0 - polem f0, f0, f0 - polez f0, f0, f0 - diff --git a/gas/testsuite/gas/arm/fpa-mem.d b/gas/testsuite/gas/arm/fpa-mem.d deleted file mode 100644 index 68f4541f12..0000000000 --- a/gas/testsuite/gas/arm/fpa-mem.d +++ /dev/null @@ -1,32 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: FPA memory insructions -#as: -mfpa10 - -# Test FPA memory instructions -# This test should work for both big and little-endian assembly. - -.*: *file format .*arm.* - -Disassembly of section .text: -0+00 <[^>]*> ed900100 ? ldfs f0, \[r0\] -0+04 <[^>]*> ec300101 ? ldfs f0, \[r0\], -#4 -0+08 <[^>]*> ed908100 ? ldfd f0, \[r0\] -0+0c <[^>]*> ec308101 ? ldfd f0, \[r0\], -#4 -0+10 <[^>]*> edd00100 ? ldfe f0, \[r0\] -0+14 <[^>]*> ec700101 ? ldfe f0, \[r0\], -#4 -0+18 <[^>]*> edd08100 ? ldfp f0, \[r0\] -0+1c <[^>]*> ec708101 ? ldfp f0, \[r0\], -#4 -0+20 <[^>]*> ed800100 ? stfs f0, \[r0\] -0+24 <[^>]*> ec200101 ? stfs f0, \[r0\], -#4 -0+28 <[^>]*> ed808100 ? stfd f0, \[r0\] -0+2c <[^>]*> ec208101 ? stfd f0, \[r0\], -#4 -0+30 <[^>]*> edc00100 ? stfe f0, \[r0\] -0+34 <[^>]*> ec600101 ? stfe f0, \[r0\], -#4 -0+38 <[^>]*> edc08100 ? stfp f0, \[r0\] -0+3c <[^>]*> ec608101 ? stfp f0, \[r0\], -#4 -0+40 <[^>]*> ed900200 ? lfm f0, 4, \[r0\] -0+44 <[^>]*> ed900200 ? lfm f0, 4, \[r0\] -0+48 <[^>]*> ed10020c ? lfm f0, 4, \[r0, -#48\] -0+4c <[^>]*> ed800200 ? sfm f0, 4, \[r0\] -0+50 <[^>]*> ed00020c ? sfm f0, 4, \[r0, -#48\] -0+54 <[^>]*> ed800200 ? sfm f0, 4, \[r0\] diff --git a/gas/testsuite/gas/arm/fpa-mem.s b/gas/testsuite/gas/arm/fpa-mem.s deleted file mode 100644 index eb66fdb917..0000000000 --- a/gas/testsuite/gas/arm/fpa-mem.s +++ /dev/null @@ -1,26 +0,0 @@ - .text - .globl F -F: - ldfs f0, [r0] - ldfs f0, [r0], #-4 - ldfd f0, [r0] - ldfd f0, [r0], #-4 - ldfe f0, [r0] - ldfe f0, [r0], #-4 - ldfp f0, [r0] - ldfp f0, [r0], #-4 - - stfs f0, [r0] - stfs f0, [r0], #-4 - stfd f0, [r0] - stfd f0, [r0], #-4 - stfe f0, [r0] - stfe f0, [r0], #-4 - stfp f0, [r0] - stfp f0, [r0], #-4 - lfm f0, 4, [r0] - lfmfd f0, 4, [r0] - lfmea f0, 4, [r0] - sfm f0, 4, [r0] - sfmfd f0, 4, [r0] - sfmea f0, 4, [r0] diff --git a/gas/testsuite/gas/arm/fpa-monadic.d b/gas/testsuite/gas/arm/fpa-monadic.d deleted file mode 100644 index 9bb1d248f5..0000000000 --- a/gas/testsuite/gas/arm/fpa-monadic.d +++ /dev/null @@ -1,202 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: FPA Monadic instructions -#as: -mfpe-old - -# Test FPA Monadic instructions -# This test should work for both big and little-endian assembly. - -.*: *file format .*arm.* - -Disassembly of section .text: -0+000 <[^>]*> ee008100 ? mvfs f0, f0 -0+004 <[^>]*> ee008120 ? mvfsp f0, f0 -0+008 <[^>]*> ee008140 ? mvfsm f0, f0 -0+00c <[^>]*> ee008160 ? mvfsz f0, f0 -0+010 <[^>]*> ee008180 ? mvfd f0, f0 -0+014 <[^>]*> ee0081a0 ? mvfdp f0, f0 -0+018 <[^>]*> ee0081c0 ? mvfdm f0, f0 -0+01c <[^>]*> ee0081e0 ? mvfdz f0, f0 -0+020 <[^>]*> ee088100 ? mvfe f0, f0 -0+024 <[^>]*> ee088120 ? mvfep f0, f0 -0+028 <[^>]*> ee088140 ? mvfem f0, f0 -0+02c <[^>]*> ee088160 ? mvfez f0, f0 -0+030 <[^>]*> ee108100 ? mnfs f0, f0 -0+034 <[^>]*> ee108120 ? mnfsp f0, f0 -0+038 <[^>]*> ee108140 ? mnfsm f0, f0 -0+03c <[^>]*> ee108160 ? mnfsz f0, f0 -0+040 <[^>]*> ee108180 ? mnfd f0, f0 -0+044 <[^>]*> ee1081a0 ? mnfdp f0, f0 -0+048 <[^>]*> ee1081c0 ? mnfdm f0, f0 -0+04c <[^>]*> ee1081e0 ? mnfdz f0, f0 -0+050 <[^>]*> ee188100 ? mnfe f0, f0 -0+054 <[^>]*> ee188120 ? mnfep f0, f0 -0+058 <[^>]*> ee188140 ? mnfem f0, f0 -0+05c <[^>]*> ee188160 ? mnfez f0, f0 -0+060 <[^>]*> ee208100 ? abss f0, f0 -0+064 <[^>]*> ee208120 ? abssp f0, f0 -0+068 <[^>]*> ee208140 ? abssm f0, f0 -0+06c <[^>]*> ee208160 ? abssz f0, f0 -0+070 <[^>]*> ee208180 ? absd f0, f0 -0+074 <[^>]*> ee2081a0 ? absdp f0, f0 -0+078 <[^>]*> ee2081c0 ? absdm f0, f0 -0+07c <[^>]*> ee2081e0 ? absdz f0, f0 -0+080 <[^>]*> ee288100 ? abse f0, f0 -0+084 <[^>]*> ee288120 ? absep f0, f0 -0+088 <[^>]*> ee288140 ? absem f0, f0 -0+08c <[^>]*> ee288160 ? absez f0, f0 -0+090 <[^>]*> ee308100 ? rnds f0, f0 -0+094 <[^>]*> ee308120 ? rndsp f0, f0 -0+098 <[^>]*> ee308140 ? rndsm f0, f0 -0+09c <[^>]*> ee308160 ? rndsz f0, f0 -0+0a0 <[^>]*> ee308180 ? rndd f0, f0 -0+0a4 <[^>]*> ee3081a0 ? rnddp f0, f0 -0+0a8 <[^>]*> ee3081c0 ? rnddm f0, f0 -0+0ac <[^>]*> ee3081e0 ? rnddz f0, f0 -0+0b0 <[^>]*> ee388100 ? rnde f0, f0 -0+0b4 <[^>]*> ee388120 ? rndep f0, f0 -0+0b8 <[^>]*> ee388140 ? rndem f0, f0 -0+0bc <[^>]*> ee388160 ? rndez f0, f0 -0+0c0 <[^>]*> ee408100 ? sqts f0, f0 -0+0c4 <[^>]*> ee408120 ? sqtsp f0, f0 -0+0c8 <[^>]*> ee408140 ? sqtsm f0, f0 -0+0cc <[^>]*> ee408160 ? sqtsz f0, f0 -0+0d0 <[^>]*> ee408180 ? sqtd f0, f0 -0+0d4 <[^>]*> ee4081a0 ? sqtdp f0, f0 -0+0d8 <[^>]*> ee4081c0 ? sqtdm f0, f0 -0+0dc <[^>]*> ee4081e0 ? sqtdz f0, f0 -0+0e0 <[^>]*> ee488100 ? sqte f0, f0 -0+0e4 <[^>]*> ee488120 ? sqtep f0, f0 -0+0e8 <[^>]*> ee488140 ? sqtem f0, f0 -0+0ec <[^>]*> ee488160 ? sqtez f0, f0 -0+0f0 <[^>]*> ee508100 ? logs f0, f0 -0+0f4 <[^>]*> ee508120 ? logsp f0, f0 -0+0f8 <[^>]*> ee508140 ? logsm f0, f0 -0+0fc <[^>]*> ee508160 ? logsz f0, f0 -0+100 <[^>]*> ee508180 ? logd f0, f0 -0+104 <[^>]*> ee5081a0 ? logdp f0, f0 -0+108 <[^>]*> ee5081c0 ? logdm f0, f0 -0+10c <[^>]*> ee5081e0 ? logdz f0, f0 -0+110 <[^>]*> ee588100 ? loge f0, f0 -0+114 <[^>]*> ee588120 ? logep f0, f0 -0+118 <[^>]*> ee588140 ? logem f0, f0 -0+11c <[^>]*> ee588160 ? logez f0, f0 -0+120 <[^>]*> ee608100 ? lgns f0, f0 -0+124 <[^>]*> ee608120 ? lgnsp f0, f0 -0+128 <[^>]*> ee608140 ? lgnsm f0, f0 -0+12c <[^>]*> ee608160 ? lgnsz f0, f0 -0+130 <[^>]*> ee608180 ? lgnd f0, f0 -0+134 <[^>]*> ee6081a0 ? lgndp f0, f0 -0+138 <[^>]*> ee6081c0 ? lgndm f0, f0 -0+13c <[^>]*> ee6081e0 ? lgndz f0, f0 -0+140 <[^>]*> ee688100 ? lgne f0, f0 -0+144 <[^>]*> ee688120 ? lgnep f0, f0 -0+148 <[^>]*> ee688140 ? lgnem f0, f0 -0+14c <[^>]*> ee688160 ? lgnez f0, f0 -0+150 <[^>]*> ee708100 ? exps f0, f0 -0+154 <[^>]*> ee708120 ? expsp f0, f0 -0+158 <[^>]*> ee708140 ? expsm f0, f0 -0+15c <[^>]*> ee708160 ? expsz f0, f0 -0+160 <[^>]*> ee708180 ? expd f0, f0 -0+164 <[^>]*> ee7081a0 ? expdp f0, f0 -0+168 <[^>]*> ee7081c0 ? expdm f0, f0 -0+16c <[^>]*> ee7081e0 ? expdz f0, f0 -0+170 <[^>]*> ee788100 ? expe f0, f0 -0+174 <[^>]*> ee788120 ? expep f0, f0 -0+178 <[^>]*> ee788140 ? expem f0, f0 -0+17c <[^>]*> ee7081e0 ? expdz f0, f0 -0+180 <[^>]*> ee808100 ? sins f0, f0 -0+184 <[^>]*> ee808120 ? sinsp f0, f0 -0+188 <[^>]*> ee808140 ? sinsm f0, f0 -0+18c <[^>]*> ee808160 ? sinsz f0, f0 -0+190 <[^>]*> ee808180 ? sind f0, f0 -0+194 <[^>]*> ee8081a0 ? sindp f0, f0 -0+198 <[^>]*> ee8081c0 ? sindm f0, f0 -0+19c <[^>]*> ee8081e0 ? sindz f0, f0 -0+1a0 <[^>]*> ee888100 ? sine f0, f0 -0+1a4 <[^>]*> ee888120 ? sinep f0, f0 -0+1a8 <[^>]*> ee888140 ? sinem f0, f0 -0+1ac <[^>]*> ee888160 ? sinez f0, f0 -0+1b0 <[^>]*> ee908100 ? coss f0, f0 -0+1b4 <[^>]*> ee908120 ? cossp f0, f0 -0+1b8 <[^>]*> ee908140 ? cossm f0, f0 -0+1bc <[^>]*> ee908160 ? cossz f0, f0 -0+1c0 <[^>]*> ee908180 ? cosd f0, f0 -0+1c4 <[^>]*> ee9081a0 ? cosdp f0, f0 -0+1c8 <[^>]*> ee9081c0 ? cosdm f0, f0 -0+1cc <[^>]*> ee9081e0 ? cosdz f0, f0 -0+1d0 <[^>]*> ee988100 ? cose f0, f0 -0+1d4 <[^>]*> ee988120 ? cosep f0, f0 -0+1d8 <[^>]*> ee988140 ? cosem f0, f0 -0+1dc <[^>]*> ee988160 ? cosez f0, f0 -0+1e0 <[^>]*> eea08100 ? tans f0, f0 -0+1e4 <[^>]*> eea08120 ? tansp f0, f0 -0+1e8 <[^>]*> eea08140 ? tansm f0, f0 -0+1ec <[^>]*> eea08160 ? tansz f0, f0 -0+1f0 <[^>]*> eea08180 ? tand f0, f0 -0+1f4 <[^>]*> eea081a0 ? tandp f0, f0 -0+1f8 <[^>]*> eea081c0 ? tandm f0, f0 -0+1fc <[^>]*> eea081e0 ? tandz f0, f0 -0+200 <[^>]*> eea88100 ? tane f0, f0 -0+204 <[^>]*> eea88120 ? tanep f0, f0 -0+208 <[^>]*> eea88140 ? tanem f0, f0 -0+20c <[^>]*> eea88160 ? tanez f0, f0 -0+210 <[^>]*> eeb08100 ? asns f0, f0 -0+214 <[^>]*> eeb08120 ? asnsp f0, f0 -0+218 <[^>]*> eeb08140 ? asnsm f0, f0 -0+21c <[^>]*> eeb08160 ? asnsz f0, f0 -0+220 <[^>]*> eeb08180 ? asnd f0, f0 -0+224 <[^>]*> eeb081a0 ? asndp f0, f0 -0+228 <[^>]*> eeb081c0 ? asndm f0, f0 -0+22c <[^>]*> eeb081e0 ? asndz f0, f0 -0+230 <[^>]*> eeb88100 ? asne f0, f0 -0+234 <[^>]*> eeb88120 ? asnep f0, f0 -0+238 <[^>]*> eeb88140 ? asnem f0, f0 -0+23c <[^>]*> eeb88160 ? asnez f0, f0 -0+240 <[^>]*> eec08100 ? acss f0, f0 -0+244 <[^>]*> eec08120 ? acssp f0, f0 -0+248 <[^>]*> eec08140 ? acssm f0, f0 -0+24c <[^>]*> eec08160 ? acssz f0, f0 -0+250 <[^>]*> eec08180 ? acsd f0, f0 -0+254 <[^>]*> eec081a0 ? acsdp f0, f0 -0+258 <[^>]*> eec081c0 ? acsdm f0, f0 -0+25c <[^>]*> eec081e0 ? acsdz f0, f0 -0+260 <[^>]*> eec88100 ? acse f0, f0 -0+264 <[^>]*> eec88120 ? acsep f0, f0 -0+268 <[^>]*> eec88140 ? acsem f0, f0 -0+26c <[^>]*> eec88160 ? acsez f0, f0 -0+270 <[^>]*> eed08100 ? atns f0, f0 -0+274 <[^>]*> eed08120 ? atnsp f0, f0 -0+278 <[^>]*> eed08140 ? atnsm f0, f0 -0+27c <[^>]*> eed08160 ? atnsz f0, f0 -0+280 <[^>]*> eed08180 ? atnd f0, f0 -0+284 <[^>]*> eed081a0 ? atndp f0, f0 -0+288 <[^>]*> eed081c0 ? atndm f0, f0 -0+28c <[^>]*> eed081e0 ? atndz f0, f0 -0+290 <[^>]*> eed88100 ? atne f0, f0 -0+294 <[^>]*> eed88120 ? atnep f0, f0 -0+298 <[^>]*> eed88140 ? atnem f0, f0 -0+29c <[^>]*> eed88160 ? atnez f0, f0 -0+2a0 <[^>]*> eee08100 ? urds f0, f0 -0+2a4 <[^>]*> eee08120 ? urdsp f0, f0 -0+2a8 <[^>]*> eee08140 ? urdsm f0, f0 -0+2ac <[^>]*> eee08160 ? urdsz f0, f0 -0+2b0 <[^>]*> eee08180 ? urdd f0, f0 -0+2b4 <[^>]*> eee081a0 ? urddp f0, f0 -0+2b8 <[^>]*> eee081c0 ? urddm f0, f0 -0+2bc <[^>]*> eee081e0 ? urddz f0, f0 -0+2c0 <[^>]*> eee88100 ? urde f0, f0 -0+2c4 <[^>]*> eee88120 ? urdep f0, f0 -0+2c8 <[^>]*> eee88140 ? urdem f0, f0 -0+2cc <[^>]*> eee88160 ? urdez f0, f0 -0+2d0 <[^>]*> eef08100 ? nrms f0, f0 -0+2d4 <[^>]*> eef08120 ? nrmsp f0, f0 -0+2d8 <[^>]*> eef08140 ? nrmsm f0, f0 -0+2dc <[^>]*> eef08160 ? nrmsz f0, f0 -0+2e0 <[^>]*> eef08180 ? nrmd f0, f0 -0+2e4 <[^>]*> eef081a0 ? nrmdp f0, f0 -0+2e8 <[^>]*> eef081c0 ? nrmdm f0, f0 -0+2ec <[^>]*> eef081e0 ? nrmdz f0, f0 -0+2f0 <[^>]*> eef88100 ? nrme f0, f0 -0+2f4 <[^>]*> eef88120 ? nrmep f0, f0 -0+2f8 <[^>]*> eef88140 ? nrmem f0, f0 -0+2fc <[^>]*> eef88160 ? nrmez f0, f0 diff --git a/gas/testsuite/gas/arm/fpa-monadic.s b/gas/testsuite/gas/arm/fpa-monadic.s deleted file mode 100644 index 2af03f4ea0..0000000000 --- a/gas/testsuite/gas/arm/fpa-monadic.s +++ /dev/null @@ -1,210 +0,0 @@ - .text - .globl F -F: - mvfs f0, f0 - mvfsp f0, f0 - mvfsm f0, f0 - mvfsz f0, f0 - mvfd f0, f0 - mvfdp f0, f0 - mvfdm f0, f0 - mvfdz f0, f0 - mvfe f0, f0 - mvfep f0, f0 - mvfem f0, f0 - mvfez f0, f0 - - mnfs f0, f0 - mnfsp f0, f0 - mnfsm f0, f0 - mnfsz f0, f0 - mnfd f0, f0 - mnfdp f0, f0 - mnfdm f0, f0 - mnfdz f0, f0 - mnfe f0, f0 - mnfep f0, f0 - mnfem f0, f0 - mnfez f0, f0 - - abss f0, f0 - abssp f0, f0 - abssm f0, f0 - abssz f0, f0 - absd f0, f0 - absdp f0, f0 - absdm f0, f0 - absdz f0, f0 - abse f0, f0 - absep f0, f0 - absem f0, f0 - absez f0, f0 - - rnds f0, f0 - rndsp f0, f0 - rndsm f0, f0 - rndsz f0, f0 - rndd f0, f0 - rnddp f0, f0 - rnddm f0, f0 - rnddz f0, f0 - rnde f0, f0 - rndep f0, f0 - rndem f0, f0 - rndez f0, f0 - - sqts f0, f0 - sqtsp f0, f0 - sqtsm f0, f0 - sqtsz f0, f0 - sqtd f0, f0 - sqtdp f0, f0 - sqtdm f0, f0 - sqtdz f0, f0 - sqte f0, f0 - sqtep f0, f0 - sqtem f0, f0 - sqtez f0, f0 - - logs f0, f0 - logsp f0, f0 - logsm f0, f0 - logsz f0, f0 - logd f0, f0 - logdp f0, f0 - logdm f0, f0 - logdz f0, f0 - loge f0, f0 - logep f0, f0 - logem f0, f0 - logez f0, f0 - - lgns f0, f0 - lgnsp f0, f0 - lgnsm f0, f0 - lgnsz f0, f0 - lgnd f0, f0 - lgndp f0, f0 - lgndm f0, f0 - lgndz f0, f0 - lgne f0, f0 - lgnep f0, f0 - lgnem f0, f0 - lgnez f0, f0 - - exps f0, f0 - expsp f0, f0 - expsm f0, f0 - expsz f0, f0 - expd f0, f0 - expdp f0, f0 - expdm f0, f0 - expdz f0, f0 - expe f0, f0 - expep f0, f0 - expem f0, f0 - expdz f0, f0 - - sins f0, f0 - sinsp f0, f0 - sinsm f0, f0 - sinsz f0, f0 - sind f0, f0 - sindp f0, f0 - sindm f0, f0 - sindz f0, f0 - sine f0, f0 - sinep f0, f0 - sinem f0, f0 - sinez f0, f0 - - coss f0, f0 - cossp f0, f0 - cossm f0, f0 - cossz f0, f0 - cosd f0, f0 - cosdp f0, f0 - cosdm f0, f0 - cosdz f0, f0 - cose f0, f0 - cosep f0, f0 - cosem f0, f0 - cosez f0, f0 - - tans f0, f0 - tansp f0, f0 - tansm f0, f0 - tansz f0, f0 - tand f0, f0 - tandp f0, f0 - tandm f0, f0 - tandz f0, f0 - tane f0, f0 - tanep f0, f0 - tanem f0, f0 - tanez f0, f0 - - asns f0, f0 - asnsp f0, f0 - asnsm f0, f0 - asnsz f0, f0 - asnd f0, f0 - asndp f0, f0 - asndm f0, f0 - asndz f0, f0 - asne f0, f0 - asnep f0, f0 - asnem f0, f0 - asnez f0, f0 - - acss f0, f0 - acssp f0, f0 - acssm f0, f0 - acssz f0, f0 - acsd f0, f0 - acsdp f0, f0 - acsdm f0, f0 - acsdz f0, f0 - acse f0, f0 - acsep f0, f0 - acsem f0, f0 - acsez f0, f0 - - atns f0, f0 - atnsp f0, f0 - atnsm f0, f0 - atnsz f0, f0 - atnd f0, f0 - atndp f0, f0 - atndm f0, f0 - atndz f0, f0 - atne f0, f0 - atnep f0, f0 - atnem f0, f0 - atnez f0, f0 - - urds f0, f0 - urdsp f0, f0 - urdsm f0, f0 - urdsz f0, f0 - urdd f0, f0 - urddp f0, f0 - urddm f0, f0 - urddz f0, f0 - urde f0, f0 - urdep f0, f0 - urdem f0, f0 - urdez f0, f0 - - nrms f0, f0 - nrmsp f0, f0 - nrmsm f0, f0 - nrmsz f0, f0 - nrmd f0, f0 - nrmdp f0, f0 - nrmdm f0, f0 - nrmdz f0, f0 - nrme f0, f0 - nrmep f0, f0 - nrmem f0, f0 - nrmez f0, f0 diff --git a/gas/testsuite/gas/arm/immed.s b/gas/testsuite/gas/arm/immed.s deleted file mode 100644 index 5d2092be18..0000000000 --- a/gas/testsuite/gas/arm/immed.s +++ /dev/null @@ -1,11 +0,0 @@ -@ Tests for complex immediate expressions - none of these need -@ relocations - .text -bar: - mov r0, #0 - mov r0, #(. - bar - 8) - ldr r0, bar - ldr r0, [pc, # (bar - . -8)] - .space 4096 - mov r0, #(. - bar - 8) & 0xff - ldr r0, [pc, # (bar - . -8) & 0xff] diff --git a/gas/testsuite/gas/arm/inst.d b/gas/testsuite/gas/arm/inst.d deleted file mode 100644 index 1281e9caae..0000000000 --- a/gas/testsuite/gas/arm/inst.d +++ /dev/null @@ -1,201 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: ARM basic instructions -#as: -marm2 -EL - -# Test the standard ARM instructions: - -.*: +file format .*arm.* - -Disassembly of section .text: -0+000 <[^>]*> e3a00000 ? mov r0, #0 ; 0x0 -0+004 <[^>]*> e1a01002 ? mov r1, r2 -0+008 <[^>]*> e1a03184 ? mov r3, r4, lsl #3 -0+00c <[^>]*> e1a05736 ? mov r5, r6, lsr r7 -0+010 <[^>]*> e1a08a59 ? mov r8, r9, asr sl -0+014 <[^>]*> e1a0bd1c ? mov fp, ip, lsl sp -0+018 <[^>]*> e1a0e06f ? mov lr, pc, rrx -0+01c <[^>]*> e1a01002 ? mov r1, r2 -0+020 <[^>]*> 01a02003 ? moveq r2, r3 -0+024 <[^>]*> 11a04005 ? movne r4, r5 -0+028 <[^>]*> b1a06007 ? movlt r6, r7 -0+02c <[^>]*> a1a08009 ? movge r8, r9 -0+030 <[^>]*> d1a0a00b ? movle sl, fp -0+034 <[^>]*> c1a0c00d ? movgt ip, sp -0+038 <[^>]*> 31a01002 ? movcc r1, r2 -0+03c <[^>]*> 21a01003 ? movcs r1, r3 -0+040 <[^>]*> 41a03006 ? movmi r3, r6 -0+044 <[^>]*> 51a07009 ? movpl r7, r9 -0+048 <[^>]*> 61a01008 ? movvs r1, r8 -0+04c <[^>]*> 71a09fa1 ? movvc r9, r1, lsr #31 -0+050 <[^>]*> 81a0800f ? movhi r8, pc -0+054 <[^>]*> 91a0f00e ? movls pc, lr -0+058 <[^>]*> 21a09008 ? movcs r9, r8 -0+05c <[^>]*> 31a01003 ? movcc r1, r3 -0+060 <[^>]*> e1b00008 ? movs r0, r8 -0+064 <[^>]*> 31b00007 ? movccs r0, r7 -0+068 <[^>]*> e281000a ? add r0, r1, #10 ; 0xa -0+06c <[^>]*> e0832004 ? add r2, r3, r4 -0+070 <[^>]*> e0865287 ? add r5, r6, r7, lsl #5 -0+074 <[^>]*> e0821113 ? add r1, r2, r3, lsl r1 -0+078 <[^>]*> e201000a ? and r0, r1, #10 ; 0xa -0+07c <[^>]*> e0032004 ? and r2, r3, r4 -0+080 <[^>]*> e0065287 ? and r5, r6, r7, lsl #5 -0+084 <[^>]*> e0021113 ? and r1, r2, r3, lsl r1 -0+088 <[^>]*> e221000a ? eor r0, r1, #10 ; 0xa -0+08c <[^>]*> e0232004 ? eor r2, r3, r4 -0+090 <[^>]*> e0265287 ? eor r5, r6, r7, lsl #5 -0+094 <[^>]*> e0221113 ? eor r1, r2, r3, lsl r1 -0+098 <[^>]*> e241000a ? sub r0, r1, #10 ; 0xa -0+09c <[^>]*> e0432004 ? sub r2, r3, r4 -0+0a0 <[^>]*> e0465287 ? sub r5, r6, r7, lsl #5 -0+0a4 <[^>]*> e0421113 ? sub r1, r2, r3, lsl r1 -0+0a8 <[^>]*> e2a1000a ? adc r0, r1, #10 ; 0xa -0+0ac <[^>]*> e0a32004 ? adc r2, r3, r4 -0+0b0 <[^>]*> e0a65287 ? adc r5, r6, r7, lsl #5 -0+0b4 <[^>]*> e0a21113 ? adc r1, r2, r3, lsl r1 -0+0b8 <[^>]*> e2c1000a ? sbc r0, r1, #10 ; 0xa -0+0bc <[^>]*> e0c32004 ? sbc r2, r3, r4 -0+0c0 <[^>]*> e0c65287 ? sbc r5, r6, r7, lsl #5 -0+0c4 <[^>]*> e0c21113 ? sbc r1, r2, r3, lsl r1 -0+0c8 <[^>]*> e261000a ? rsb r0, r1, #10 ; 0xa -0+0cc <[^>]*> e0632004 ? rsb r2, r3, r4 -0+0d0 <[^>]*> e0665287 ? rsb r5, r6, r7, lsl #5 -0+0d4 <[^>]*> e0621113 ? rsb r1, r2, r3, lsl r1 -0+0d8 <[^>]*> e2e1000a ? rsc r0, r1, #10 ; 0xa -0+0dc <[^>]*> e0e32004 ? rsc r2, r3, r4 -0+0e0 <[^>]*> e0e65287 ? rsc r5, r6, r7, lsl #5 -0+0e4 <[^>]*> e0e21113 ? rsc r1, r2, r3, lsl r1 -0+0e8 <[^>]*> e381000a ? orr r0, r1, #10 ; 0xa -0+0ec <[^>]*> e1832004 ? orr r2, r3, r4 -0+0f0 <[^>]*> e1865287 ? orr r5, r6, r7, lsl #5 -0+0f4 <[^>]*> e1821113 ? orr r1, r2, r3, lsl r1 -0+0f8 <[^>]*> e3c1000a ? bic r0, r1, #10 ; 0xa -0+0fc <[^>]*> e1c32004 ? bic r2, r3, r4 -0+100 <[^>]*> e1c65287 ? bic r5, r6, r7, lsl #5 -0+104 <[^>]*> e1c21113 ? bic r1, r2, r3, lsl r1 -0+108 <[^>]*> e3e0000a ? mvn r0, #10 ; 0xa -0+10c <[^>]*> e1e02004 ? mvn r2, r4 -0+110 <[^>]*> e1e05287 ? mvn r5, r7, lsl #5 -0+114 <[^>]*> e1e01113 ? mvn r1, r3, lsl r1 -0+118 <[^>]*> e310000a ? tst r0, #10 ; 0xa -0+11c <[^>]*> e1120004 ? tst r2, r4 -0+120 <[^>]*> e1150287 ? tst r5, r7, lsl #5 -0+124 <[^>]*> e1110113 ? tst r1, r3, lsl r1 -0+128 <[^>]*> e330000a ? teq r0, #10 ; 0xa -0+12c <[^>]*> e1320004 ? teq r2, r4 -0+130 <[^>]*> e1350287 ? teq r5, r7, lsl #5 -0+134 <[^>]*> e1310113 ? teq r1, r3, lsl r1 -0+138 <[^>]*> e350000a ? cmp r0, #10 ; 0xa -0+13c <[^>]*> e1520004 ? cmp r2, r4 -0+140 <[^>]*> e1550287 ? cmp r5, r7, lsl #5 -0+144 <[^>]*> e1510113 ? cmp r1, r3, lsl r1 -0+148 <[^>]*> e370000a ? cmn r0, #10 ; 0xa -0+14c <[^>]*> e1720004 ? cmn r2, r4 -0+150 <[^>]*> e1750287 ? cmn r5, r7, lsl #5 -0+154 <[^>]*> e1710113 ? cmn r1, r3, lsl r1 -0+158 <[^>]*> e330f00a ? teqp r0, #10 ; 0xa -0+15c <[^>]*> e132f004 ? teqp r2, r4 -0+160 <[^>]*> e135f287 ? teqp r5, r7, lsl #5 -0+164 <[^>]*> e131f113 ? teqp r1, r3, lsl r1 -0+168 <[^>]*> e370f00a ? cmnp r0, #10 ; 0xa -0+16c <[^>]*> e172f004 ? cmnp r2, r4 -0+170 <[^>]*> e175f287 ? cmnp r5, r7, lsl #5 -0+174 <[^>]*> e171f113 ? cmnp r1, r3, lsl r1 -0+178 <[^>]*> e350f00a ? cmpp r0, #10 ; 0xa -0+17c <[^>]*> e152f004 ? cmpp r2, r4 -0+180 <[^>]*> e155f287 ? cmpp r5, r7, lsl #5 -0+184 <[^>]*> e151f113 ? cmpp r1, r3, lsl r1 -0+188 <[^>]*> e310f00a ? tstp r0, #10 ; 0xa -0+18c <[^>]*> e112f004 ? tstp r2, r4 -0+190 <[^>]*> e115f287 ? tstp r5, r7, lsl #5 -0+194 <[^>]*> e111f113 ? tstp r1, r3, lsl r1 -0+198 <[^>]*> e0000291 ? mul r0, r1, r2 -0+19c <[^>]*> e0110392 ? muls r1, r2, r3 -0+1a0 <[^>]*> 10000091 ? mulne r0, r1, r0 -0+1a4 <[^>]*> 90190798 ? mullss r9, r8, r7 -0+1a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp -0+1ac <[^>]*> e033c994 ? mlas r3, r4, r9, ip -0+1b0 <[^>]*> b029d798 ? mlalt r9, r8, r7, sp -0+1b4 <[^>]*> a034e391 ? mlages r4, r1, r3, lr -0+1b8 <[^>]*> e5910000 ? ldr r0, \[r1\] -0+1bc <[^>]*> e7911002 ? ldr r1, \[r1, r2\] -0+1c0 <[^>]*> e7b32004 ? ldr r2, \[r3, r4\]! -0+1c4 <[^>]*> e5922020 ? ldr r2, \[r2, #32\] -0+1c8 <[^>]*> e7932424 ? ldr r2, \[r3, r4, lsr #8\] -0+1cc <[^>]*> 07b54484 ? ldreq r4, \[r5, r4, lsl #9\]! -0+1d0 <[^>]*> 14954006 ? ldrne r4, \[r5\], #6 -0+1d4 <[^>]*> e6b21003 ? ldrt r1, \[r2\], r3 -0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8 -0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*> -0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\] -0+1e4 <[^>]*> 14f85000 ? ldrnebt r5, \[r8\] -0+1e8 <[^>]*> e5810000 ? str r0, \[r1\] -0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\] -0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]! -0+1f4 <[^>]*> e5822020 ? str r2, \[r2, #32\] -0+1f8 <[^>]*> e7832424 ? str r2, \[r3, r4, lsr #8\] -0+1fc <[^>]*> 07a54484 ? streq r4, \[r5, r4, lsl #9\]! -0+200 <[^>]*> 14854006 ? strne r4, \[r5\], #6 -0+204 <[^>]*> e6821003 ? str r1, \[r2\], r3 -0+208 <[^>]*> e6a42425 ? strt r2, \[r4\], r5, lsr #8 -0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*> -0+210 <[^>]*> e5c71000 ? strb r1, \[r7\] -0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\] -0+218 <[^>]*> e8900002 ? ldmia r0, {r1} -0+21c <[^>]*> 09920038 ? ldmeqib r2, {r3, r4, r5} -0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^ -0+224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl} -0+228 <[^>]*> e99100f7 ? ldmib r1, {r0, r1, r2, r4, r5, r6, r7} -0+22c <[^>]*> e89201f8 ? ldmia r2, {r3, r4, r5, r6, r7, r8} -0+230 <[^>]*> e9130003 ? ldmdb r3, {r0, r1} -0+234 <[^>]*> e8740300 ? ldmda r4!, {r8, r9}\^ -0+238 <[^>]*> e8800002 ? stmia r0, {r1} -0+23c <[^>]*> 09820038 ? stmeqib r2, {r3, r4, r5} -0+240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^ -0+244 <[^>]*> e92a05ff ? stmdb sl!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl} -0+248 <[^>]*> e8010007 ? stmda r1, {r0, r1, r2} -0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4} -0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1} -0+254 <[^>]*> e9e40300 ? stmib r4!, {r8, r9}\^ -0+258 <[^>]*> ef123456 ? swi 0x00123456 -0+25c <[^>]*> 2f000033 ? swics 0x00000033 -0+260 <[^>]*> ebfffffe ? bl 0+0 <[^>]*> -[ ]*260:.*_wombat.* -0+264 <[^>]*> 5bfffffe ? blpl 0+0 <[^>]*> -[ ]*264:.*ARM.*hohum -0+268 <[^>]*> eafffffe ? b 0+0 <[^>]*> -[ ]*268:.*_wibble.* -0+26c <[^>]*> dafffffe ? ble 0+0 <[^>]*> -[ ]*26c:.*testerfunc.* -0+270 <[^>]*> e1a01102 ? mov r1, r2, lsl #2 -0+274 <[^>]*> e1a01002 ? mov r1, r2 -0+278 <[^>]*> e1a01f82 ? mov r1, r2, lsl #31 -0+27c <[^>]*> e1a01312 ? mov r1, r2, lsl r3 -0+280 <[^>]*> e1a01122 ? mov r1, r2, lsr #2 -0+284 <[^>]*> e1a01fa2 ? mov r1, r2, lsr #31 -0+288 <[^>]*> e1a01022 ? mov r1, r2, lsr #32 -0+28c <[^>]*> e1a01332 ? mov r1, r2, lsr r3 -0+290 <[^>]*> e1a01142 ? mov r1, r2, asr #2 -0+294 <[^>]*> e1a01fc2 ? mov r1, r2, asr #31 -0+298 <[^>]*> e1a01042 ? mov r1, r2, asr #32 -0+29c <[^>]*> e1a01352 ? mov r1, r2, asr r3 -0+2a0 <[^>]*> e1a01162 ? mov r1, r2, ror #2 -0+2a4 <[^>]*> e1a01fe2 ? mov r1, r2, ror #31 -0+2a8 <[^>]*> e1a01372 ? mov r1, r2, ror r3 -0+2ac <[^>]*> e1a01062 ? mov r1, r2, rrx -0+2b0 <[^>]*> e1a01102 ? mov r1, r2, lsl #2 -0+2b4 <[^>]*> e1a01002 ? mov r1, r2 -0+2b8 <[^>]*> e1a01f82 ? mov r1, r2, lsl #31 -0+2bc <[^>]*> e1a01312 ? mov r1, r2, lsl r3 -0+2c0 <[^>]*> e1a01122 ? mov r1, r2, lsr #2 -0+2c4 <[^>]*> e1a01fa2 ? mov r1, r2, lsr #31 -0+2c8 <[^>]*> e1a01022 ? mov r1, r2, lsr #32 -0+2cc <[^>]*> e1a01332 ? mov r1, r2, lsr r3 -0+2d0 <[^>]*> e1a01142 ? mov r1, r2, asr #2 -0+2d4 <[^>]*> e1a01fc2 ? mov r1, r2, asr #31 -0+2d8 <[^>]*> e1a01042 ? mov r1, r2, asr #32 -0+2dc <[^>]*> e1a01352 ? mov r1, r2, asr r3 -0+2e0 <[^>]*> e1a01162 ? mov r1, r2, ror #2 -0+2e4 <[^>]*> e1a01fe2 ? mov r1, r2, ror #31 -0+2e8 <[^>]*> e1a01372 ? mov r1, r2, ror r3 -0+2ec <[^>]*> e1a01062 ? mov r1, r2, rrx diff --git a/gas/testsuite/gas/arm/inst.s b/gas/testsuite/gas/arm/inst.s deleted file mode 100644 index b162cfceca..0000000000 --- a/gas/testsuite/gas/arm/inst.s +++ /dev/null @@ -1,223 +0,0 @@ -@ Test file for ARM/GAS -- basic instructions - -.text -.align - mov r0, #0 - mov r1, r2 - mov r3, r4, lsl #3 - mov r5, r6, lsr r7 - mov r8, r9, asr r10 - mov r11, r12, asl r13 - mov r14, r15, rrx - moval a2, a3 - moveq a3, a4 - movne v1, v2 - movlt v3, v4 - movge v5, v6 - movle v7, v8 - movgt ip, sp - movcc r1, r2 - movcs r1, r3 - movmi r3, r6 - movpl wr, sb - movvs r1, r8 - movvc SB, r1, lsr #31 - movhi r8, pc - movls PC, lr - movhs r9, r8 - movul r1, r3 - movs r0, r8 - movuls r0, WR - - add r0, r1, #10 - add r2, r3, r4 - add r5, r6, r7, asl #5 - add r1, r2, r3, lsl r1 - - and r0, r1, #10 - and r2, r3, r4 - and r5, r6, r7, asl #5 - and r1, r2, r3, lsl r1 - - eor r0, r1, #10 - eor r2, r3, r4 - eor r5, r6, r7, asl #5 - eor r1, r2, r3, lsl r1 - - sub r0, r1, #10 - sub r2, r3, r4 - sub r5, r6, r7, asl #5 - sub r1, r2, r3, lsl r1 - - adc r0, r1, #10 - adc r2, r3, r4 - adc r5, r6, r7, asl #5 - adc r1, r2, r3, lsl r1 - - sbc r0, r1, #10 - sbc r2, r3, r4 - sbc r5, r6, r7, asl #5 - sbc r1, r2, r3, lsl r1 - - rsb r0, r1, #10 - rsb r2, r3, r4 - rsb r5, r6, r7, asl #5 - rsb r1, r2, r3, lsl r1 - - rsc r0, r1, #10 - rsc r2, r3, r4 - rsc r5, r6, r7, asl #5 - rsc r1, r2, r3, lsl r1 - - orr r0, r1, #10 - orr r2, r3, r4 - orr r5, r6, r7, asl #5 - orr r1, r2, r3, lsl r1 - - bic r0, r1, #10 - bic r2, r3, r4 - bic r5, r6, r7, asl #5 - bic r1, r2, r3, lsl r1 - - mvn r0, #10 - mvn r2, r4 - mvn r5, r7, asl #5 - mvn r1, r3, lsl r1 - - tst r0, #10 - tst r2, r4 - tst r5, r7, asl #5 - tst r1, r3, lsl r1 - - teq r0, #10 - teq r2, r4 - teq r5, r7, asl #5 - teq r1, r3, lsl r1 - - cmp r0, #10 - cmp r2, r4 - cmp r5, r7, asl #5 - cmp r1, r3, lsl r1 - - cmn r0, #10 - cmn r2, r4 - cmn r5, r7, asl #5 - cmn r1, r3, lsl r1 - - teqp r0, #10 - teqp r2, r4 - teqp r5, r7, asl #5 - teqp r1, r3, lsl r1 - - cmnp r0, #10 - cmnp r2, r4 - cmnp r5, r7, asl #5 - cmnp r1, r3, lsl r1 - - cmpp r0, #10 - cmpp r2, r4 - cmpp r5, r7, asl #5 - cmpp r1, r3, lsl r1 - - tstp r0, #10 - tstp r2, r4 - tstp r5, r7, asl #5 - tstp r1, r3, lsl r1 - - mul r0, r1, r2 - muls r1, r2, r3 - mulne r0, r1, r0 - mullss r9, r8, r7 - - mla r1, r9, sl, fp - mlas r3, r4, r9, IP - mlalt r9, r8, r7, SP - mlages r4, r1, r3, LR - - ldr r0, [r1] - ldr r1, [r1, r2] - ldr r2, [r3, r4]! - ldr r2, [r2, #32] - ldr r2, [r3, r4, lsr #8] - ldreq r4, [r5, r4, asl #9]! - ldrne r4, [r5], #6 - ldrt r1, [r2], r3 - ldr r2, [r4], r5, lsr #8 -foo: - ldr r0, foo - ldrb r3, [r4] - ldrnebt r5, [r8] - - str r0, [r1] - str r1, [r1, r2] - str r3, [r4, r3]! - str r2, [r2, #32] - str r2, [r3, r4, lsr #8] - streq r4, [r5, r4, asl #9]! - strne r4, [r5], #6 - str r1, [r2], r3 - strt r2, [r4], r5, lsr #8 - str r1, bar -bar: - stralb r1, [r7] - strbt r2, [r0] - - ldmia r0, {r1} - ldmeqib r2, {r3, r4, r5} - ldmalda r3, {r0-r15}^ - ldmdb FP!, {r0-r8, SL} - ldmed r1, {r0, r1, r2}|0xf0 - ldmfd r2, {r3, r4}+{r5, r6, r7, r8} - ldmea r3, 3 - ldmfa r4!, {r8, r9}^ - - stmia r0, {r1} - stmeqib r2, {r3, r4, r5} - stmalda r3, {r0-r15}^ - stmdb r10!, {r0-r8, r10} - stmed r1, {r0, r1, r2} - stmfd r2, {r3, r4} - stmea r3, 3 - stmfa r4!, {r8, r9}^ - - swi 0x123456 - swihs 0x33 - - bl _wombat - blpl hohum - b _wibble - ble testerfunc - - mov r1, r2, lsl #2 - mov r1, r2, lsl #0 - mov r1, r2, lsl #31 - mov r1, r2, lsl r3 - mov r1, r2, lsr #2 - mov r1, r2, lsr #31 - mov r1, r2, lsr #32 - mov r1, r2, lsr r3 - mov r1, r2, asr #2 - mov r1, r2, asr #31 - mov r1, r2, asr #32 - mov r1, r2, asr r3 - mov r1, r2, ror #2 - mov r1, r2, ror #31 - mov r1, r2, ror r3 - mov r1, r2, rrx - mov r1, r2, LSL #2 - mov r1, r2, LSL #0 - mov r1, r2, LSL #31 - mov r1, r2, LSL r3 - mov r1, r2, LSR #2 - mov r1, r2, LSR #31 - mov r1, r2, LSR #32 - mov r1, r2, LSR r3 - mov r1, r2, ASR #2 - mov r1, r2, ASR #31 - mov r1, r2, ASR #32 - mov r1, r2, ASR r3 - mov r1, r2, ROR #2 - mov r1, r2, ROR #31 - mov r1, r2, ROR r3 - mov r1, r2, RRX -
\ No newline at end of file diff --git a/gas/testsuite/gas/arm/ldconst.d b/gas/testsuite/gas/arm/ldconst.d deleted file mode 100644 index c7d2837283..0000000000 --- a/gas/testsuite/gas/arm/ldconst.d +++ /dev/null @@ -1,27 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: ARM ldr with immediate constant -#as: -marm2 -EL - -.*: +file format .*arm.* - -Disassembly of section .text: -0+00 <[^>]*> e3a00000 ? mov r0, #0 ; 0x0 -0+04 <[^>]*> e3a004ff ? mov r0, #-16777216 ; 0xff000000 -0+08 <[^>]*> e3e00000 ? mvn r0, #0 ; 0x0 -0+0c <[^>]*> e51f0004 ? ldr r0, \[pc, #-4\] ; 0+10 <[^>]*> -0+10 <[^>]*> 0fff0000 ? .* -0+14 <[^>]*> e3a0e000 ? mov lr, #0 ; 0x0 -0+18 <[^>]*> e3a0e8ff ? mov lr, #16711680 ; 0xff0000 -0+1c <[^>]*> e3e0e8ff ? mvn lr, #16711680 ; 0xff0000 -0+20 <[^>]*> e51fe004 ? ldr lr, \[pc, #-4\] ; 0+24 <[^>]*> -0+24 <[^>]*> 00fff000 ? .* -0+28 <[^>]*> 03a00000 ? moveq r0, #0 ; 0x0 -0+2c <[^>]*> 03a00cff ? moveq r0, #65280 ; 0xff00 -0+30 <[^>]*> 03e00cff ? mvneq r0, #65280 ; 0xff00 -0+34 <[^>]*> 051f0004 ? ldreq r0, \[pc, #-4\] ; 0+38 <[^>]*> -0+38 <[^>]*> 000fff00 ? .* -0+3c <[^>]*> 43a0b000 ? movmi fp, #0 ; 0x0 -0+40 <[^>]*> 43a0b0ff ? movmi fp, #255 ; 0xff -0+44 <[^>]*> 43e0b0ff ? mvnmi fp, #255 ; 0xff -0+48 <[^>]*> 451fb004 ? ldrmi fp, \[pc, #-4\] ; 0+4c <[^>]*> -0+4c <[^>]*> 0000fff0 ? .* diff --git a/gas/testsuite/gas/arm/ldconst.s b/gas/testsuite/gas/arm/ldconst.s deleted file mode 100644 index 1b6aca90fb..0000000000 --- a/gas/testsuite/gas/arm/ldconst.s +++ /dev/null @@ -1,28 +0,0 @@ -@ Test file for ARM/GAS -- ldr reg, =... expressions. - -.text -.align -foo: - ldr r0, =0 - ldr r0, =0xff000000 - ldr r0, =-1 - ldr r0, =0x0fff0000 - .pool - - ldr r14, =0 - ldr r14, =0x00ff0000 - ldr r14, =0xff00ffff - ldr r14, =0x00fff000 - .pool - - ldreq r0, =0 - ldreq r0, =0x0000ff00 - ldreq r0, =0xffff00ff - ldreq r0, =0x000fff00 - .pool - - ldrmi r11, =0 - ldrmi r11, =0x000000ff - ldrmi r11, =0xffffff00 - ldrmi r11, =0x0000fff0 - .pool diff --git a/gas/testsuite/gas/arm/le-fpconst.d b/gas/testsuite/gas/arm/le-fpconst.d deleted file mode 100644 index 37a7338712..0000000000 --- a/gas/testsuite/gas/arm/le-fpconst.d +++ /dev/null @@ -1,8 +0,0 @@ -#objdump: -s --section=.text -#as: -EL -#name: arm little-endian fpconst - -.*: +file format .*arm.* - -Contents of section .text: - 0000 cdcc8c3f 00000000 9999f13f 9a999999 .* diff --git a/gas/testsuite/gas/arm/le-fpconst.s b/gas/testsuite/gas/arm/le-fpconst.s deleted file mode 100644 index 8a3c3d7014..0000000000 --- a/gas/testsuite/gas/arm/le-fpconst.s +++ /dev/null @@ -1,8 +0,0 @@ -# Test fp constants. -# These need ARM specific support because 8 byte fp constants in little -# endian mode are represented abnormally. - - .text - .float 1.1 - .float 0 - .double 1.1 diff --git a/gas/testsuite/gas/arm/maverick.c b/gas/testsuite/gas/arm/maverick.c deleted file mode 100644 index 2744dea46a..0000000000 --- a/gas/testsuite/gas/arm/maverick.c +++ /dev/null @@ -1,499 +0,0 @@ -/* Copyright (C) 2000 Free Software Foundation - * Contributed by Alexandre Oliva <aoliva@cygnus.com> - * - * This file is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -/* Generator of tests for Maverick. - * - * See the following file for usage and documentation. */ -#include "../all/test-gen.c" - -/* These are the ARM registers. Some of them have canonical names - * other than r##, so we'll use both in the asm input, but only the - * canonical names in the expected disassembler output. */ -char *arm_regs[] = { - /* Canonical names. */ - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", - /* Alternate names, i.e., those that can be used in the assembler, - * but that will never be emitted by the disassembler. */ - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" -}; - -/* The various types of registers: ARM's registers, Maverick's - * f/d/fx/dx registers, Maverick's accumulators and Maverick's status - * register. */ -#define armreg(shift) \ - reg_r (arm_regs, shift, 0xf, mk_get_bits (5u)) -#define mvreg(prefix, shift) \ - reg_p ("mv" prefix, shift, mk_get_bits (4u)) -#define acreg(shift) \ - reg_p ("mvax", shift, mk_get_bits (2u)) -#define dspsc \ - literal ("dspsc"), tick_random - -/* This outputs the condition flag that may follow each ARM insn. - * Since the condition 15 is invalid, we use it to check that the - * assembler recognizes the absence of a condition as `al'. However, - * the disassembler won't ever output `al', so, if we emit it in the - * assembler, expect the condition to be omitted in the disassembler - * output. */ -int -arm_cond (func_arg *arg, insn_data *data) -#define arm_cond { arm_cond } -{ - static const char conds[16][3] = { - "eq", "ne", "cs", "cc", - "mi", "pl", "vs", "vc", - "hi", "ls", "ge", "lt", - "gt", "le", "al", "" - }; - unsigned val = get_bits (4u); - - data->as_in = data->dis_out = strdup (conds[val]); - if (val == 14) - data->dis_out = strdup (""); - data->bits = (val == 15 ? 14 : val) << 28; - return 0; -} - -/* The sign of an offset is actually used to determined whether the - * absolute value of the offset should be added or subtracted, so we - * must adjust negative values so that they do not overflow: -256 is - * not valid, but -0 is distinct from +0. */ -int -off8s (func_arg *arg, insn_data *data) -#define off8s { off8s } -{ - int val = get_bits (9s); - char value[6], *strt = value; - *strt++ = '#'; - if (val < 0) - { - *strt++ = '-'; - ++val; - val = -val; - data->bits = val; - } - else - data->bits = val | (1 << 23); - sprintf (strt, "%i", val); - data->as_in = data->dis_out = strdup (value); - return 0; -} - -/* This function generates a 7-bit signed constant, emitted as - * follows: the 4 least-significant bits are stored in the 4 - * least-significant bits of the word; the 3 most-significant bits are - * stored in bits 7:5, i.e., bit 4 is skipped. */ -int -imm7 (func_arg *arg, insn_data *data) -#define imm7 { imm7 } -{ - int val = get_bits (7s); - char value[6]; - - data->bits = (val & 0x0f) | (2 * (val & 0x70)); - sprintf (value, "#%i", val); - data->as_in = data->dis_out = strdup (value); - return 0; -} - -/* Convenience wrapper to define_insn, that prefixes every insn with - * `cf' (so, if you specify command-line arguments, remember that `cf' - * must *not* be part of the string), and post-fixes a condition code. - * insname and insnvar specify the main insn name and a variant; - * they're just concatenated, and insnvar is often empty. word is the - * bit pattern that defines the insn, properly shifted, and funcs is a - * sequence of funcs that define the operands and the syntax of the - * insn. */ -#define mv_insn(insname, insnvar, word, funcs...) \ - define_insn(insname ## insnvar, \ - literal ("cf"), \ - insn_bits (insname, word), \ - arm_cond, \ - tab, \ - ## funcs) - -/* Define a single LDC/STC variant. op is the main insn opcode; ld - * stands for load (it should be 0 on stores), dword selects 64-bit - * operations, pre should be enabled for pre-increment, and wb, for - * write-back. sep1, sep2 and sep3 are syntactical elements ([]!) - * that the assembler will use to enable pre and wb. It would - * probably have been cleaner to couple the syntactical elements with - * the pre/wb bits directly, but it would have required the definition - * of more functions. */ -#define LDST(insname, insnvar, op, ld, dword, regname, pre, wb, sep1, sep2, sep3) \ - mv_insn (insname, insnvar, \ - (12<<24)|(op<<8)|(ld<<20)|(pre<<24)|(dword<<22)|(wb<<21), \ - mvreg (regname, 12), comma, \ - lsqbkt, armreg (16), sep1, comma, off8s, sep2, sep3, \ - tick_random) - -/* Define all variants of an LDR or STR instruction, namely, - * pre-indexed without write-back, pre-indexed with write-back and - * post-indexed. */ -#define LDSTall(insname, op, ld, dword, regname) \ - LDST (insname, _p, op, ld, dword, regname, 1, 0, nothing, rsqbkt, nothing); \ - LDST (insname, _pw, op, ld, dword, regname, 1, 1, nothing, rsqbkt, literal("!")); \ - LDST (insname, ,op, ld, dword, regname, 0, 0, rsqbkt, nothing, nothing) - -/* Produce the insn identifiers of all LDST variants of a given insn. - * To be used in the initialization of an insn group array. */ -#define insns_LDSTall(insname) \ - insn (insname ## _p), insn (insname ## _pw), insn (insname) - -/* Define a CDP variant that uses two registers, at offsets 12 and 16. - * The two opcodes and the co-processor number identify the CDP - * insn. */ -#define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ - mv_insn (insname##var, , \ - (14<<24)|((opcode1)<<20)|((cpnum)<<8)|((opcode2)<<5), \ - mvreg (reg1name, 12), comma, mvreg (reg2name, 16)) - -/* Define a 32-bit integer CDP instruction with two operands. */ -#define CDP2fx(insname, opcode1, opcode2) \ - CDP2 (insname, 32, 5, opcode1, opcode2, "fx", "fx") - -/* Define a 64-bit integer CDP instruction with two operands. */ -#define CDP2dx(insname, opcode1, opcode2) \ - CDP2 (insname, 64, 5, opcode1, opcode2, "dx", "dx") - -/* Define a float CDP instruction with two operands. */ -#define CDP2f(insname, opcode1, opcode2) \ - CDP2 (insname, s, 4, opcode1, opcode2, "f", "f") - -/* Define a double CDP instruction with two operands. */ -#define CDP2d(insname, opcode1, opcode2) \ - CDP2 (insname, d, 4, opcode1, opcode2, "d", "d") - -/* Define a CDP instruction with two register operands and one 7-bit - * signed immediate generated with imm7. */ -#define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ - mv_insn (insname, , (14<<24)|((opcode1)<<20)|((cpnum)<<8), \ - mvreg (reg1name, 12), comma, mvreg (reg2name, 16), comma, imm7, \ - tick_random) - -/* Produce the insn identifiers of CDP floating-point or integer insn - * pairs (i.e., it appends the suffixes for 32-bit and 64-bit - * insns. */ -#define CDPfp_insns(insname) \ - insn (insname ## s), insn (insname ## d) -#define CDPx_insns(insname) \ - insn (insname ## 32), insn (insname ## 64) - -/* Define a CDP instruction with 3 operands, at offsets 12, 16, 0. */ -#define CDP3(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name, reg3name) \ - mv_insn (insname##var, , \ - (14<<24)|((opcode1)<<20)|((cpnum)<<8)|((opcode2)<<5), \ - mvreg (reg1name, 12), comma, mvreg (reg2name, 16), comma, \ - mvreg (reg3name, 0), tick_random) - -/* Define a 32-bit integer CDP instruction with three operands. */ -#define CDP3fx(insname, opcode1, opcode2) \ - CDP3 (insname, 32, 5, opcode1, opcode2, "fx", "fx", "fx") - -/* Define a 64-bit integer CDP instruction with three operands. */ -#define CDP3dx(insname, opcode1, opcode2) \ - CDP3 (insname, 64, 5, opcode1, opcode2, "dx", "dx", "dx") - -/* Define a float CDP instruction with three operands. */ -#define CDP3f(insname, opcode1, opcode2) \ - CDP3 (insname, s, 4, opcode1, opcode2, "f", "f", "f") - -/* Define a double CDP instruction with three operands. */ -#define CDP3d(insname, opcode1, opcode2) \ - CDP3 (insname, d, 4, opcode1, opcode2, "d", "d", "d") - -/* Define a CDP instruction with four operands, at offsets 5, 12, 16 - * and 0. Used only for ACC instructions. */ -#define CDP4(insname, opcode1, reg2spec, reg3name, reg4name) \ - mv_insn (insname, , (14<<24)|((opcode1)<<20)|(6<<8), \ - acreg (5), comma, reg2spec, comma, \ - mvreg (reg3name, 16), comma, mvreg (reg4name, 0)) - -/* Define a CDP4 instruction with one accumulator operands. */ -#define CDP41A(insname, opcode1) \ - CDP4 (insname, opcode1, mvreg ("fx", 12), "fx", "fx") - -/* Define a CDP4 instruction with two accumulator operands. */ -#define CDP42A(insname, opcode1) \ - CDP4 (insname, opcode1, acreg (12), "fx", "fx") - -/* Define a MCR or MRC instruction with two register operands. */ -#define MCRC2(insname, cpnum, opcode1, dir, opcode2, reg1spec, reg2spec) \ - mv_insn (insname, , \ - ((14<<24)|((opcode1)<<21)|((dir)<<20)| \ - ((cpnum)<<8)|((opcode2)<<5)|(1<<4)), \ - reg1spec, comma, reg2spec) - -/* Define a move from a DSP register to an ARM register. */ -#define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ - MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \ - mvreg (regDSPname, 16), armreg(12)) - -/* Define a move from an ARM register to a DSP register. */ -#define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ - MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \ - armreg (12), mvreg (regDSPname, 16)) - -/* Define a move from a DSP register to a DSP accumulator. */ -#define MVDSPACC(insname, opcode2, regDSPname) \ - MCRC2 (mv ## insname, 6, 0, 1, opcode2, acreg (0), mvreg (regDSPname, 16)) - -/* Define a move from a DSP accumulator to a DSP register. */ -#define MVACCDSP(insname, opcode2, regDSPname) \ - MCRC2 (mv ## insname, 6, 0, 0, opcode2, mvreg (regDSPname, 0), acreg (16)) - -/* Define move insns between a float DSP register and an ARM - * register. */ -#define MVf(nameAD, nameDA, opcode2) \ - MVDSPARM (nameAD, 4, opcode2, "f"); \ - MVARMDSP (nameDA, 4, opcode2, "f") - -/* Define move insns between a double DSP register and an ARM - * register. */ -#define MVd(nameAD, nameDA, opcode2) \ - MVDSPARM (nameAD, 4, opcode2, "d"); \ - MVARMDSP (nameDA, 4, opcode2, "d") - -/* Define move insns between a 32-bit integer DSP register and an ARM - * register. */ -#define MVfx(nameAD, nameDA, opcode2) \ - MVDSPARM (nameAD, 5, opcode2, "fx"); \ - MVARMDSP (nameDA, 5, opcode2, "fx") - -/* Define move insns between a 64-bit integer DSP register and an ARM - * register. */ -#define MVdx(nameAD, nameDA, opcode2) \ - MVDSPARM (nameAD, 5, opcode2, "dx"); \ - MVARMDSP (nameDA, 5, opcode2, "dx") - -/* Define move insns between a 32-bit DSP register and a DSP - * accumulator. */ -#define MVfxa(nameFA, nameAF, opcode2) \ - MVDSPACC (nameFA, opcode2, "fx"); \ - MVACCDSP (nameAF, opcode2, "fx") - -/* Define move insns between a 64-bit DSP register and a DSP - * accumulator. */ -#define MVdxa(nameDA, nameAD, opcode2) \ - MVDSPACC (nameDA, opcode2, "dx"); \ - MVACCDSP (nameAD, opcode2, "dx") - -/* Produce the insn identifiers for a pair of mv insns. */ -#define insns_MV(name1, name2) \ - insn (mv ## name1), insn (mv ## name2) - -/* Define a MCR or MRC instruction with three register operands. */ -#define MCRC3(insname, cpnum, opcode1, dir, opcode2, reg1spec, reg2spec, reg3spec) \ - mv_insn (insname, , \ - ((14<<24)|((opcode1)<<21)|((dir)<<20)| \ - ((cpnum)<<8)|((opcode2)<<5)|(1<<4)), \ - reg1spec, comma, reg2spec, comma, reg3spec, \ - tick_random) - -/* Define all load_store insns. */ -LDSTall (ldrs, 4, 1, 0, "f"); -LDSTall (ldrd, 4, 1, 1, "d"); -LDSTall (ldr32, 5, 1, 0, "fx"); -LDSTall (ldr64, 5, 1, 1, "dx"); -LDSTall (strs, 4, 0, 0, "f"); -LDSTall (strd, 4, 0, 1, "d"); -LDSTall (str32, 5, 0, 0, "fx"); -LDSTall (str64, 5, 0, 1, "dx"); - -/* Create the load_store insn group. */ -func *load_store_insns[] = { - insns_LDSTall (ldrs), insns_LDSTall (ldrd), - insns_LDSTall (ldr32), insns_LDSTall (ldr64), - insns_LDSTall (strs), insns_LDSTall (strd), - insns_LDSTall (str32), insns_LDSTall (str64), - 0 -}; - -/* Define all move insns. */ -MVf (sr, rs, 2); -MVd (dlr, rdl, 0); -MVd (dhr, rdh, 1); -MVdx (64lr, r64l, 0); -MVdx (64hr, r64h, 1); -MVfxa (al32, 32al, 0); -MVfxa (am32, 32am, 1); -MVfxa (ah32, 32ah, 2); -MVfxa (a32, 32a, 3); -MVdxa (a64, 64a, 4); -MCRC2 (mvsc32, 6, 0, 1, 5, dspsc, mvreg ("fx", 16)); -MCRC2 (mv32sc, 6, 0, 0, 5, mvreg ("fx", 0), dspsc); -CDP2 (cpys, , 4, 0, 0, "f", "f"); -CDP2 (cpyd, , 4, 0, 1, "d", "d"); - -/* Create the move insns group. */ -func *move_insns[] = { - insns_MV (sr, rs), insns_MV (dlr, rdl), insns_MV (dhr, rdh), - insns_MV (64lr, r64l), insns_MV (64hr, r64h), - insns_MV (al32, 32al), insns_MV (am32, 32am), insns_MV (ah32, 32ah), - insns_MV (a32, 32a), insns_MV (a64, 64a), - insn (mvsc32), insn (mv32sc), insn (cpys), insn (cpyd), - 0 -}; - -/* Define all conversion insns. */ -CDP2 (cvtsd, , 4, 0, 3, "d", "f"); -CDP2 (cvtds, , 4, 0, 2, "f", "d"); -CDP2 (cvt32s, , 4, 0, 4, "f", "fx"); -CDP2 (cvt32d, , 4, 0, 5, "d", "fx"); -CDP2 (cvt64s, , 4, 0, 6, "f", "dx"); -CDP2 (cvt64d, , 4, 0, 7, "d", "dx"); -CDP2 (cvts32, , 5, 1, 4, "fx", "f"); -CDP2 (cvtd32, , 5, 1, 5, "fx", "d"); -CDP2 (truncs32, , 5, 1, 6, "fx", "f"); -CDP2 (truncd32, , 5, 1, 7, "fx", "d"); - -/* Create the conv insns group. */ -func *conv_insns[] = { - insn (cvtsd), insn (cvtds), insn (cvt32s), insn (cvt32d), - insn (cvt64s), insn (cvt64d), insn (cvts32), insn (cvtd32), - insn (truncs32), insn (truncd32), - 0 -}; - -/* Define all shift insns. */ -MCRC3 (rshl32, 5, 0, 0, 2, mvreg ("fx", 16), mvreg ("fx", 0), armreg(12)); -MCRC3 (rshl64, 5, 0, 0, 3, mvreg ("dx", 16), mvreg ("dx", 0), armreg(12)); -CDP2_imm7 (sh32, 5, 0, "fx", "fx"); -CDP2_imm7 (sh64, 5, 2, "dx", "dx"); - -/* Create the shift insns group. */ -func *shift_insns[] = { - insn (rshl32), insn (rshl64), - insn (sh32), insn (sh64), - 0 -}; - -/* Define all comparison insns. */ -MCRC3 (cmps, 4, 0, 1, 4, armreg (12), mvreg ("f", 16), mvreg ("f", 0)); -MCRC3 (cmpd, 4, 0, 1, 5, armreg (12), mvreg ("d", 16), mvreg ("d", 0)); -MCRC3 (cmp32, 5, 0, 1, 4, armreg (12), mvreg ("fx", 16), mvreg ("fx", 0)); -MCRC3 (cmp64, 5, 0, 1, 5, armreg (12), mvreg ("dx", 16), mvreg ("dx", 0)); - -/* Create the comp insns group. */ -func *comp_insns[] = { - insn (cmps), insn (cmpd), - insn (cmp32), insn (cmp64), - 0 -}; - -/* Define all floating-point arithmetic insns. */ -CDP2f (abs, 3, 0); -CDP2d (abs, 3, 1); -CDP2f (neg, 3, 2); -CDP2d (neg, 3, 3); -CDP3f (add, 3, 4); -CDP3d (add, 3, 5); -CDP3f (sub, 3, 6); -CDP3d (sub, 3, 7); -CDP3f (mul, 1, 0); -CDP3d (mul, 1, 1); - -/* Create the fp-arith insns group. */ -func *fp_arith_insns[] = { - CDPfp_insns (abs), CDPfp_insns (neg), - CDPfp_insns (add), CDPfp_insns (sub), CDPfp_insns (mul), - 0 -}; - -/* Define all integer arithmetic insns. */ -CDP2fx (abs, 3, 0); -CDP2dx (abs, 3, 1); -CDP2fx (neg, 3, 2); -CDP2dx (neg, 3, 3); -CDP3fx (add, 3, 4); -CDP3dx (add, 3, 5); -CDP3fx (sub, 3, 6); -CDP3dx (sub, 3, 7); -CDP3fx (mul, 1, 0); -CDP3dx (mul, 1, 1); -CDP3fx (mac, 1, 2); -CDP3fx (msc, 1, 3); - -/* Create the int-arith insns group. */ -func *int_arith_insns[] = { - CDPx_insns (abs), CDPx_insns (neg), - CDPx_insns (add), CDPx_insns (sub), CDPx_insns (mul), - insn (mac32), insn (msc32), - 0 -}; - -/* Define all accumulator arithmetic insns. */ -CDP41A (madd32, 0); -CDP41A (msub32, 1); -CDP42A (madda32, 2); -CDP42A (msuba32, 3); - -/* Create the acc-arith insns group. */ -func *acc_arith_insns[] = { - insn (madd32), insn (msub32), - insn (madda32), insn (msuba32), - 0 -}; - -/* Create the set of all groups. */ -group_t -groups[] = { - { "load_store", load_store_insns }, - { "move", move_insns }, - { "conv", conv_insns }, - { "shift", shift_insns }, - { "comp", comp_insns }, - { "fp_arith", fp_arith_insns }, - { "int_arith", int_arith_insns }, - { "acc_arith", acc_arith_insns }, - { 0 } -}; - -int -main(int argc, char *argv[]) -{ - FILE *as_in = stdout, *dis_out = stderr; - - /* Check whether we're filtering insns. */ - if (argc > 1) - skip_list = argv + 1; - - /* Output assembler header. */ - fputs ("\t.text\n" - "\t.align\n", - as_in); - /* Output comments for the testsuite-driver and the initial - * disassembler output. */ - fputs ("#objdump: -dr --prefix-address --show-raw-insn\n" - "#name: Maverick\n" - "#as: -marm9e\n" - "\n" - "# Test the instructions of Maverick\n" - "\n" - ".*: +file format.*arm.*\n" - "\n" - "Disassembly of section .text:\n", - dis_out); - - /* Now emit all (selected) insns. */ - output_groups (groups, as_in, dis_out); - - exit (0); -} diff --git a/gas/testsuite/gas/arm/maverick.d b/gas/testsuite/gas/arm/maverick.d deleted file mode 100644 index 6488ec56b7..0000000000 --- a/gas/testsuite/gas/arm/maverick.d +++ /dev/null @@ -1,477 +0,0 @@ -#objdump: -dr --prefix-address --show-raw-insn -#name: Maverick -#as: -mcpu=arm9+maverick - -# Test the instructions of Maverick - -.*: +file format.*arm.* - -Disassembly of section .text: -# load_store: -00000000 <load_store> 0d ?9d ?54 ?ff ? * cfldrseq mvf5, ?\[sp, ?#255\] -00000004 <load_store\+0x4> 4d ?9b ?e4 ?49 ? * cfldrsmi mvf14, ?\[r11, ?#73\] -00000008 <load_store\+0x8> 7d ?1c ?24 ?ef ? * cfldrsvc mvf2, ?\[r12, ?#-239\] -0000000c <load_store\+0xc> bd ?1a ?04 ?ff ? * cfldrslt mvf0, ?\[r10, ?#-255\] -00000010 <load_store\+0x10> 3d ?11 ?c4 ?27 ? * cfldrscc mvf12, ?\[r1, ?#-39\] -00000014 <load_store\+0x14> ed ?bf ?d4 ?68 ? * cfldrs mvf13, ?\[pc, ?#104\]! -00000018 <load_store\+0x18> 2d ?30 ?94 ?00 ? * cfldrscs mvf9, ?\[r0, ?#-0\]! -0000001c <load_store\+0x1c> ad ?be ?94 ?48 ? * cfldrsge mvf9, ?\[lr, ?#72\]! -00000020 <load_store\+0x20> 8d ?b5 ?d4 ?25 ? * cfldrshi mvf13, ?\[r5, ?#37\]! -00000024 <load_store\+0x24> cd ?b3 ?64 ?00 ? * cfldrsgt mvf6, ?\[r3, ?#0\]! -00000028 <load_store\+0x28> 5c ?94 ?e4 ?40 ? * cfldrspl mvf14, ?\[r4\], ?#64 -0000002c <load_store\+0x2c> 1c ?12 ?84 ?9d ? * cfldrsne mvf8, ?\[r2\], ?#-157 -00000030 <load_store\+0x30> bc ?99 ?44 ?01 ? * cfldrslt mvf4, ?\[r9\], ?#1 -00000034 <load_store\+0x34> 5c ?17 ?f4 ?3f ? * cfldrspl mvf15, ?\[r7\], ?#-63 -00000038 <load_store\+0x38> ec ?18 ?34 ?88 ? * cfldrs mvf3, ?\[r8\], ?#-136 -0000003c <load_store\+0x3c> 2d ?56 ?14 ?44 ? * cfldrdcs mvd1, ?\[r6, ?#-68\] -00000040 <load_store\+0x40> 0d ?dd ?74 ?ff ? * cfldrdeq mvd7, ?\[sp, ?#255\] -00000044 <load_store\+0x44> cd ?db ?a4 ?49 ? * cfldrdgt mvd10, ?\[r11, ?#73\] -00000048 <load_store\+0x48> dd ?5c ?64 ?ef ? * cfldrdle mvd6, ?\[r12, ?#-239\] -0000004c <load_store\+0x4c> 9d ?5a ?04 ?ff ? * cfldrdls mvd0, ?\[r10, ?#-255\] -00000050 <load_store\+0x50> 9d ?71 ?44 ?27 ? * cfldrdls mvd4, ?\[r1, ?#-39\]! -00000054 <load_store\+0x54> dd ?ff ?74 ?68 ? * cfldrdle mvd7, ?\[pc, ?#104\]! -00000058 <load_store\+0x58> 6d ?70 ?b4 ?00 ? * cfldrdvs mvd11, ?\[r0, ?#-0\]! -0000005c <load_store\+0x5c> ed ?fe ?34 ?48 ? * cfldrd mvd3, ?\[lr, ?#72\]! -00000060 <load_store\+0x60> 8d ?f5 ?f4 ?25 ? * cfldrdhi mvd15, ?\[r5, ?#37\]! -00000064 <load_store\+0x64> 4c ?d3 ?24 ?00 ? * cfldrdmi mvd2, ?\[r3\], ?#0 -00000068 <load_store\+0x68> ec ?d4 ?a4 ?40 ? * cfldrd mvd10, ?\[r4\], ?#64 -0000006c <load_store\+0x6c> 3c ?52 ?84 ?9d ? * cfldrdcc mvd8, ?\[r2\], ?#-157 -00000070 <load_store\+0x70> 1c ?d9 ?c4 ?01 ? * cfldrdne mvd12, ?\[r9\], ?#1 -00000074 <load_store\+0x74> 7c ?57 ?54 ?3f ? * cfldrdvc mvd5, ?\[r7\], ?#-63 -00000078 <load_store\+0x78> ad ?18 ?15 ?88 ? * cfldr32ge mvfx1, ?\[r8, ?#-136\] -0000007c <load_store\+0x7c> 6d ?16 ?b5 ?44 ? * cfldr32vs mvfx11, ?\[r6, ?#-68\] -00000080 <load_store\+0x80> 0d ?9d ?55 ?ff ? * cfldr32eq mvfx5, ?\[sp, ?#255\] -00000084 <load_store\+0x84> 4d ?9b ?e5 ?49 ? * cfldr32mi mvfx14, ?\[r11, ?#73\] -00000088 <load_store\+0x88> 7d ?1c ?25 ?ef ? * cfldr32vc mvfx2, ?\[r12, ?#-239\] -0000008c <load_store\+0x8c> bd ?3a ?05 ?ff ? * cfldr32lt mvfx0, ?\[r10, ?#-255\]! -00000090 <load_store\+0x90> 3d ?31 ?c5 ?27 ? * cfldr32cc mvfx12, ?\[r1, ?#-39\]! -00000094 <load_store\+0x94> ed ?bf ?d5 ?68 ? * cfldr32 mvfx13, ?\[pc, ?#104\]! -00000098 <load_store\+0x98> 2d ?30 ?95 ?00 ? * cfldr32cs mvfx9, ?\[r0, ?#-0\]! -0000009c <load_store\+0x9c> ad ?be ?95 ?48 ? * cfldr32ge mvfx9, ?\[lr, ?#72\]! -000000a0 <load_store\+0xa0> 8c ?95 ?d5 ?25 ? * cfldr32hi mvfx13, ?\[r5\], ?#37 -000000a4 <load_store\+0xa4> cc ?93 ?65 ?00 ? * cfldr32gt mvfx6, ?\[r3\], ?#0 -000000a8 <load_store\+0xa8> 5c ?94 ?e5 ?40 ? * cfldr32pl mvfx14, ?\[r4\], ?#64 -000000ac <load_store\+0xac> 1c ?12 ?85 ?9d ? * cfldr32ne mvfx8, ?\[r2\], ?#-157 -000000b0 <load_store\+0xb0> bc ?99 ?45 ?01 ? * cfldr32lt mvfx4, ?\[r9\], ?#1 -000000b4 <load_store\+0xb4> 5d ?57 ?f5 ?3f ? * cfldr64pl mvdx15, ?\[r7, ?#-63\] -000000b8 <load_store\+0xb8> ed ?58 ?35 ?88 ? * cfldr64 mvdx3, ?\[r8, ?#-136\] -000000bc <load_store\+0xbc> 2d ?56 ?15 ?44 ? * cfldr64cs mvdx1, ?\[r6, ?#-68\] -000000c0 <load_store\+0xc0> 0d ?dd ?75 ?ff ? * cfldr64eq mvdx7, ?\[sp, ?#255\] -000000c4 <load_store\+0xc4> cd ?db ?a5 ?49 ? * cfldr64gt mvdx10, ?\[r11, ?#73\] -000000c8 <load_store\+0xc8> dd ?7c ?65 ?ef ? * cfldr64le mvdx6, ?\[r12, ?#-239\]! -000000cc <load_store\+0xcc> 9d ?7a ?05 ?ff ? * cfldr64ls mvdx0, ?\[r10, ?#-255\]! -000000d0 <load_store\+0xd0> 9d ?71 ?45 ?27 ? * cfldr64ls mvdx4, ?\[r1, ?#-39\]! -000000d4 <load_store\+0xd4> dd ?ff ?75 ?68 ? * cfldr64le mvdx7, ?\[pc, ?#104\]! -000000d8 <load_store\+0xd8> 6d ?70 ?b5 ?00 ? * cfldr64vs mvdx11, ?\[r0, ?#-0\]! -000000dc <load_store\+0xdc> ec ?de ?35 ?48 ? * cfldr64 mvdx3, ?\[lr\], ?#72 -000000e0 <load_store\+0xe0> 8c ?d5 ?f5 ?25 ? * cfldr64hi mvdx15, ?\[r5\], ?#37 -000000e4 <load_store\+0xe4> 4c ?d3 ?25 ?00 ? * cfldr64mi mvdx2, ?\[r3\], ?#0 -000000e8 <load_store\+0xe8> ec ?d4 ?a5 ?40 ? * cfldr64 mvdx10, ?\[r4\], ?#64 -000000ec <load_store\+0xec> 3c ?52 ?85 ?9d ? * cfldr64cc mvdx8, ?\[r2\], ?#-157 -000000f0 <load_store\+0xf0> 1d ?89 ?c4 ?01 ? * cfstrsne mvf12, ?\[r9, ?#1\] -000000f4 <load_store\+0xf4> 7d ?07 ?54 ?3f ? * cfstrsvc mvf5, ?\[r7, ?#-63\] -000000f8 <load_store\+0xf8> ad ?08 ?14 ?88 ? * cfstrsge mvf1, ?\[r8, ?#-136\] -000000fc <load_store\+0xfc> 6d ?06 ?b4 ?44 ? * cfstrsvs mvf11, ?\[r6, ?#-68\] -00000100 <load_store\+0x100> 0d ?8d ?54 ?ff ? * cfstrseq mvf5, ?\[sp, ?#255\] -00000104 <load_store\+0x104> 4d ?ab ?e4 ?49 ? * cfstrsmi mvf14, ?\[r11, ?#73\]! -00000108 <load_store\+0x108> 7d ?2c ?24 ?ef ? * cfstrsvc mvf2, ?\[r12, ?#-239\]! -0000010c <load_store\+0x10c> bd ?2a ?04 ?ff ? * cfstrslt mvf0, ?\[r10, ?#-255\]! -00000110 <load_store\+0x110> 3d ?21 ?c4 ?27 ? * cfstrscc mvf12, ?\[r1, ?#-39\]! -00000114 <load_store\+0x114> ed ?af ?d4 ?68 ? * cfstrs mvf13, ?\[pc, ?#104\]! -00000118 <load_store\+0x118> 2c ?00 ?94 ?00 ? * cfstrscs mvf9, ?\[r0\], ?#-0 -0000011c <load_store\+0x11c> ac ?8e ?94 ?48 ? * cfstrsge mvf9, ?\[lr\], ?#72 -00000120 <load_store\+0x120> 8c ?85 ?d4 ?25 ? * cfstrshi mvf13, ?\[r5\], ?#37 -00000124 <load_store\+0x124> cc ?83 ?64 ?00 ? * cfstrsgt mvf6, ?\[r3\], ?#0 -00000128 <load_store\+0x128> 5c ?84 ?e4 ?40 ? * cfstrspl mvf14, ?\[r4\], ?#64 -0000012c <load_store\+0x12c> 1d ?42 ?84 ?9d ? * cfstrdne mvd8, ?\[r2, ?#-157\] -00000130 <load_store\+0x130> bd ?c9 ?44 ?01 ? * cfstrdlt mvd4, ?\[r9, ?#1\] -00000134 <load_store\+0x134> 5d ?47 ?f4 ?3f ? * cfstrdpl mvd15, ?\[r7, ?#-63\] -00000138 <load_store\+0x138> ed ?48 ?34 ?88 ? * cfstrd mvd3, ?\[r8, ?#-136\] -0000013c <load_store\+0x13c> 2d ?46 ?14 ?44 ? * cfstrdcs mvd1, ?\[r6, ?#-68\] -00000140 <load_store\+0x140> 0d ?ed ?74 ?ff ? * cfstrdeq mvd7, ?\[sp, ?#255\]! -00000144 <load_store\+0x144> cd ?eb ?a4 ?49 ? * cfstrdgt mvd10, ?\[r11, ?#73\]! -00000148 <load_store\+0x148> dd ?6c ?64 ?ef ? * cfstrdle mvd6, ?\[r12, ?#-239\]! -0000014c <load_store\+0x14c> 9d ?6a ?04 ?ff ? * cfstrdls mvd0, ?\[r10, ?#-255\]! -00000150 <load_store\+0x150> 9d ?61 ?44 ?27 ? * cfstrdls mvd4, ?\[r1, ?#-39\]! -00000154 <load_store\+0x154> dc ?cf ?74 ?68 ? * cfstrdle mvd7, ?\[pc\], ?#104 -00000158 <load_store\+0x158> 6c ?40 ?b4 ?00 ? * cfstrdvs mvd11, ?\[r0\], ?#-0 -0000015c <load_store\+0x15c> ec ?ce ?34 ?48 ? * cfstrd mvd3, ?\[lr\], ?#72 -00000160 <load_store\+0x160> 8c ?c5 ?f4 ?25 ? * cfstrdhi mvd15, ?\[r5\], ?#37 -00000164 <load_store\+0x164> 4c ?c3 ?24 ?00 ? * cfstrdmi mvd2, ?\[r3\], ?#0 -00000168 <load_store\+0x168> ed ?84 ?a5 ?40 ? * cfstr32 mvfx10, ?\[r4, ?#64\] -0000016c <load_store\+0x16c> 3d ?02 ?85 ?9d ? * cfstr32cc mvfx8, ?\[r2, ?#-157\] -00000170 <load_store\+0x170> 1d ?89 ?c5 ?01 ? * cfstr32ne mvfx12, ?\[r9, ?#1\] -00000174 <load_store\+0x174> 7d ?07 ?55 ?3f ? * cfstr32vc mvfx5, ?\[r7, ?#-63\] -00000178 <load_store\+0x178> ad ?08 ?15 ?88 ? * cfstr32ge mvfx1, ?\[r8, ?#-136\] -0000017c <load_store\+0x17c> 6d ?26 ?b5 ?44 ? * cfstr32vs mvfx11, ?\[r6, ?#-68\]! -00000180 <load_store\+0x180> 0d ?ad ?55 ?ff ? * cfstr32eq mvfx5, ?\[sp, ?#255\]! -00000184 <load_store\+0x184> 4d ?ab ?e5 ?49 ? * cfstr32mi mvfx14, ?\[r11, ?#73\]! -00000188 <load_store\+0x188> 7d ?2c ?25 ?ef ? * cfstr32vc mvfx2, ?\[r12, ?#-239\]! -0000018c <load_store\+0x18c> bd ?2a ?05 ?ff ? * cfstr32lt mvfx0, ?\[r10, ?#-255\]! -00000190 <load_store\+0x190> 3c ?01 ?c5 ?27 ? * cfstr32cc mvfx12, ?\[r1\], ?#-39 -00000194 <load_store\+0x194> ec ?8f ?d5 ?68 ? * cfstr32 mvfx13, ?\[pc\], ?#104 -00000198 <load_store\+0x198> 2c ?00 ?95 ?00 ? * cfstr32cs mvfx9, ?\[r0\], ?#-0 -0000019c <load_store\+0x19c> ac ?8e ?95 ?48 ? * cfstr32ge mvfx9, ?\[lr\], ?#72 -000001a0 <load_store\+0x1a0> 8c ?85 ?d5 ?25 ? * cfstr32hi mvfx13, ?\[r5\], ?#37 -000001a4 <load_store\+0x1a4> cd ?c3 ?65 ?00 ? * cfstr64gt mvdx6, ?\[r3, ?#0\] -000001a8 <load_store\+0x1a8> 5d ?c4 ?e5 ?40 ? * cfstr64pl mvdx14, ?\[r4, ?#64\] -000001ac <load_store\+0x1ac> 1d ?42 ?85 ?9d ? * cfstr64ne mvdx8, ?\[r2, ?#-157\] -000001b0 <load_store\+0x1b0> bd ?c9 ?45 ?01 ? * cfstr64lt mvdx4, ?\[r9, ?#1\] -000001b4 <load_store\+0x1b4> 5d ?47 ?f5 ?3f ? * cfstr64pl mvdx15, ?\[r7, ?#-63\] -000001b8 <load_store\+0x1b8> ed ?68 ?35 ?88 ? * cfstr64 mvdx3, ?\[r8, ?#-136\]! -000001bc <load_store\+0x1bc> 2d ?66 ?15 ?44 ? * cfstr64cs mvdx1, ?\[r6, ?#-68\]! -000001c0 <load_store\+0x1c0> 0d ?ed ?75 ?ff ? * cfstr64eq mvdx7, ?\[sp, ?#255\]! -000001c4 <load_store\+0x1c4> cd ?eb ?a5 ?49 ? * cfstr64gt mvdx10, ?\[r11, ?#73\]! -000001c8 <load_store\+0x1c8> dd ?6c ?65 ?ef ? * cfstr64le mvdx6, ?\[r12, ?#-239\]! -000001cc <load_store\+0x1cc> 9c ?4a ?05 ?ff ? * cfstr64ls mvdx0, ?\[r10\], ?#-255 -000001d0 <load_store\+0x1d0> 9c ?41 ?45 ?27 ? * cfstr64ls mvdx4, ?\[r1\], ?#-39 -000001d4 <load_store\+0x1d4> dc ?cf ?75 ?68 ? * cfstr64le mvdx7, ?\[pc\], ?#104 -000001d8 <load_store\+0x1d8> 6c ?40 ?b5 ?00 ? * cfstr64vs mvdx11, ?\[r0\], ?#-0 -000001dc <load_store\+0x1dc> ec ?ce ?35 ?48 ? * cfstr64 mvdx3, ?\[lr\], ?#72 -# move: -000001e0 <move> 8e ?0f ?54 ?50 ? * cfmvsrhi mvf15, ?r5 -000001e4 <move\+0x4> 6e ?0b ?64 ?50 ? * cfmvsrvs mvf11, ?r6 -000001e8 <move\+0x8> 2e ?09 ?04 ?50 ? * cfmvsrcs mvf9, ?r0 -000001ec <move\+0xc> 5e ?0f ?74 ?50 ? * cfmvsrpl mvf15, ?r7 -000001f0 <move\+0x10> 9e ?04 ?14 ?50 ? * cfmvsrls mvf4, ?r1 -000001f4 <move\+0x14> 3e ?1d ?84 ?50 ? * cfmvrscc r8, ?mvf13 -000001f8 <move\+0x18> 7e ?11 ?f4 ?50 ? * cfmvrsvc pc, ?mvf1 -000001fc <move\+0x1c> ce ?1b ?94 ?50 ? * cfmvrsgt r9, ?mvf11 -00000200 <move\+0x20> 0e ?15 ?a4 ?50 ? * cfmvrseq r10, ?mvf5 -00000204 <move\+0x24> ee ?1c ?44 ?50 ? * cfmvrs r4, ?mvf12 -00000208 <move\+0x28> ae ?01 ?84 ?10 ? * cfmvdlrge mvd1, ?r8 -0000020c <move\+0x2c> ee ?0d ?f4 ?10 ? * cfmvdlr mvd13, ?pc -00000210 <move\+0x30> be ?04 ?94 ?10 ? * cfmvdlrlt mvd4, ?r9 -00000214 <move\+0x34> 9e ?00 ?a4 ?10 ? * cfmvdlrls mvd0, ?r10 -00000218 <move\+0x38> ee ?0a ?44 ?10 ? * cfmvdlr mvd10, ?r4 -0000021c <move\+0x3c> 4e ?13 ?14 ?10 ? * cfmvrdlmi r1, ?mvd3 -00000220 <move\+0x40> 8e ?17 ?24 ?10 ? * cfmvrdlhi r2, ?mvd7 -00000224 <move\+0x44> 2e ?1c ?c4 ?10 ? * cfmvrdlcs r12, ?mvd12 -00000228 <move\+0x48> 6e ?10 ?34 ?10 ? * cfmvrdlvs r3, ?mvd0 -0000022c <move\+0x4c> 7e ?1e ?d4 ?10 ? * cfmvrdlvc sp, ?mvd14 -00000230 <move\+0x50> 3e ?0c ?14 ?30 ? * cfmvdhrcc mvd12, ?r1 -00000234 <move\+0x54> 1e ?08 ?24 ?30 ? * cfmvdhrne mvd8, ?r2 -00000238 <move\+0x58> de ?06 ?c4 ?30 ? * cfmvdhrle mvd6, ?r12 -0000023c <move\+0x5c> 4e ?02 ?34 ?30 ? * cfmvdhrmi mvd2, ?r3 -00000240 <move\+0x60> 0e ?05 ?d4 ?30 ? * cfmvdhreq mvd5, ?sp -00000244 <move\+0x64> ae ?14 ?44 ?30 ? * cfmvrdhge r4, ?mvd4 -00000248 <move\+0x68> ee ?18 ?b4 ?30 ? * cfmvrdh r11, ?mvd8 -0000024c <move\+0x6c> de ?12 ?54 ?30 ? * cfmvrdhle r5, ?mvd2 -00000250 <move\+0x70> 1e ?16 ?64 ?30 ? * cfmvrdhne r6, ?mvd6 -00000254 <move\+0x74> be ?17 ?04 ?30 ? * cfmvrdhlt r0, ?mvd7 -00000258 <move\+0x78> 5e ?0e ?45 ?10 ? * cfmv64lrpl mvdx14, ?r4 -0000025c <move\+0x7c> ce ?0a ?b5 ?10 ? * cfmv64lrgt mvdx10, ?r11 -00000260 <move\+0x80> 8e ?0f ?55 ?10 ? * cfmv64lrhi mvdx15, ?r5 -00000264 <move\+0x84> 6e ?0b ?65 ?10 ? * cfmv64lrvs mvdx11, ?r6 -00000268 <move\+0x88> 2e ?09 ?05 ?10 ? * cfmv64lrcs mvdx9, ?r0 -0000026c <move\+0x8c> 5e ?1a ?d5 ?10 ? * cfmvr64lpl sp, ?mvdx10 -00000270 <move\+0x90> 9e ?1e ?e5 ?10 ? * cfmvr64lls lr, ?mvdx14 -00000274 <move\+0x94> 3e ?1d ?85 ?10 ? * cfmvr64lcc r8, ?mvdx13 -00000278 <move\+0x98> 7e ?11 ?f5 ?10 ? * cfmvr64lvc pc, ?mvdx1 -0000027c <move\+0x9c> ce ?1b ?95 ?10 ? * cfmvr64lgt r9, ?mvdx11 -00000280 <move\+0xa0> 0e ?07 ?d5 ?30 ? * cfmv64hreq mvdx7, ?sp -00000284 <move\+0xa4> ee ?03 ?e5 ?30 ? * cfmv64hr mvdx3, ?lr -00000288 <move\+0xa8> ae ?01 ?85 ?30 ? * cfmv64hrge mvdx1, ?r8 -0000028c <move\+0xac> ee ?0d ?f5 ?30 ? * cfmv64hr mvdx13, ?pc -00000290 <move\+0xb0> be ?04 ?95 ?30 ? * cfmv64hrlt mvdx4, ?r9 -00000294 <move\+0xb4> 9e ?15 ?05 ?30 ? * cfmvr64hls r0, ?mvdx5 -00000298 <move\+0xb8> ee ?19 ?75 ?30 ? * cfmvr64h r7, ?mvdx9 -0000029c <move\+0xbc> 4e ?13 ?15 ?30 ? * cfmvr64hmi r1, ?mvdx3 -000002a0 <move\+0xc0> 8e ?17 ?25 ?30 ? * cfmvr64hhi r2, ?mvdx7 -000002a4 <move\+0xc4> 2e ?1c ?c5 ?30 ? * cfmvr64hcs r12, ?mvdx12 -000002a8 <move\+0xc8> 6e ?10 ?06 ?11 ? * cfmval32vs mvax1, ?mvfx0 -000002ac <move\+0xcc> 7e ?1e ?06 ?13 ? * cfmval32vc mvax3, ?mvfx14 -000002b0 <move\+0xd0> 3e ?1a ?06 ?10 ? * cfmval32cc mvax0, ?mvfx10 -000002b4 <move\+0xd4> 1e ?1f ?06 ?11 ? * cfmval32ne mvax1, ?mvfx15 -000002b8 <move\+0xd8> de ?1b ?06 ?10 ? * cfmval32le mvax0, ?mvfx11 -000002bc <move\+0xdc> 4e ?01 ?06 ?12 ? * cfmv32almi mvfx2, ?mvax1 -000002c0 <move\+0xe0> 0e ?03 ?06 ?15 ? * cfmv32aleq mvfx5, ?mvax3 -000002c4 <move\+0xe4> ae ?00 ?06 ?19 ? * cfmv32alge mvfx9, ?mvax0 -000002c8 <move\+0xe8> ee ?01 ?06 ?13 ? * cfmv32al mvfx3, ?mvax1 -000002cc <move\+0xec> de ?00 ?06 ?17 ? * cfmv32alle mvfx7, ?mvax0 -000002d0 <move\+0xf0> 1e ?16 ?06 ?32 ? * cfmvam32ne mvax2, ?mvfx6 -000002d4 <move\+0xf4> be ?17 ?06 ?30 ? * cfmvam32lt mvax0, ?mvfx7 -000002d8 <move\+0xf8> 5e ?13 ?06 ?32 ? * cfmvam32pl mvax2, ?mvfx3 -000002dc <move\+0xfc> ce ?11 ?06 ?31 ? * cfmvam32gt mvax1, ?mvfx1 -000002e0 <move\+0x100> 8e ?1d ?06 ?33 ? * cfmvam32hi mvax3, ?mvfx13 -000002e4 <move\+0x104> 6e ?02 ?06 ?3b ? * cfmv32amvs mvfx11, ?mvax2 -000002e8 <move\+0x108> 2e ?00 ?06 ?39 ? * cfmv32amcs mvfx9, ?mvax0 -000002ec <move\+0x10c> 5e ?02 ?06 ?3f ? * cfmv32ampl mvfx15, ?mvax2 -000002f0 <move\+0x110> 9e ?01 ?06 ?34 ? * cfmv32amls mvfx4, ?mvax1 -000002f4 <move\+0x114> 3e ?03 ?06 ?38 ? * cfmv32amcc mvfx8, ?mvax3 -000002f8 <move\+0x118> 7e ?11 ?06 ?50 ? * cfmvah32vc mvax0, ?mvfx1 -000002fc <move\+0x11c> ce ?1b ?06 ?50 ? * cfmvah32gt mvax0, ?mvfx11 -00000300 <move\+0x120> 0e ?15 ?06 ?51 ? * cfmvah32eq mvax1, ?mvfx5 -00000304 <move\+0x124> ee ?1c ?06 ?52 ? * cfmvah32 mvax2, ?mvfx12 -00000308 <move\+0x128> ae ?18 ?06 ?53 ? * cfmvah32ge mvax3, ?mvfx8 -0000030c <move\+0x12c> ee ?00 ?06 ?5d ? * cfmv32ah mvfx13, ?mvax0 -00000310 <move\+0x130> be ?00 ?06 ?54 ? * cfmv32ahlt mvfx4, ?mvax0 -00000314 <move\+0x134> 9e ?01 ?06 ?50 ? * cfmv32ahls mvfx0, ?mvax1 -00000318 <move\+0x138> ee ?02 ?06 ?5a ? * cfmv32ah mvfx10, ?mvax2 -0000031c <move\+0x13c> 4e ?03 ?06 ?5e ? * cfmv32ahmi mvfx14, ?mvax3 -00000320 <move\+0x140> 8e ?17 ?06 ?73 ? * cfmva32hi mvax3, ?mvfx7 -00000324 <move\+0x144> 2e ?1c ?06 ?73 ? * cfmva32cs mvax3, ?mvfx12 -00000328 <move\+0x148> 6e ?10 ?06 ?71 ? * cfmva32vs mvax1, ?mvfx0 -0000032c <move\+0x14c> 7e ?1e ?06 ?73 ? * cfmva32vc mvax3, ?mvfx14 -00000330 <move\+0x150> 3e ?1a ?06 ?70 ? * cfmva32cc mvax0, ?mvfx10 -00000334 <move\+0x154> 1e ?03 ?06 ?78 ? * cfmv32ane mvfx8, ?mvax3 -00000338 <move\+0x158> de ?03 ?06 ?76 ? * cfmv32ale mvfx6, ?mvax3 -0000033c <move\+0x15c> 4e ?01 ?06 ?72 ? * cfmv32ami mvfx2, ?mvax1 -00000340 <move\+0x160> 0e ?03 ?06 ?75 ? * cfmv32aeq mvfx5, ?mvax3 -00000344 <move\+0x164> ae ?00 ?06 ?79 ? * cfmv32age mvfx9, ?mvax0 -00000348 <move\+0x168> ee ?18 ?06 ?93 ? * cfmva64 mvax3, ?mvdx8 -0000034c <move\+0x16c> de ?12 ?06 ?92 ? * cfmva64le mvax2, ?mvdx2 -00000350 <move\+0x170> 1e ?16 ?06 ?92 ? * cfmva64ne mvax2, ?mvdx6 -00000354 <move\+0x174> be ?17 ?06 ?90 ? * cfmva64lt mvax0, ?mvdx7 -00000358 <move\+0x178> 5e ?13 ?06 ?92 ? * cfmva64pl mvax2, ?mvdx3 -0000035c <move\+0x17c> ce ?03 ?06 ?9a ? * cfmv64agt mvdx10, ?mvax3 -00000360 <move\+0x180> 8e ?02 ?06 ?9f ? * cfmv64ahi mvdx15, ?mvax2 -00000364 <move\+0x184> 6e ?02 ?06 ?9b ? * cfmv64avs mvdx11, ?mvax2 -00000368 <move\+0x188> 2e ?00 ?06 ?99 ? * cfmv64acs mvdx9, ?mvax0 -0000036c <move\+0x18c> 5e ?02 ?06 ?9f ? * cfmv64apl mvdx15, ?mvax2 -00000370 <move\+0x190> 9e ?1e ?06 ?b0 ? * cfmvsc32ls dspsc, ?mvfx14 -00000374 <move\+0x194> 3e ?1d ?06 ?b0 ? * cfmvsc32cc dspsc, ?mvfx13 -00000378 <move\+0x198> 7e ?11 ?06 ?b0 ? * cfmvsc32vc dspsc, ?mvfx1 -0000037c <move\+0x19c> ce ?1b ?06 ?b0 ? * cfmvsc32gt dspsc, ?mvfx11 -00000380 <move\+0x1a0> 0e ?15 ?06 ?b0 ? * cfmvsc32eq dspsc, ?mvfx5 -00000384 <move\+0x1a4> ee ?00 ?06 ?b3 ? * cfmv32sc mvfx3, ?dspsc -00000388 <move\+0x1a8> ae ?00 ?06 ?b1 ? * cfmv32scge mvfx1, ?dspsc -0000038c <move\+0x1ac> ee ?00 ?06 ?bd ? * cfmv32sc mvfx13, ?dspsc -00000390 <move\+0x1b0> be ?00 ?06 ?b4 ? * cfmv32sclt mvfx4, ?dspsc -00000394 <move\+0x1b4> 9e ?00 ?06 ?b0 ? * cfmv32scls mvfx0, ?dspsc -00000398 <move\+0x1b8> ee ?09 ?a4 ?00 ? * cfcpys mvf10, ?mvf9 -0000039c <move\+0x1bc> 4e ?03 ?e4 ?00 ? * cfcpysmi mvf14, ?mvf3 -000003a0 <move\+0x1c0> 8e ?07 ?d4 ?00 ? * cfcpyshi mvf13, ?mvf7 -000003a4 <move\+0x1c4> 2e ?0c ?14 ?00 ? * cfcpyscs mvf1, ?mvf12 -000003a8 <move\+0x1c8> 6e ?00 ?b4 ?00 ? * cfcpysvs mvf11, ?mvf0 -000003ac <move\+0x1cc> 7e ?0e ?54 ?20 ? * cfcpydvc mvd5, ?mvd14 -000003b0 <move\+0x1d0> 3e ?0a ?c4 ?20 ? * cfcpydcc mvd12, ?mvd10 -000003b4 <move\+0x1d4> 1e ?0f ?84 ?20 ? * cfcpydne mvd8, ?mvd15 -000003b8 <move\+0x1d8> de ?0b ?64 ?20 ? * cfcpydle mvd6, ?mvd11 -000003bc <move\+0x1dc> 4e ?09 ?24 ?20 ? * cfcpydmi mvd2, ?mvd9 -# conv: -000003c0 <conv> 0e ?0f ?54 ?60 ? * cfcvtsdeq mvd5, ?mvf15 -000003c4 <conv\+0x4> ae ?04 ?94 ?60 ? * cfcvtsdge mvd9, ?mvf4 -000003c8 <conv\+0x8> ee ?08 ?34 ?60 ? * cfcvtsd mvd3, ?mvf8 -000003cc <conv\+0xc> de ?02 ?74 ?60 ? * cfcvtsdle mvd7, ?mvf2 -000003d0 <conv\+0x10> 1e ?06 ?c4 ?60 ? * cfcvtsdne mvd12, ?mvf6 -000003d4 <conv\+0x14> be ?07 ?04 ?40 ? * cfcvtdslt mvf0, ?mvd7 -000003d8 <conv\+0x18> 5e ?03 ?e4 ?40 ? * cfcvtdspl mvf14, ?mvd3 -000003dc <conv\+0x1c> ce ?01 ?a4 ?40 ? * cfcvtdsgt mvf10, ?mvd1 -000003e0 <conv\+0x20> 8e ?0d ?f4 ?40 ? * cfcvtdshi mvf15, ?mvd13 -000003e4 <conv\+0x24> 6e ?04 ?b4 ?40 ? * cfcvtdsvs mvf11, ?mvd4 -000003e8 <conv\+0x28> 2e ?00 ?94 ?80 ? * cfcvt32scs mvf9, ?mvfx0 -000003ec <conv\+0x2c> 5e ?0a ?f4 ?80 ? * cfcvt32spl mvf15, ?mvfx10 -000003f0 <conv\+0x30> 9e ?0e ?44 ?80 ? * cfcvt32sls mvf4, ?mvfx14 -000003f4 <conv\+0x34> 3e ?0d ?84 ?80 ? * cfcvt32scc mvf8, ?mvfx13 -000003f8 <conv\+0x38> 7e ?01 ?24 ?80 ? * cfcvt32svc mvf2, ?mvfx1 -000003fc <conv\+0x3c> ce ?0b ?64 ?a0 ? * cfcvt32dgt mvd6, ?mvfx11 -00000400 <conv\+0x40> 0e ?05 ?74 ?a0 ? * cfcvt32deq mvd7, ?mvfx5 -00000404 <conv\+0x44> ee ?0c ?34 ?a0 ? * cfcvt32d mvd3, ?mvfx12 -00000408 <conv\+0x48> ae ?08 ?14 ?a0 ? * cfcvt32dge mvd1, ?mvfx8 -0000040c <conv\+0x4c> ee ?06 ?d4 ?a0 ? * cfcvt32d mvd13, ?mvfx6 -00000410 <conv\+0x50> be ?02 ?44 ?c0 ? * cfcvt64slt mvf4, ?mvdx2 -00000414 <conv\+0x54> 9e ?05 ?04 ?c0 ? * cfcvt64sls mvf0, ?mvdx5 -00000418 <conv\+0x58> ee ?09 ?a4 ?c0 ? * cfcvt64s mvf10, ?mvdx9 -0000041c <conv\+0x5c> 4e ?03 ?e4 ?c0 ? * cfcvt64smi mvf14, ?mvdx3 -00000420 <conv\+0x60> 8e ?07 ?d4 ?c0 ? * cfcvt64shi mvf13, ?mvdx7 -00000424 <conv\+0x64> 2e ?0c ?14 ?e0 ? * cfcvt64dcs mvd1, ?mvdx12 -00000428 <conv\+0x68> 6e ?00 ?b4 ?e0 ? * cfcvt64dvs mvd11, ?mvdx0 -0000042c <conv\+0x6c> 7e ?0e ?54 ?e0 ? * cfcvt64dvc mvd5, ?mvdx14 -00000430 <conv\+0x70> 3e ?0a ?c4 ?e0 ? * cfcvt64dcc mvd12, ?mvdx10 -00000434 <conv\+0x74> 1e ?0f ?84 ?e0 ? * cfcvt64dne mvd8, ?mvdx15 -00000438 <conv\+0x78> de ?1b ?65 ?80 ? * cfcvts32le mvfx6, ?mvf11 -0000043c <conv\+0x7c> 4e ?19 ?25 ?80 ? * cfcvts32mi mvfx2, ?mvf9 -00000440 <conv\+0x80> 0e ?1f ?55 ?80 ? * cfcvts32eq mvfx5, ?mvf15 -00000444 <conv\+0x84> ae ?14 ?95 ?80 ? * cfcvts32ge mvfx9, ?mvf4 -00000448 <conv\+0x88> ee ?18 ?35 ?80 ? * cfcvts32 mvfx3, ?mvf8 -0000044c <conv\+0x8c> de ?12 ?75 ?a0 ? * cfcvtd32le mvfx7, ?mvd2 -00000450 <conv\+0x90> 1e ?16 ?c5 ?a0 ? * cfcvtd32ne mvfx12, ?mvd6 -00000454 <conv\+0x94> be ?17 ?05 ?a0 ? * cfcvtd32lt mvfx0, ?mvd7 -00000458 <conv\+0x98> 5e ?13 ?e5 ?a0 ? * cfcvtd32pl mvfx14, ?mvd3 -0000045c <conv\+0x9c> ce ?11 ?a5 ?a0 ? * cfcvtd32gt mvfx10, ?mvd1 -00000460 <conv\+0xa0> 8e ?1d ?f5 ?c0 ? * cftruncs32hi mvfx15, ?mvf13 -00000464 <conv\+0xa4> 6e ?14 ?b5 ?c0 ? * cftruncs32vs mvfx11, ?mvf4 -00000468 <conv\+0xa8> 2e ?10 ?95 ?c0 ? * cftruncs32cs mvfx9, ?mvf0 -0000046c <conv\+0xac> 5e ?1a ?f5 ?c0 ? * cftruncs32pl mvfx15, ?mvf10 -00000470 <conv\+0xb0> 9e ?1e ?45 ?c0 ? * cftruncs32ls mvfx4, ?mvf14 -00000474 <conv\+0xb4> 3e ?1d ?85 ?e0 ? * cftruncd32cc mvfx8, ?mvd13 -00000478 <conv\+0xb8> 7e ?11 ?25 ?e0 ? * cftruncd32vc mvfx2, ?mvd1 -0000047c <conv\+0xbc> ce ?1b ?65 ?e0 ? * cftruncd32gt mvfx6, ?mvd11 -00000480 <conv\+0xc0> 0e ?15 ?75 ?e0 ? * cftruncd32eq mvfx7, ?mvd5 -00000484 <conv\+0xc4> ee ?1c ?35 ?e0 ? * cftruncd32 mvfx3, ?mvd12 -# shift: -00000488 <shift> ae ?01 ?25 ?58 ? * cfrshl32ge mvfx1, ?mvfx8, ?r2 -0000048c <shift\+0x4> 6e ?0b ?95 ?54 ? * cfrshl32vs mvfx11, ?mvfx4, ?r9 -00000490 <shift\+0x8> 0e ?05 ?75 ?5f ? * cfrshl32eq mvfx5, ?mvfx15, ?r7 -00000494 <shift\+0xc> 4e ?0e ?85 ?53 ? * cfrshl32mi mvfx14, ?mvfx3, ?r8 -00000498 <shift\+0x10> 7e ?02 ?65 ?51 ? * cfrshl32vc mvfx2, ?mvfx1, ?r6 -0000049c <shift\+0x14> be ?00 ?d5 ?77 ? * cfrshl64lt mvdx0, ?mvdx7, ?sp -000004a0 <shift\+0x18> 3e ?0c ?b5 ?7a ? * cfrshl64cc mvdx12, ?mvdx10, ?r11 -000004a4 <shift\+0x1c> ee ?0d ?c5 ?76 ? * cfrshl64 mvdx13, ?mvdx6, ?r12 -000004a8 <shift\+0x20> 2e ?09 ?a5 ?70 ? * cfrshl64cs mvdx9, ?mvdx0, ?r10 -000004ac <shift\+0x24> ae ?09 ?15 ?74 ? * cfrshl64ge mvdx9, ?mvdx4, ?r1 -000004b0 <shift\+0x28> 8e ?07 ?d5 ?41 ? * cfsh32hi mvfx13, ?mvfx7, ?#33 -000004b4 <shift\+0x2c> ce ?0b ?65 ?00 ? * cfsh32gt mvfx6, ?mvfx11, ?#0 -000004b8 <shift\+0x30> 5e ?03 ?e5 ?40 ? * cfsh32pl mvfx14, ?mvfx3, ?#32 -000004bc <shift\+0x34> 1e ?0f ?85 ?c1 ? * cfsh32ne mvfx8, ?mvfx15, ?#-31 -000004c0 <shift\+0x38> be ?02 ?45 ?01 ? * cfsh32lt mvfx4, ?mvfx2, ?#1 -000004c4 <shift\+0x3c> 5e ?2a ?f5 ?c0 ? * cfsh64pl mvdx15, ?mvdx10, ?#-32 -000004c8 <shift\+0x40> ee ?28 ?35 ?c5 ? * cfsh64 mvdx3, ?mvdx8, ?#-27 -000004cc <shift\+0x44> 2e ?2c ?15 ?eb ? * cfsh64cs mvdx1, ?mvdx12, ?#-5 -000004d0 <shift\+0x48> 0e ?25 ?75 ?6f ? * cfsh64eq mvdx7, ?mvdx5, ?#63 -000004d4 <shift\+0x4c> ce ?21 ?a5 ?09 ? * cfsh64gt mvdx10, ?mvdx1, ?#9 -# comp: -000004d8 <comp> de ?1b ?f4 ?94 ? * cfcmpsle pc, ?mvf11, ?mvf4 -000004dc <comp\+0x4> 9e ?15 ?04 ?9f ? * cfcmpsls r0, ?mvf5, ?mvf15 -000004e0 <comp\+0x8> 9e ?1e ?e4 ?93 ? * cfcmpsls lr, ?mvf14, ?mvf3 -000004e4 <comp\+0xc> de ?12 ?54 ?91 ? * cfcmpsle r5, ?mvf2, ?mvf1 -000004e8 <comp\+0x10> 6e ?10 ?34 ?97 ? * cfcmpsvs r3, ?mvf0, ?mvf7 -000004ec <comp\+0x14> ee ?1c ?44 ?ba ? * cfcmpd r4, ?mvd12, ?mvd10 -000004f0 <comp\+0x18> 8e ?1d ?24 ?b6 ? * cfcmpdhi r2, ?mvd13, ?mvd6 -000004f4 <comp\+0x1c> 4e ?19 ?94 ?b0 ? * cfcmpdmi r9, ?mvd9, ?mvd0 -000004f8 <comp\+0x20> ee ?19 ?74 ?b4 ? * cfcmpd r7, ?mvd9, ?mvd4 -000004fc <comp\+0x24> 3e ?1d ?84 ?b7 ? * cfcmpdcc r8, ?mvd13, ?mvd7 -00000500 <comp\+0x28> 1e ?16 ?65 ?9b ? * cfcmp32ne r6, ?mvfx6, ?mvfx11 -00000504 <comp\+0x2c> 7e ?1e ?d5 ?93 ? * cfcmp32vc sp, ?mvfx14, ?mvfx3 -00000508 <comp\+0x30> ae ?18 ?b5 ?9f ? * cfcmp32ge r11, ?mvfx8, ?mvfx15 -0000050c <comp\+0x34> 6e ?14 ?c5 ?92 ? * cfcmp32vs r12, ?mvfx4, ?mvfx2 -00000510 <comp\+0x38> 0e ?1f ?a5 ?9a ? * cfcmp32eq r10, ?mvfx15, ?mvfx10 -00000514 <comp\+0x3c> 4e ?13 ?15 ?b8 ? * cfcmp64mi r1, ?mvdx3, ?mvdx8 -00000518 <comp\+0x40> 7e ?11 ?f5 ?bc ? * cfcmp64vc pc, ?mvdx1, ?mvdx12 -0000051c <comp\+0x44> be ?17 ?05 ?b5 ? * cfcmp64lt r0, ?mvdx7, ?mvdx5 -00000520 <comp\+0x48> 3e ?1a ?e5 ?b1 ? * cfcmp64cc lr, ?mvdx10, ?mvdx1 -00000524 <comp\+0x4c> ee ?16 ?55 ?bb ? * cfcmp64 r5, ?mvdx6, ?mvdx11 -# fp_arith: -00000528 <fp_arith> 2e ?30 ?94 ?00 ? * cfabsscs mvf9, ?mvf0 -0000052c <fp_arith\+0x4> 5e ?3a ?f4 ?00 ? * cfabsspl mvf15, ?mvf10 -00000530 <fp_arith\+0x8> 9e ?3e ?44 ?00 ? * cfabssls mvf4, ?mvf14 -00000534 <fp_arith\+0xc> 3e ?3d ?84 ?00 ? * cfabsscc mvf8, ?mvf13 -00000538 <fp_arith\+0x10> 7e ?31 ?24 ?00 ? * cfabssvc mvf2, ?mvf1 -0000053c <fp_arith\+0x14> ce ?3b ?64 ?20 ? * cfabsdgt mvd6, ?mvd11 -00000540 <fp_arith\+0x18> 0e ?35 ?74 ?20 ? * cfabsdeq mvd7, ?mvd5 -00000544 <fp_arith\+0x1c> ee ?3c ?34 ?20 ? * cfabsd mvd3, ?mvd12 -00000548 <fp_arith\+0x20> ae ?38 ?14 ?20 ? * cfabsdge mvd1, ?mvd8 -0000054c <fp_arith\+0x24> ee ?36 ?d4 ?20 ? * cfabsd mvd13, ?mvd6 -00000550 <fp_arith\+0x28> be ?32 ?44 ?40 ? * cfnegslt mvf4, ?mvf2 -00000554 <fp_arith\+0x2c> 9e ?35 ?04 ?40 ? * cfnegsls mvf0, ?mvf5 -00000558 <fp_arith\+0x30> ee ?39 ?a4 ?40 ? * cfnegs mvf10, ?mvf9 -0000055c <fp_arith\+0x34> 4e ?33 ?e4 ?40 ? * cfnegsmi mvf14, ?mvf3 -00000560 <fp_arith\+0x38> 8e ?37 ?d4 ?40 ? * cfnegshi mvf13, ?mvf7 -00000564 <fp_arith\+0x3c> 2e ?3c ?14 ?60 ? * cfnegdcs mvd1, ?mvd12 -00000568 <fp_arith\+0x40> 6e ?30 ?b4 ?60 ? * cfnegdvs mvd11, ?mvd0 -0000056c <fp_arith\+0x44> 7e ?3e ?54 ?60 ? * cfnegdvc mvd5, ?mvd14 -00000570 <fp_arith\+0x48> 3e ?3a ?c4 ?60 ? * cfnegdcc mvd12, ?mvd10 -00000574 <fp_arith\+0x4c> 1e ?3f ?84 ?60 ? * cfnegdne mvd8, ?mvd15 -00000578 <fp_arith\+0x50> de ?3b ?64 ?84 ? * cfaddsle mvf6, ?mvf11, ?mvf4 -0000057c <fp_arith\+0x54> 9e ?35 ?04 ?8f ? * cfaddsls mvf0, ?mvf5, ?mvf15 -00000580 <fp_arith\+0x58> 9e ?3e ?44 ?83 ? * cfaddsls mvf4, ?mvf14, ?mvf3 -00000584 <fp_arith\+0x5c> de ?32 ?74 ?81 ? * cfaddsle mvf7, ?mvf2, ?mvf1 -00000588 <fp_arith\+0x60> 6e ?30 ?b4 ?87 ? * cfaddsvs mvf11, ?mvf0, ?mvf7 -0000058c <fp_arith\+0x64> ee ?3c ?34 ?aa ? * cfaddd mvd3, ?mvd12, ?mvd10 -00000590 <fp_arith\+0x68> 8e ?3d ?f4 ?a6 ? * cfadddhi mvd15, ?mvd13, ?mvd6 -00000594 <fp_arith\+0x6c> 4e ?39 ?24 ?a0 ? * cfadddmi mvd2, ?mvd9, ?mvd0 -00000598 <fp_arith\+0x70> ee ?39 ?a4 ?a4 ? * cfaddd mvd10, ?mvd9, ?mvd4 -0000059c <fp_arith\+0x74> 3e ?3d ?84 ?a7 ? * cfadddcc mvd8, ?mvd13, ?mvd7 -000005a0 <fp_arith\+0x78> 1e ?36 ?c4 ?cb ? * cfsubsne mvf12, ?mvf6, ?mvf11 -000005a4 <fp_arith\+0x7c> 7e ?3e ?54 ?c3 ? * cfsubsvc mvf5, ?mvf14, ?mvf3 -000005a8 <fp_arith\+0x80> ae ?38 ?14 ?cf ? * cfsubsge mvf1, ?mvf8, ?mvf15 -000005ac <fp_arith\+0x84> 6e ?34 ?b4 ?c2 ? * cfsubsvs mvf11, ?mvf4, ?mvf2 -000005b0 <fp_arith\+0x88> 0e ?3f ?54 ?ca ? * cfsubseq mvf5, ?mvf15, ?mvf10 -000005b4 <fp_arith\+0x8c> 4e ?33 ?e4 ?e8 ? * cfsubdmi mvd14, ?mvd3, ?mvd8 -000005b8 <fp_arith\+0x90> 7e ?31 ?24 ?ec ? * cfsubdvc mvd2, ?mvd1, ?mvd12 -000005bc <fp_arith\+0x94> be ?37 ?04 ?e5 ? * cfsubdlt mvd0, ?mvd7, ?mvd5 -000005c0 <fp_arith\+0x98> 3e ?3a ?c4 ?e1 ? * cfsubdcc mvd12, ?mvd10, ?mvd1 -000005c4 <fp_arith\+0x9c> ee ?36 ?d4 ?eb ? * cfsubd mvd13, ?mvd6, ?mvd11 -000005c8 <fp_arith\+0xa0> 2e ?10 ?94 ?05 ? * cfmulscs mvf9, ?mvf0, ?mvf5 -000005cc <fp_arith\+0xa4> ae ?14 ?94 ?0e ? * cfmulsge mvf9, ?mvf4, ?mvf14 -000005d0 <fp_arith\+0xa8> 8e ?17 ?d4 ?02 ? * cfmulshi mvf13, ?mvf7, ?mvf2 -000005d4 <fp_arith\+0xac> ce ?1b ?64 ?00 ? * cfmulsgt mvf6, ?mvf11, ?mvf0 -000005d8 <fp_arith\+0xb0> 5e ?13 ?e4 ?0c ? * cfmulspl mvf14, ?mvf3, ?mvf12 -000005dc <fp_arith\+0xb4> 1e ?1f ?84 ?2d ? * cfmuldne mvd8, ?mvd15, ?mvd13 -000005e0 <fp_arith\+0xb8> be ?12 ?44 ?29 ? * cfmuldlt mvd4, ?mvd2, ?mvd9 -000005e4 <fp_arith\+0xbc> 5e ?1a ?f4 ?29 ? * cfmuldpl mvd15, ?mvd10, ?mvd9 -000005e8 <fp_arith\+0xc0> ee ?18 ?34 ?2d ? * cfmuld mvd3, ?mvd8, ?mvd13 -000005ec <fp_arith\+0xc4> 2e ?1c ?14 ?26 ? * cfmuldcs mvd1, ?mvd12, ?mvd6 -# int_arith: -000005f0 <int_arith> 0e ?35 ?75 ?00 ? * cfabs32eq mvfx7, ?mvfx5 -000005f4 <int_arith\+0x4> ee ?3c ?35 ?00 ? * cfabs32 mvfx3, ?mvfx12 -000005f8 <int_arith\+0x8> ae ?38 ?15 ?00 ? * cfabs32ge mvfx1, ?mvfx8 -000005fc <int_arith\+0xc> ee ?36 ?d5 ?00 ? * cfabs32 mvfx13, ?mvfx6 -00000600 <int_arith\+0x10> be ?32 ?45 ?00 ? * cfabs32lt mvfx4, ?mvfx2 -00000604 <int_arith\+0x14> 9e ?35 ?05 ?20 ? * cfabs64ls mvdx0, ?mvdx5 -00000608 <int_arith\+0x18> ee ?39 ?a5 ?20 ? * cfabs64 mvdx10, ?mvdx9 -0000060c <int_arith\+0x1c> 4e ?33 ?e5 ?20 ? * cfabs64mi mvdx14, ?mvdx3 -00000610 <int_arith\+0x20> 8e ?37 ?d5 ?20 ? * cfabs64hi mvdx13, ?mvdx7 -00000614 <int_arith\+0x24> 2e ?3c ?15 ?20 ? * cfabs64cs mvdx1, ?mvdx12 -00000618 <int_arith\+0x28> 6e ?30 ?b5 ?40 ? * cfneg32vs mvfx11, ?mvfx0 -0000061c <int_arith\+0x2c> 7e ?3e ?55 ?40 ? * cfneg32vc mvfx5, ?mvfx14 -00000620 <int_arith\+0x30> 3e ?3a ?c5 ?40 ? * cfneg32cc mvfx12, ?mvfx10 -00000624 <int_arith\+0x34> 1e ?3f ?85 ?40 ? * cfneg32ne mvfx8, ?mvfx15 -00000628 <int_arith\+0x38> de ?3b ?65 ?40 ? * cfneg32le mvfx6, ?mvfx11 -0000062c <int_arith\+0x3c> 4e ?39 ?25 ?60 ? * cfneg64mi mvdx2, ?mvdx9 -00000630 <int_arith\+0x40> 0e ?3f ?55 ?60 ? * cfneg64eq mvdx5, ?mvdx15 -00000634 <int_arith\+0x44> ae ?34 ?95 ?60 ? * cfneg64ge mvdx9, ?mvdx4 -00000638 <int_arith\+0x48> ee ?38 ?35 ?60 ? * cfneg64 mvdx3, ?mvdx8 -0000063c <int_arith\+0x4c> de ?32 ?75 ?60 ? * cfneg64le mvdx7, ?mvdx2 -00000640 <int_arith\+0x50> 1e ?36 ?c5 ?8b ? * cfadd32ne mvfx12, ?mvfx6, ?mvfx11 -00000644 <int_arith\+0x54> 7e ?3e ?55 ?83 ? * cfadd32vc mvfx5, ?mvfx14, ?mvfx3 -00000648 <int_arith\+0x58> ae ?38 ?15 ?8f ? * cfadd32ge mvfx1, ?mvfx8, ?mvfx15 -0000064c <int_arith\+0x5c> 6e ?34 ?b5 ?82 ? * cfadd32vs mvfx11, ?mvfx4, ?mvfx2 -00000650 <int_arith\+0x60> 0e ?3f ?55 ?8a ? * cfadd32eq mvfx5, ?mvfx15, ?mvfx10 -00000654 <int_arith\+0x64> 4e ?33 ?e5 ?a8 ? * cfadd64mi mvdx14, ?mvdx3, ?mvdx8 -00000658 <int_arith\+0x68> 7e ?31 ?25 ?ac ? * cfadd64vc mvdx2, ?mvdx1, ?mvdx12 -0000065c <int_arith\+0x6c> be ?37 ?05 ?a5 ? * cfadd64lt mvdx0, ?mvdx7, ?mvdx5 -00000660 <int_arith\+0x70> 3e ?3a ?c5 ?a1 ? * cfadd64cc mvdx12, ?mvdx10, ?mvdx1 -00000664 <int_arith\+0x74> ee ?36 ?d5 ?ab ? * cfadd64 mvdx13, ?mvdx6, ?mvdx11 -00000668 <int_arith\+0x78> 2e ?30 ?95 ?c5 ? * cfsub32cs mvfx9, ?mvfx0, ?mvfx5 -0000066c <int_arith\+0x7c> ae ?34 ?95 ?ce ? * cfsub32ge mvfx9, ?mvfx4, ?mvfx14 -00000670 <int_arith\+0x80> 8e ?37 ?d5 ?c2 ? * cfsub32hi mvfx13, ?mvfx7, ?mvfx2 -00000674 <int_arith\+0x84> ce ?3b ?65 ?c0 ? * cfsub32gt mvfx6, ?mvfx11, ?mvfx0 -00000678 <int_arith\+0x88> 5e ?33 ?e5 ?cc ? * cfsub32pl mvfx14, ?mvfx3, ?mvfx12 -0000067c <int_arith\+0x8c> 1e ?3f ?85 ?ed ? * cfsub64ne mvdx8, ?mvdx15, ?mvdx13 -00000680 <int_arith\+0x90> be ?32 ?45 ?e9 ? * cfsub64lt mvdx4, ?mvdx2, ?mvdx9 -00000684 <int_arith\+0x94> 5e ?3a ?f5 ?e9 ? * cfsub64pl mvdx15, ?mvdx10, ?mvdx9 -00000688 <int_arith\+0x98> ee ?38 ?35 ?ed ? * cfsub64 mvdx3, ?mvdx8, ?mvdx13 -0000068c <int_arith\+0x9c> 2e ?3c ?15 ?e6 ? * cfsub64cs mvdx1, ?mvdx12, ?mvdx6 -00000690 <int_arith\+0xa0> 0e ?15 ?75 ?0e ? * cfmul32eq mvfx7, ?mvfx5, ?mvfx14 -00000694 <int_arith\+0xa4> ce ?11 ?a5 ?08 ? * cfmul32gt mvfx10, ?mvfx1, ?mvfx8 -00000698 <int_arith\+0xa8> de ?1b ?65 ?04 ? * cfmul32le mvfx6, ?mvfx11, ?mvfx4 -0000069c <int_arith\+0xac> 9e ?15 ?05 ?0f ? * cfmul32ls mvfx0, ?mvfx5, ?mvfx15 -000006a0 <int_arith\+0xb0> 9e ?1e ?45 ?03 ? * cfmul32ls mvfx4, ?mvfx14, ?mvfx3 -000006a4 <int_arith\+0xb4> de ?12 ?75 ?21 ? * cfmul64le mvdx7, ?mvdx2, ?mvdx1 -000006a8 <int_arith\+0xb8> 6e ?10 ?b5 ?27 ? * cfmul64vs mvdx11, ?mvdx0, ?mvdx7 -000006ac <int_arith\+0xbc> ee ?1c ?35 ?2a ? * cfmul64 mvdx3, ?mvdx12, ?mvdx10 -000006b0 <int_arith\+0xc0> 8e ?1d ?f5 ?26 ? * cfmul64hi mvdx15, ?mvdx13, ?mvdx6 -000006b4 <int_arith\+0xc4> 4e ?19 ?25 ?20 ? * cfmul64mi mvdx2, ?mvdx9, ?mvdx0 -000006b8 <int_arith\+0xc8> ee ?19 ?a5 ?44 ? * cfmac32 mvfx10, ?mvfx9, ?mvfx4 -000006bc <int_arith\+0xcc> 3e ?1d ?85 ?47 ? * cfmac32cc mvfx8, ?mvfx13, ?mvfx7 -000006c0 <int_arith\+0xd0> 1e ?16 ?c5 ?4b ? * cfmac32ne mvfx12, ?mvfx6, ?mvfx11 -000006c4 <int_arith\+0xd4> 7e ?1e ?55 ?43 ? * cfmac32vc mvfx5, ?mvfx14, ?mvfx3 -000006c8 <int_arith\+0xd8> ae ?18 ?15 ?4f ? * cfmac32ge mvfx1, ?mvfx8, ?mvfx15 -000006cc <int_arith\+0xdc> 6e ?14 ?b5 ?62 ? * cfmsc32vs mvfx11, ?mvfx4, ?mvfx2 -000006d0 <int_arith\+0xe0> 0e ?1f ?55 ?6a ? * cfmsc32eq mvfx5, ?mvfx15, ?mvfx10 -000006d4 <int_arith\+0xe4> 4e ?13 ?e5 ?68 ? * cfmsc32mi mvfx14, ?mvfx3, ?mvfx8 -000006d8 <int_arith\+0xe8> 7e ?11 ?25 ?6c ? * cfmsc32vc mvfx2, ?mvfx1, ?mvfx12 -000006dc <int_arith\+0xec> be ?17 ?05 ?65 ? * cfmsc32lt mvfx0, ?mvfx7, ?mvfx5 -# acc_arith: -000006e0 <acc_arith> 3e ?01 ?a6 ?08 ? * cfmadd32cc mvax0, ?mvfx10, ?mvfx1, ?mvfx8 -000006e4 <acc_arith\+0x4> ee ?0b ?66 ?44 ? * cfmadd32 mvax2, ?mvfx6, ?mvfx11, ?mvfx4 -000006e8 <acc_arith\+0x8> 2e ?05 ?06 ?2f ? * cfmadd32cs mvax1, ?mvfx0, ?mvfx5, ?mvfx15 -000006ec <acc_arith\+0xc> ae ?0e ?46 ?43 ? * cfmadd32ge mvax2, ?mvfx4, ?mvfx14, ?mvfx3 -000006f0 <acc_arith\+0x10> 8e ?02 ?76 ?61 ? * cfmadd32hi mvax3, ?mvfx7, ?mvfx2, ?mvfx1 -000006f4 <acc_arith\+0x14> ce ?10 ?b6 ?07 ? * cfmsub32gt mvax0, ?mvfx11, ?mvfx0, ?mvfx7 -000006f8 <acc_arith\+0x18> 5e ?1c ?36 ?4a ? * cfmsub32pl mvax2, ?mvfx3, ?mvfx12, ?mvfx10 -000006fc <acc_arith\+0x1c> 1e ?1d ?f6 ?26 ? * cfmsub32ne mvax1, ?mvfx15, ?mvfx13, ?mvfx6 -00000700 <acc_arith\+0x20> be ?19 ?26 ?40 ? * cfmsub32lt mvax2, ?mvfx2, ?mvfx9, ?mvfx0 -00000704 <acc_arith\+0x24> 5e ?19 ?a6 ?64 ? * cfmsub32pl mvax3, ?mvfx10, ?mvfx9, ?mvfx4 -00000708 <acc_arith\+0x28> ee ?2d ?16 ?67 ? * cfmadda32 mvax3, ?mvax1, ?mvfx13, ?mvfx7 -0000070c <acc_arith\+0x2c> 2e ?26 ?26 ?6b ? * cfmadda32cs mvax3, ?mvax2, ?mvfx6, ?mvfx11 -00000710 <acc_arith\+0x30> 0e ?2e ?36 ?23 ? * cfmadda32eq mvax1, ?mvax3, ?mvfx14, ?mvfx3 -00000714 <acc_arith\+0x34> ce ?28 ?36 ?2f ? * cfmadda32gt mvax1, ?mvax3, ?mvfx8, ?mvfx15 -00000718 <acc_arith\+0x38> de ?24 ?36 ?02 ? * cfmadda32le mvax0, ?mvax3, ?mvfx4, ?mvfx2 -0000071c <acc_arith\+0x3c> 9e ?3f ?16 ?0a ? * cfmsuba32ls mvax0, ?mvax1, ?mvfx15, ?mvfx10 -00000720 <acc_arith\+0x40> 9e ?33 ?16 ?08 ? * cfmsuba32ls mvax0, ?mvax1, ?mvfx3, ?mvfx8 -00000724 <acc_arith\+0x44> de ?31 ?06 ?4c ? * cfmsuba32le mvax2, ?mvax0, ?mvfx1, ?mvfx12 -00000728 <acc_arith\+0x48> 6e ?37 ?06 ?25 ? * cfmsuba32vs mvax1, ?mvax0, ?mvfx7, ?mvfx5 -0000072c <acc_arith\+0x4c> ee ?3a ?06 ?41 ? * cfmsuba32 mvax2, ?mvax0, ?mvfx10, ?mvfx1 diff --git a/gas/testsuite/gas/arm/maverick.s b/gas/testsuite/gas/arm/maverick.s deleted file mode 100644 index dd56899049..0000000000 --- a/gas/testsuite/gas/arm/maverick.s +++ /dev/null @@ -1,470 +0,0 @@ - .text - .align -load_store: - cfldrseq mvf5, [sp, #255] - cfldrsmi mvf14, [r11, #73] - cfldrsvc mvf2, [r12, #-239] - cfldrslt mvf0, [r10, #-255] - cfldrscc mvf12, [r1, #-39] - cfldrs mvf13, [r15, #104]! - cfldrscs mvf9, [r0, #-0]! - cfldrsge mvf9, [lr, #72]! - cfldrshi mvf13, [r5, #37]! - cfldrsgt mvf6, [r3, #0]! - cfldrspl mvf14, [r4], #64 - cfldrsne mvf8, [r2], #-157 - cfldrslt mvf4, [r9], #1 - cfldrspl mvf15, [r7], #-63 - cfldrsal mvf3, [r8], #-136 - cfldrdcs mvd1, [r6, #-68] - cfldrdeq mvd7, [r13, #255] - cfldrdgt mvd10, [r11, #73] - cfldrdle mvd6, [r12, #-239] - cfldrdls mvd0, [r10, #-255] - cfldrdls mvd4, [r1, #-39]! - cfldrdle mvd7, [pc, #104]! - cfldrdvs mvd11, [r0, #-0]! - cfldrdal mvd3, [r14, #72]! - cfldrdhi mvd15, [r5, #37]! - cfldrdmi mvd2, [r3], #0 - cfldrd mvd10, [r4], #64 - cfldrdcc mvd8, [r2], #-157 - cfldrdne mvd12, [r9], #1 - cfldrdvc mvd5, [r7], #-63 - cfldr32ge mvfx1, [r8, #-136] - cfldr32vs mvfx11, [r6, #-68] - cfldr32eq mvfx5, [sp, #255] - cfldr32mi mvfx14, [r11, #73] - cfldr32vc mvfx2, [r12, #-239] - cfldr32lt mvfx0, [r10, #-255]! - cfldr32cc mvfx12, [r1, #-39]! - cfldr32 mvfx13, [r15, #104]! - cfldr32cs mvfx9, [r0, #-0]! - cfldr32ge mvfx9, [lr, #72]! - cfldr32hi mvfx13, [r5], #37 - cfldr32gt mvfx6, [r3], #0 - cfldr32pl mvfx14, [r4], #64 - cfldr32ne mvfx8, [r2], #-157 - cfldr32lt mvfx4, [r9], #1 - cfldr64pl mvdx15, [r7, #-63] - cfldr64al mvdx3, [r8, #-136] - cfldr64cs mvdx1, [r6, #-68] - cfldr64eq mvdx7, [r13, #255] - cfldr64gt mvdx10, [r11, #73] - cfldr64le mvdx6, [r12, #-239]! - cfldr64ls mvdx0, [r10, #-255]! - cfldr64ls mvdx4, [r1, #-39]! - cfldr64le mvdx7, [pc, #104]! - cfldr64vs mvdx11, [r0, #-0]! - cfldr64al mvdx3, [r14], #72 - cfldr64hi mvdx15, [r5], #37 - cfldr64mi mvdx2, [r3], #0 - cfldr64 mvdx10, [r4], #64 - cfldr64cc mvdx8, [r2], #-157 - cfstrsne mvf12, [r9, #1] - cfstrsvc mvf5, [r7, #-63] - cfstrsge mvf1, [r8, #-136] - cfstrsvs mvf11, [r6, #-68] - cfstrseq mvf5, [sp, #255] - cfstrsmi mvf14, [r11, #73]! - cfstrsvc mvf2, [r12, #-239]! - cfstrslt mvf0, [r10, #-255]! - cfstrscc mvf12, [r1, #-39]! - cfstrs mvf13, [r15, #104]! - cfstrscs mvf9, [r0], #-0 - cfstrsge mvf9, [lr], #72 - cfstrshi mvf13, [r5], #37 - cfstrsgt mvf6, [r3], #0 - cfstrspl mvf14, [r4], #64 - cfstrdne mvd8, [r2, #-157] - cfstrdlt mvd4, [r9, #1] - cfstrdpl mvd15, [r7, #-63] - cfstrdal mvd3, [r8, #-136] - cfstrdcs mvd1, [r6, #-68] - cfstrdeq mvd7, [r13, #255]! - cfstrdgt mvd10, [r11, #73]! - cfstrdle mvd6, [r12, #-239]! - cfstrdls mvd0, [r10, #-255]! - cfstrdls mvd4, [r1, #-39]! - cfstrdle mvd7, [pc], #104 - cfstrdvs mvd11, [r0], #-0 - cfstrdal mvd3, [r14], #72 - cfstrdhi mvd15, [r5], #37 - cfstrdmi mvd2, [r3], #0 - cfstr32 mvfx10, [r4, #64] - cfstr32cc mvfx8, [r2, #-157] - cfstr32ne mvfx12, [r9, #1] - cfstr32vc mvfx5, [r7, #-63] - cfstr32ge mvfx1, [r8, #-136] - cfstr32vs mvfx11, [r6, #-68]! - cfstr32eq mvfx5, [sp, #255]! - cfstr32mi mvfx14, [r11, #73]! - cfstr32vc mvfx2, [r12, #-239]! - cfstr32lt mvfx0, [r10, #-255]! - cfstr32cc mvfx12, [r1], #-39 - cfstr32 mvfx13, [r15], #104 - cfstr32cs mvfx9, [r0], #-0 - cfstr32ge mvfx9, [lr], #72 - cfstr32hi mvfx13, [r5], #37 - cfstr64gt mvdx6, [r3, #0] - cfstr64pl mvdx14, [r4, #64] - cfstr64ne mvdx8, [r2, #-157] - cfstr64lt mvdx4, [r9, #1] - cfstr64pl mvdx15, [r7, #-63] - cfstr64al mvdx3, [r8, #-136]! - cfstr64cs mvdx1, [r6, #-68]! - cfstr64eq mvdx7, [r13, #255]! - cfstr64gt mvdx10, [r11, #73]! - cfstr64le mvdx6, [r12, #-239]! - cfstr64ls mvdx0, [r10], #-255 - cfstr64ls mvdx4, [r1], #-39 - cfstr64le mvdx7, [pc], #104 - cfstr64vs mvdx11, [r0], #-0 - cfstr64al mvdx3, [r14], #72 -move: - cfmvsrhi mvf15, r5 - cfmvsrvs mvf11, r6 - cfmvsrcs mvf9, r0 - cfmvsrpl mvf15, r7 - cfmvsrls mvf4, r1 - cfmvrscc r8, mvf13 - cfmvrsvc pc, mvf1 - cfmvrsgt r9, mvf11 - cfmvrseq r10, mvf5 - cfmvrsal r4, mvf12 - cfmvdlrge mvd1, r8 - cfmvdlr mvd13, r15 - cfmvdlrlt mvd4, r9 - cfmvdlrls mvd0, r10 - cfmvdlr mvd10, r4 - cfmvrdlmi r1, mvd3 - cfmvrdlhi r2, mvd7 - cfmvrdlcs r12, mvd12 - cfmvrdlvs r3, mvd0 - cfmvrdlvc r13, mvd14 - cfmvdhrcc mvd12, r1 - cfmvdhrne mvd8, r2 - cfmvdhrle mvd6, r12 - cfmvdhrmi mvd2, r3 - cfmvdhreq mvd5, sp - cfmvrdhge r4, mvd4 - cfmvrdhal r11, mvd8 - cfmvrdhle r5, mvd2 - cfmvrdhne r6, mvd6 - cfmvrdhlt r0, mvd7 - cfmv64lrpl mvdx14, r4 - cfmv64lrgt mvdx10, r11 - cfmv64lrhi mvdx15, r5 - cfmv64lrvs mvdx11, r6 - cfmv64lrcs mvdx9, r0 - cfmvr64lpl sp, mvdx10 - cfmvr64lls lr, mvdx14 - cfmvr64lcc r8, mvdx13 - cfmvr64lvc pc, mvdx1 - cfmvr64lgt r9, mvdx11 - cfmv64hreq mvdx7, r13 - cfmv64hral mvdx3, r14 - cfmv64hrge mvdx1, r8 - cfmv64hr mvdx13, r15 - cfmv64hrlt mvdx4, r9 - cfmvr64hls r0, mvdx5 - cfmvr64h r7, mvdx9 - cfmvr64hmi r1, mvdx3 - cfmvr64hhi r2, mvdx7 - cfmvr64hcs r12, mvdx12 - cfmval32vs mvax1, mvfx0 - cfmval32vc mvax3, mvfx14 - cfmval32cc mvax0, mvfx10 - cfmval32ne mvax1, mvfx15 - cfmval32le mvax0, mvfx11 - cfmv32almi mvfx2, mvax1 - cfmv32aleq mvfx5, mvax3 - cfmv32alge mvfx9, mvax0 - cfmv32alal mvfx3, mvax1 - cfmv32alle mvfx7, mvax0 - cfmvam32ne mvax2, mvfx6 - cfmvam32lt mvax0, mvfx7 - cfmvam32pl mvax2, mvfx3 - cfmvam32gt mvax1, mvfx1 - cfmvam32hi mvax3, mvfx13 - cfmv32amvs mvfx11, mvax2 - cfmv32amcs mvfx9, mvax0 - cfmv32ampl mvfx15, mvax2 - cfmv32amls mvfx4, mvax1 - cfmv32amcc mvfx8, mvax3 - cfmvah32vc mvax0, mvfx1 - cfmvah32gt mvax0, mvfx11 - cfmvah32eq mvax1, mvfx5 - cfmvah32al mvax2, mvfx12 - cfmvah32ge mvax3, mvfx8 - cfmv32ah mvfx13, mvax0 - cfmv32ahlt mvfx4, mvax0 - cfmv32ahls mvfx0, mvax1 - cfmv32ah mvfx10, mvax2 - cfmv32ahmi mvfx14, mvax3 - cfmva32hi mvax3, mvfx7 - cfmva32cs mvax3, mvfx12 - cfmva32vs mvax1, mvfx0 - cfmva32vc mvax3, mvfx14 - cfmva32cc mvax0, mvfx10 - cfmv32ane mvfx8, mvax3 - cfmv32ale mvfx6, mvax3 - cfmv32ami mvfx2, mvax1 - cfmv32aeq mvfx5, mvax3 - cfmv32age mvfx9, mvax0 - cfmva64al mvax3, mvdx8 - cfmva64le mvax2, mvdx2 - cfmva64ne mvax2, mvdx6 - cfmva64lt mvax0, mvdx7 - cfmva64pl mvax2, mvdx3 - cfmv64agt mvdx10, mvax3 - cfmv64ahi mvdx15, mvax2 - cfmv64avs mvdx11, mvax2 - cfmv64acs mvdx9, mvax0 - cfmv64apl mvdx15, mvax2 - cfmvsc32ls dspsc, mvfx14 - cfmvsc32cc dspsc, mvfx13 - cfmvsc32vc dspsc, mvfx1 - cfmvsc32gt dspsc, mvfx11 - cfmvsc32eq dspsc, mvfx5 - cfmv32scal mvfx3, dspsc - cfmv32scge mvfx1, dspsc - cfmv32sc mvfx13, dspsc - cfmv32sclt mvfx4, dspsc - cfmv32scls mvfx0, dspsc - cfcpys mvf10, mvf9 - cfcpysmi mvf14, mvf3 - cfcpyshi mvf13, mvf7 - cfcpyscs mvf1, mvf12 - cfcpysvs mvf11, mvf0 - cfcpydvc mvd5, mvd14 - cfcpydcc mvd12, mvd10 - cfcpydne mvd8, mvd15 - cfcpydle mvd6, mvd11 - cfcpydmi mvd2, mvd9 -conv: - cfcvtsdeq mvd5, mvf15 - cfcvtsdge mvd9, mvf4 - cfcvtsdal mvd3, mvf8 - cfcvtsdle mvd7, mvf2 - cfcvtsdne mvd12, mvf6 - cfcvtdslt mvf0, mvd7 - cfcvtdspl mvf14, mvd3 - cfcvtdsgt mvf10, mvd1 - cfcvtdshi mvf15, mvd13 - cfcvtdsvs mvf11, mvd4 - cfcvt32scs mvf9, mvfx0 - cfcvt32spl mvf15, mvfx10 - cfcvt32sls mvf4, mvfx14 - cfcvt32scc mvf8, mvfx13 - cfcvt32svc mvf2, mvfx1 - cfcvt32dgt mvd6, mvfx11 - cfcvt32deq mvd7, mvfx5 - cfcvt32dal mvd3, mvfx12 - cfcvt32dge mvd1, mvfx8 - cfcvt32d mvd13, mvfx6 - cfcvt64slt mvf4, mvdx2 - cfcvt64sls mvf0, mvdx5 - cfcvt64s mvf10, mvdx9 - cfcvt64smi mvf14, mvdx3 - cfcvt64shi mvf13, mvdx7 - cfcvt64dcs mvd1, mvdx12 - cfcvt64dvs mvd11, mvdx0 - cfcvt64dvc mvd5, mvdx14 - cfcvt64dcc mvd12, mvdx10 - cfcvt64dne mvd8, mvdx15 - cfcvts32le mvfx6, mvf11 - cfcvts32mi mvfx2, mvf9 - cfcvts32eq mvfx5, mvf15 - cfcvts32ge mvfx9, mvf4 - cfcvts32al mvfx3, mvf8 - cfcvtd32le mvfx7, mvd2 - cfcvtd32ne mvfx12, mvd6 - cfcvtd32lt mvfx0, mvd7 - cfcvtd32pl mvfx14, mvd3 - cfcvtd32gt mvfx10, mvd1 - cftruncs32hi mvfx15, mvf13 - cftruncs32vs mvfx11, mvf4 - cftruncs32cs mvfx9, mvf0 - cftruncs32pl mvfx15, mvf10 - cftruncs32ls mvfx4, mvf14 - cftruncd32cc mvfx8, mvd13 - cftruncd32vc mvfx2, mvd1 - cftruncd32gt mvfx6, mvd11 - cftruncd32eq mvfx7, mvd5 - cftruncd32al mvfx3, mvd12 -shift: - cfrshl32ge mvfx1, mvfx8, r2 - cfrshl32vs mvfx11, mvfx4, r9 - cfrshl32eq mvfx5, mvfx15, r7 - cfrshl32mi mvfx14, mvfx3, r8 - cfrshl32vc mvfx2, mvfx1, r6 - cfrshl64lt mvdx0, mvdx7, r13 - cfrshl64cc mvdx12, mvdx10, r11 - cfrshl64 mvdx13, mvdx6, r12 - cfrshl64cs mvdx9, mvdx0, r10 - cfrshl64ge mvdx9, mvdx4, r1 - cfsh32hi mvfx13, mvfx7, #33 - cfsh32gt mvfx6, mvfx11, #0 - cfsh32pl mvfx14, mvfx3, #32 - cfsh32ne mvfx8, mvfx15, #-31 - cfsh32lt mvfx4, mvfx2, #1 - cfsh64pl mvdx15, mvdx10, #-32 - cfsh64al mvdx3, mvdx8, #-27 - cfsh64cs mvdx1, mvdx12, #-5 - cfsh64eq mvdx7, mvdx5, #63 - cfsh64gt mvdx10, mvdx1, #9 -comp: - cfcmpsle r15, mvf11, mvf4 - cfcmpsls r0, mvf5, mvf15 - cfcmpsls lr, mvf14, mvf3 - cfcmpsle r5, mvf2, mvf1 - cfcmpsvs r3, mvf0, mvf7 - cfcmpdal r4, mvd12, mvd10 - cfcmpdhi r2, mvd13, mvd6 - cfcmpdmi r9, mvd9, mvd0 - cfcmpd r7, mvd9, mvd4 - cfcmpdcc r8, mvd13, mvd7 - cfcmp32ne r6, mvfx6, mvfx11 - cfcmp32vc r13, mvfx14, mvfx3 - cfcmp32ge r11, mvfx8, mvfx15 - cfcmp32vs r12, mvfx4, mvfx2 - cfcmp32eq r10, mvfx15, mvfx10 - cfcmp64mi r1, mvdx3, mvdx8 - cfcmp64vc pc, mvdx1, mvdx12 - cfcmp64lt r0, mvdx7, mvdx5 - cfcmp64cc r14, mvdx10, mvdx1 - cfcmp64 r5, mvdx6, mvdx11 -fp_arith: - cfabsscs mvf9, mvf0 - cfabsspl mvf15, mvf10 - cfabssls mvf4, mvf14 - cfabsscc mvf8, mvf13 - cfabssvc mvf2, mvf1 - cfabsdgt mvd6, mvd11 - cfabsdeq mvd7, mvd5 - cfabsdal mvd3, mvd12 - cfabsdge mvd1, mvd8 - cfabsd mvd13, mvd6 - cfnegslt mvf4, mvf2 - cfnegsls mvf0, mvf5 - cfnegs mvf10, mvf9 - cfnegsmi mvf14, mvf3 - cfnegshi mvf13, mvf7 - cfnegdcs mvd1, mvd12 - cfnegdvs mvd11, mvd0 - cfnegdvc mvd5, mvd14 - cfnegdcc mvd12, mvd10 - cfnegdne mvd8, mvd15 - cfaddsle mvf6, mvf11, mvf4 - cfaddsls mvf0, mvf5, mvf15 - cfaddsls mvf4, mvf14, mvf3 - cfaddsle mvf7, mvf2, mvf1 - cfaddsvs mvf11, mvf0, mvf7 - cfadddal mvd3, mvd12, mvd10 - cfadddhi mvd15, mvd13, mvd6 - cfadddmi mvd2, mvd9, mvd0 - cfaddd mvd10, mvd9, mvd4 - cfadddcc mvd8, mvd13, mvd7 - cfsubsne mvf12, mvf6, mvf11 - cfsubsvc mvf5, mvf14, mvf3 - cfsubsge mvf1, mvf8, mvf15 - cfsubsvs mvf11, mvf4, mvf2 - cfsubseq mvf5, mvf15, mvf10 - cfsubdmi mvd14, mvd3, mvd8 - cfsubdvc mvd2, mvd1, mvd12 - cfsubdlt mvd0, mvd7, mvd5 - cfsubdcc mvd12, mvd10, mvd1 - cfsubd mvd13, mvd6, mvd11 - cfmulscs mvf9, mvf0, mvf5 - cfmulsge mvf9, mvf4, mvf14 - cfmulshi mvf13, mvf7, mvf2 - cfmulsgt mvf6, mvf11, mvf0 - cfmulspl mvf14, mvf3, mvf12 - cfmuldne mvd8, mvd15, mvd13 - cfmuldlt mvd4, mvd2, mvd9 - cfmuldpl mvd15, mvd10, mvd9 - cfmuldal mvd3, mvd8, mvd13 - cfmuldcs mvd1, mvd12, mvd6 -int_arith: - cfabs32eq mvfx7, mvfx5 - cfabs32al mvfx3, mvfx12 - cfabs32ge mvfx1, mvfx8 - cfabs32 mvfx13, mvfx6 - cfabs32lt mvfx4, mvfx2 - cfabs64ls mvdx0, mvdx5 - cfabs64 mvdx10, mvdx9 - cfabs64mi mvdx14, mvdx3 - cfabs64hi mvdx13, mvdx7 - cfabs64cs mvdx1, mvdx12 - cfneg32vs mvfx11, mvfx0 - cfneg32vc mvfx5, mvfx14 - cfneg32cc mvfx12, mvfx10 - cfneg32ne mvfx8, mvfx15 - cfneg32le mvfx6, mvfx11 - cfneg64mi mvdx2, mvdx9 - cfneg64eq mvdx5, mvdx15 - cfneg64ge mvdx9, mvdx4 - cfneg64al mvdx3, mvdx8 - cfneg64le mvdx7, mvdx2 - cfadd32ne mvfx12, mvfx6, mvfx11 - cfadd32vc mvfx5, mvfx14, mvfx3 - cfadd32ge mvfx1, mvfx8, mvfx15 - cfadd32vs mvfx11, mvfx4, mvfx2 - cfadd32eq mvfx5, mvfx15, mvfx10 - cfadd64mi mvdx14, mvdx3, mvdx8 - cfadd64vc mvdx2, mvdx1, mvdx12 - cfadd64lt mvdx0, mvdx7, mvdx5 - cfadd64cc mvdx12, mvdx10, mvdx1 - cfadd64 mvdx13, mvdx6, mvdx11 - cfsub32cs mvfx9, mvfx0, mvfx5 - cfsub32ge mvfx9, mvfx4, mvfx14 - cfsub32hi mvfx13, mvfx7, mvfx2 - cfsub32gt mvfx6, mvfx11, mvfx0 - cfsub32pl mvfx14, mvfx3, mvfx12 - cfsub64ne mvdx8, mvdx15, mvdx13 - cfsub64lt mvdx4, mvdx2, mvdx9 - cfsub64pl mvdx15, mvdx10, mvdx9 - cfsub64al mvdx3, mvdx8, mvdx13 - cfsub64cs mvdx1, mvdx12, mvdx6 - cfmul32eq mvfx7, mvfx5, mvfx14 - cfmul32gt mvfx10, mvfx1, mvfx8 - cfmul32le mvfx6, mvfx11, mvfx4 - cfmul32ls mvfx0, mvfx5, mvfx15 - cfmul32ls mvfx4, mvfx14, mvfx3 - cfmul64le mvdx7, mvdx2, mvdx1 - cfmul64vs mvdx11, mvdx0, mvdx7 - cfmul64al mvdx3, mvdx12, mvdx10 - cfmul64hi mvdx15, mvdx13, mvdx6 - cfmul64mi mvdx2, mvdx9, mvdx0 - cfmac32 mvfx10, mvfx9, mvfx4 - cfmac32cc mvfx8, mvfx13, mvfx7 - cfmac32ne mvfx12, mvfx6, mvfx11 - cfmac32vc mvfx5, mvfx14, mvfx3 - cfmac32ge mvfx1, mvfx8, mvfx15 - cfmsc32vs mvfx11, mvfx4, mvfx2 - cfmsc32eq mvfx5, mvfx15, mvfx10 - cfmsc32mi mvfx14, mvfx3, mvfx8 - cfmsc32vc mvfx2, mvfx1, mvfx12 - cfmsc32lt mvfx0, mvfx7, mvfx5 -acc_arith: - cfmadd32cc mvax0, mvfx10, mvfx1, mvfx8 - cfmadd32 mvax2, mvfx6, mvfx11, mvfx4 - cfmadd32cs mvax1, mvfx0, mvfx5, mvfx15 - cfmadd32ge mvax2, mvfx4, mvfx14, mvfx3 - cfmadd32hi mvax3, mvfx7, mvfx2, mvfx1 - cfmsub32gt mvax0, mvfx11, mvfx0, mvfx7 - cfmsub32pl mvax2, mvfx3, mvfx12, mvfx10 - cfmsub32ne mvax1, mvfx15, mvfx13, mvfx6 - cfmsub32lt mvax2, mvfx2, mvfx9, mvfx0 - cfmsub32pl mvax3, mvfx10, mvfx9, mvfx4 - cfmadda32al mvax3, mvax1, mvfx13, mvfx7 - cfmadda32cs mvax3, mvax2, mvfx6, mvfx11 - cfmadda32eq mvax1, mvax3, mvfx14, mvfx3 - cfmadda32gt mvax1, mvax3, mvfx8, mvfx15 - cfmadda32le mvax0, mvax3, mvfx4, mvfx2 - cfmsuba32ls mvax0, mvax1, mvfx15, mvfx10 - cfmsuba32ls mvax0, mvax1, mvfx3, mvfx8 - cfmsuba32le mvax2, mvax0, mvfx1, mvfx12 - cfmsuba32vs mvax1, mvax0, mvfx7, mvfx5 - cfmsuba32al mvax2, mvax0, mvfx10, mvfx1 diff --git a/gas/testsuite/gas/arm/pic.d b/gas/testsuite/gas/arm/pic.d deleted file mode 100644 index 160b1c69db..0000000000 --- a/gas/testsuite/gas/arm/pic.d +++ /dev/null @@ -1,17 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: PIC - -# Test generation of PIC - -.*: +file format .*arm.* - -Disassembly of section .text: -0x0+0 ebfffffe bl 0x0+0 - 0: R_ARM_PC24 foo -0x0+4 ebfffffe bl 0x0+0 - 4: R_ARM_PLT32 foo - \.\.\. - 8: R_ARM_ABS32 sym - c: R_ARM_GOT32 sym - 10: R_ARM_GOTOFF sym - 14: R_ARM_GOTPC _GLOBAL_OFFSET_TABLE_ diff --git a/gas/testsuite/gas/arm/pic.s b/gas/testsuite/gas/arm/pic.s deleted file mode 100644 index f538908e90..0000000000 --- a/gas/testsuite/gas/arm/pic.s +++ /dev/null @@ -1,11 +0,0 @@ -@ Test file for ARM ELF PIC - -.text -.align 0 - bl foo - bl foo(PLT) - .word sym - .word sym(GOT) - .word sym(GOTOFF) -1: - .word _GLOBAL_OFFSET_TABLE_ - 1b diff --git a/gas/testsuite/gas/arm/thumb.s b/gas/testsuite/gas/arm/thumb.s deleted file mode 100644 index 422b088de8..0000000000 --- a/gas/testsuite/gas/arm/thumb.s +++ /dev/null @@ -1,194 +0,0 @@ - .text - .code 16 -.foo: - lsl r2, r1, #3 - lsr r3, r4, #31 -wibble/data: - asr r7, r0, #5 - - lsl r1, r2, #0 - lsr r3, r4, #0 - asr r4, r5, #0 - - lsr r6, r7, #32 - asr r0, r1, #32 - - add r1, r2, r3 - add r2, r4, #2 - sub r3, r5, r7 - sub r2, r4, #7 - - mov r4, #255 - cmp r3, #250 - add r6, #123 - sub r5, #128 - - and r3, r5 - eor r4, r6 - lsl r1, r0 - lsr r2, r3 - asr r4, r6 - adc r5, r7 - sbc r0, r4 - ror r1, r4 - tst r2, r5 - neg r1, r1 - cmp r2, r3 - cmn r1, r4 - orr r0, r3 - mul r4, r5 - bic r5, r7 - mvn r5, r5 - - add r1, r13 - add r12, r2 - add r9, r9 - cmp r1, r14 - cmp r8, r0 - cmp r12, r14 - mov r0, r9 - mov r9, r4 - mov r8, r8 - bx r7 - bx r8 - .align 0 - bx pc - - ldr r3, [pc, #128] - ldr r4, bar - - str r0, [r1, r2] - strb r1, [r2, r4] - ldr r5, [r6, r7] - ldrb r2, [r4, r5] - - .align 0 -bar: - strh r1, [r2, r3] - ldrh r3, [r4, r0] - ldsb r1, [r6, r7] - ldsh r2, [r0, r5] - - str r3, [r3, #124] - ldr r1, [r4, #124] - ldr r5, [r5] - strb r1, [r5, #31] - strb r1, [r4, #5] - strb r2, [r6] - - strh r4, [r5, #62] - ldrh r5, [r0, #4] - ldrh r3, [r2] - - str r3, [r13, #1020] - ldr r1, [r13, #44] - ldr r2, [r13] - - add r7, r15, #1020 - add r4, r13, #512 - - add r13, #268 - add r13, #-104 - sub r13, #268 - sub r13, #-108 - - push {r0, r1, r2, r4} - push {r0, r3-r7, lr} - pop {r3, r4, r7} - pop {r0-r7, r15} - - stmia r3!, {r0, r1, r4-r7} - ldmia r0!, {r1-r7} - - beq bar - bne bar - bcs bar - bcc bar - bmi bar - bpl bar - bvs bar - bvc bar - bhi bar - bls bar - bge bar - bgt bar - blt bar - bgt bar - ble bar - bhi bar - blo bar - bul bar - bal bar - -close: - lsl r4, r5, #near - close -near: - add r2, r3, #near - close - - add sp, sp, #127 << 2 - sub sp, sp, #127 << 2 - add r0, sp, #255 << 2 - add r0, pc, #255 << 2 - - add sp, sp, #bar - .foo - sub sp, sp, #bar - .foo - add r0, sp, #bar - .foo - add r0, pc, #bar - .foo - - add r1, #bar - .foo - mov r6, #bar - .foo - cmp r7, #bar - .foo - - nop - nop - - .arm -.localbar: - b .localbar - b .wombat - bl .localbar - bl .wombat - - bx r0 - swi 0x123456 - - .thumb - @ The following will be disassembled incorrectly if we do not - @ have a Thumb symbol defined before the first Thumb instruction: -morethumb: - adr r0, forwardonly - - b .foo - b .wombat - bl .foo - bl .wombat - - bx r0 - - swi 0xff - .align 0 -forwardonly: - beq .wombat - bne .wombat - bcs .wombat - bcc .wombat - bmi .wombat - bpl .wombat - bvs .wombat - bvc .wombat - bhi .wombat - bls .wombat - bge .wombat - bgt .wombat - blt .wombat - bgt .wombat - ble .wombat - bhi .wombat - blo .wombat - bul .wombat - -.back: - bl .local - .space (1 << 11) @ leave space to force long offsets -.local: - bl .back diff --git a/gas/testsuite/gas/arm/vfp-bad.l b/gas/testsuite/gas/arm/vfp-bad.l deleted file mode 100644 index 04bb04d4d7..0000000000 --- a/gas/testsuite/gas/arm/vfp-bad.l +++ /dev/null @@ -1,9 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:4: Error: garbage following instruction -- `fstd d0,\[r0\],#8' -[^:]*:5: Error: garbage following instruction -- `fstd d0,\[r0,#-8\]!' -[^:]*:6: Error: garbage following instruction -- `fsts s0,\[r0\],#8' -[^:]*:7: Error: garbage following instruction -- `fsts s0,\[r0,#-8\]!' -[^:]*:8: Error: garbage following instruction -- `fldd d0,\[r0\],#8' -[^:]*:9: Error: garbage following instruction -- `fldd d0,\[r0,#-8\]!' -[^:]*:10: Error: garbage following instruction -- `flds s0,\[r0\],#8' -[^:]*:11: Error: garbage following instruction -- `flds s0,\[r0,#-8\]!' diff --git a/gas/testsuite/gas/arm/vfp-bad.s b/gas/testsuite/gas/arm/vfp-bad.s deleted file mode 100644 index ac44371773..0000000000 --- a/gas/testsuite/gas/arm/vfp-bad.s +++ /dev/null @@ -1,11 +0,0 @@ - .global entry - .text -entry: - fstd d0, [r0], #8 - fstd d0, [r0, #-8]! - fsts s0, [r0], #8 - fsts s0, [r0, #-8]! - fldd d0, [r0], #8 - fldd d0, [r0, #-8]! - flds s0, [r0], #8 - flds s0, [r0, #-8]! diff --git a/gas/testsuite/gas/arm/vfp1.d b/gas/testsuite/gas/arm/vfp1.d deleted file mode 100644 index 0df8c54c9b..0000000000 --- a/gas/testsuite/gas/arm/vfp1.d +++ /dev/null @@ -1,190 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: VFP Double-precision instructions -#as: -mfpu=vfp - -# Test the ARM VFP Double Precision instructions - -.*: +file format .*arm.* - -Disassembly of section .text: -0+000 <[^>]*> eeb40bc0 fcmped d0, d0 -0+004 <[^>]*> eeb50bc0 fcmpezd d0 -0+008 <[^>]*> eeb40b40 fcmpd d0, d0 -0+00c <[^>]*> eeb50b40 fcmpzd d0 -0+010 <[^>]*> eeb00bc0 fabsd d0, d0 -0+014 <[^>]*> eeb00b40 fcpyd d0, d0 -0+018 <[^>]*> eeb10b40 fnegd d0, d0 -0+01c <[^>]*> eeb10bc0 fsqrtd d0, d0 -0+020 <[^>]*> ee300b00 faddd d0, d0, d0 -0+024 <[^>]*> ee800b00 fdivd d0, d0, d0 -0+028 <[^>]*> ee000b00 fmacd d0, d0, d0 -0+02c <[^>]*> ee100b00 fmscd d0, d0, d0 -0+030 <[^>]*> ee200b00 fmuld d0, d0, d0 -0+034 <[^>]*> ee000b40 fnmacd d0, d0, d0 -0+038 <[^>]*> ee100b40 fnmscd d0, d0, d0 -0+03c <[^>]*> ee200b40 fnmuld d0, d0, d0 -0+040 <[^>]*> ee300b40 fsubd d0, d0, d0 -0+044 <[^>]*> ed900b00 fldd d0, \[r0\] -0+048 <[^>]*> ed800b00 fstd d0, \[r0\] -0+04c <[^>]*> ec900b02 fldmiad r0, {d0} -0+050 <[^>]*> ec900b02 fldmiad r0, {d0} -0+054 <[^>]*> ecb00b02 fldmiad r0!, {d0} -0+058 <[^>]*> ecb00b02 fldmiad r0!, {d0} -0+05c <[^>]*> ed300b02 fldmdbd r0!, {d0} -0+060 <[^>]*> ed300b02 fldmdbd r0!, {d0} -0+064 <[^>]*> ec800b02 fstmiad r0, {d0} -0+068 <[^>]*> ec800b02 fstmiad r0, {d0} -0+06c <[^>]*> eca00b02 fstmiad r0!, {d0} -0+070 <[^>]*> eca00b02 fstmiad r0!, {d0} -0+074 <[^>]*> ed200b02 fstmdbd r0!, {d0} -0+078 <[^>]*> ed200b02 fstmdbd r0!, {d0} -0+07c <[^>]*> eeb80bc0 fsitod d0, s0 -0+080 <[^>]*> eeb80b40 fuitod d0, s0 -0+084 <[^>]*> eebd0b40 ftosid s0, d0 -0+088 <[^>]*> eebd0bc0 ftosizd s0, d0 -0+08c <[^>]*> eebc0b40 ftouid s0, d0 -0+090 <[^>]*> eebc0bc0 ftouizd s0, d0 -0+094 <[^>]*> eeb70ac0 fcvtds d0, s0 -0+098 <[^>]*> eeb70bc0 fcvtsd s0, d0 -0+09c <[^>]*> ee300b10 fmrdh r0, d0 -0+0a0 <[^>]*> ee100b10 fmrdl r0, d0 -0+0a4 <[^>]*> ee200b10 fmdhr d0, r0 -0+0a8 <[^>]*> ee000b10 fmdlr d0, r0 -0+0ac <[^>]*> eeb51b40 fcmpzd d1 -0+0b0 <[^>]*> eeb52b40 fcmpzd d2 -0+0b4 <[^>]*> eeb5fb40 fcmpzd d15 -0+0b8 <[^>]*> eeb40b41 fcmpd d0, d1 -0+0bc <[^>]*> eeb40b42 fcmpd d0, d2 -0+0c0 <[^>]*> eeb40b4f fcmpd d0, d15 -0+0c4 <[^>]*> eeb41b40 fcmpd d1, d0 -0+0c8 <[^>]*> eeb42b40 fcmpd d2, d0 -0+0cc <[^>]*> eeb4fb40 fcmpd d15, d0 -0+0d0 <[^>]*> eeb45b4c fcmpd d5, d12 -0+0d4 <[^>]*> eeb10b41 fnegd d0, d1 -0+0d8 <[^>]*> eeb10b42 fnegd d0, d2 -0+0dc <[^>]*> eeb10b4f fnegd d0, d15 -0+0e0 <[^>]*> eeb11b40 fnegd d1, d0 -0+0e4 <[^>]*> eeb12b40 fnegd d2, d0 -0+0e8 <[^>]*> eeb1fb40 fnegd d15, d0 -0+0ec <[^>]*> eeb1cb45 fnegd d12, d5 -0+0f0 <[^>]*> ee300b01 faddd d0, d0, d1 -0+0f4 <[^>]*> ee300b02 faddd d0, d0, d2 -0+0f8 <[^>]*> ee300b0f faddd d0, d0, d15 -0+0fc <[^>]*> ee310b00 faddd d0, d1, d0 -0+100 <[^>]*> ee320b00 faddd d0, d2, d0 -0+104 <[^>]*> ee3f0b00 faddd d0, d15, d0 -0+108 <[^>]*> ee301b00 faddd d1, d0, d0 -0+10c <[^>]*> ee302b00 faddd d2, d0, d0 -0+110 <[^>]*> ee30fb00 faddd d15, d0, d0 -0+114 <[^>]*> ee39cb05 faddd d12, d9, d5 -0+118 <[^>]*> eeb70ae0 fcvtds d0, s1 -0+11c <[^>]*> eeb70ac1 fcvtds d0, s2 -0+120 <[^>]*> eeb70aef fcvtds d0, s31 -0+124 <[^>]*> eeb71ac0 fcvtds d1, s0 -0+128 <[^>]*> eeb72ac0 fcvtds d2, s0 -0+12c <[^>]*> eeb7fac0 fcvtds d15, s0 -0+130 <[^>]*> eef70bc0 fcvtsd s1, d0 -0+134 <[^>]*> eeb71bc0 fcvtsd s2, d0 -0+138 <[^>]*> eef7fbc0 fcvtsd s31, d0 -0+13c <[^>]*> eeb70bc1 fcvtsd s0, d1 -0+140 <[^>]*> eeb70bc2 fcvtsd s0, d2 -0+144 <[^>]*> eeb70bcf fcvtsd s0, d15 -0+148 <[^>]*> ee301b10 fmrdh r1, d0 -0+14c <[^>]*> ee30eb10 fmrdh lr, d0 -0+150 <[^>]*> ee310b10 fmrdh r0, d1 -0+154 <[^>]*> ee320b10 fmrdh r0, d2 -0+158 <[^>]*> ee3f0b10 fmrdh r0, d15 -0+15c <[^>]*> ee101b10 fmrdl r1, d0 -0+160 <[^>]*> ee10eb10 fmrdl lr, d0 -0+164 <[^>]*> ee110b10 fmrdl r0, d1 -0+168 <[^>]*> ee120b10 fmrdl r0, d2 -0+16c <[^>]*> ee1f0b10 fmrdl r0, d15 -0+170 <[^>]*> ee201b10 fmdhr d0, r1 -0+174 <[^>]*> ee20eb10 fmdhr d0, lr -0+178 <[^>]*> ee210b10 fmdhr d1, r0 -0+17c <[^>]*> ee220b10 fmdhr d2, r0 -0+180 <[^>]*> ee2f0b10 fmdhr d15, r0 -0+184 <[^>]*> ee001b10 fmdlr d0, r1 -0+188 <[^>]*> ee00eb10 fmdlr d0, lr -0+18c <[^>]*> ee010b10 fmdlr d1, r0 -0+190 <[^>]*> ee020b10 fmdlr d2, r0 -0+194 <[^>]*> ee0f0b10 fmdlr d15, r0 -0+198 <[^>]*> ed910b00 fldd d0, \[r1\] -0+19c <[^>]*> ed9e0b00 fldd d0, \[lr\] -0+1a0 <[^>]*> ed900b00 fldd d0, \[r0\] -0+1a4 <[^>]*> ed900bff fldd d0, \[r0, #1020\] -0+1a8 <[^>]*> ed100bff fldd d0, \[r0, -#1020\] -0+1ac <[^>]*> ed901b00 fldd d1, \[r0\] -0+1b0 <[^>]*> ed902b00 fldd d2, \[r0\] -0+1b4 <[^>]*> ed90fb00 fldd d15, \[r0\] -0+1b8 <[^>]*> ed8ccbc9 fstd d12, \[ip, #804\] -0+1bc <[^>]*> ec901b02 fldmiad r0, {d1} -0+1c0 <[^>]*> ec902b02 fldmiad r0, {d2} -0+1c4 <[^>]*> ec90fb02 fldmiad r0, {d15} -0+1c8 <[^>]*> ec900b04 fldmiad r0, {d0-d1} -0+1cc <[^>]*> ec900b06 fldmiad r0, {d0-d2} -0+1d0 <[^>]*> ec900b20 fldmiad r0, {d0-d15} -0+1d4 <[^>]*> ec901b1e fldmiad r0, {d1-d15} -0+1d8 <[^>]*> ec902b1c fldmiad r0, {d2-d15} -0+1dc <[^>]*> ec90eb04 fldmiad r0, {d14-d15} -0+1e0 <[^>]*> ec910b02 fldmiad r1, {d0} -0+1e4 <[^>]*> ec9e0b02 fldmiad lr, {d0} -0+1e8 <[^>]*> eeb50b40 fcmpzd d0 -0+1ec <[^>]*> eeb51b40 fcmpzd d1 -0+1f0 <[^>]*> eeb52b40 fcmpzd d2 -0+1f4 <[^>]*> eeb53b40 fcmpzd d3 -0+1f8 <[^>]*> eeb54b40 fcmpzd d4 -0+1fc <[^>]*> eeb55b40 fcmpzd d5 -0+200 <[^>]*> eeb56b40 fcmpzd d6 -0+204 <[^>]*> eeb57b40 fcmpzd d7 -0+208 <[^>]*> eeb58b40 fcmpzd d8 -0+20c <[^>]*> eeb59b40 fcmpzd d9 -0+210 <[^>]*> eeb5ab40 fcmpzd d10 -0+214 <[^>]*> eeb5bb40 fcmpzd d11 -0+218 <[^>]*> eeb5cb40 fcmpzd d12 -0+21c <[^>]*> eeb5db40 fcmpzd d13 -0+220 <[^>]*> eeb5eb40 fcmpzd d14 -0+224 <[^>]*> eeb5fb40 fcmpzd d15 -0+228 <[^>]*> 0eb41bcf fcmpedeq d1, d15 -0+22c <[^>]*> 0eb52bc0 fcmpezdeq d2 -0+230 <[^>]*> 0eb43b4e fcmpdeq d3, d14 -0+234 <[^>]*> 0eb54b40 fcmpzdeq d4 -0+238 <[^>]*> 0eb05bcd fabsdeq d5, d13 -0+23c <[^>]*> 0eb06b4c fcpydeq d6, d12 -0+240 <[^>]*> 0eb17b4b fnegdeq d7, d11 -0+244 <[^>]*> 0eb18bca fsqrtdeq d8, d10 -0+248 <[^>]*> 0e319b0f fadddeq d9, d1, d15 -0+24c <[^>]*> 0e832b0e fdivdeq d2, d3, d14 -0+250 <[^>]*> 0e0d4b0c fmacdeq d4, d13, d12 -0+254 <[^>]*> 0e165b0b fmscdeq d5, d6, d11 -0+258 <[^>]*> 0e2a7b09 fmuldeq d7, d10, d9 -0+25c <[^>]*> 0e098b4a fnmacdeq d8, d9, d10 -0+260 <[^>]*> 0e167b4b fnmscdeq d7, d6, d11 -0+264 <[^>]*> 0e245b4c fnmuldeq d5, d4, d12 -0+268 <[^>]*> 0e3d3b4e fsubdeq d3, d13, d14 -0+26c <[^>]*> 0d952b00 flddeq d2, \[r5\] -0+270 <[^>]*> 0d8c1b00 fstdeq d1, \[ip\] -0+274 <[^>]*> 0c911b02 fldmiadeq r1, {d1} -0+278 <[^>]*> 0c922b02 fldmiadeq r2, {d2} -0+27c <[^>]*> 0cb33b02 fldmiadeq r3!, {d3} -0+280 <[^>]*> 0cb44b02 fldmiadeq r4!, {d4} -0+284 <[^>]*> 0d355b02 fldmdbdeq r5!, {d5} -0+288 <[^>]*> 0d366b02 fldmdbdeq r6!, {d6} -0+28c <[^>]*> 0c87fb02 fstmiadeq r7, {d15} -0+290 <[^>]*> 0c88eb02 fstmiadeq r8, {d14} -0+294 <[^>]*> 0ca9db02 fstmiadeq r9!, {d13} -0+298 <[^>]*> 0caacb02 fstmiadeq sl!, {d12} -0+29c <[^>]*> 0d2bbb02 fstmdbdeq fp!, {d11} -0+2a0 <[^>]*> 0d2cab02 fstmdbdeq ip!, {d10} -0+2a4 <[^>]*> 0eb8fbe0 fsitodeq d15, s1 -0+2a8 <[^>]*> 0eb81b6f fuitodeq d1, s31 -0+2ac <[^>]*> 0efd0b4f ftosideq s1, d15 -0+2b0 <[^>]*> 0efdfbc2 ftosizdeq s31, d2 -0+2b4 <[^>]*> 0efc7b42 ftouideq s15, d2 -0+2b8 <[^>]*> 0efc5bc3 ftouizdeq s11, d3 -0+2bc <[^>]*> 0eb71ac5 fcvtdseq d1, s10 -0+2c0 <[^>]*> 0ef75bc1 fcvtsdeq s11, d1 -0+2c4 <[^>]*> 0e318b10 fmrdheq r8, d1 -0+2c8 <[^>]*> 0e1f7b10 fmrdleq r7, d15 -0+2cc <[^>]*> 0e21fb10 fmdhreq d1, pc -0+2d0 <[^>]*> 0e0f1b10 fmdlreq d15, r1 diff --git a/gas/testsuite/gas/arm/vfp1.s b/gas/testsuite/gas/arm/vfp1.s deleted file mode 100644 index 9853baeede..0000000000 --- a/gas/testsuite/gas/arm/vfp1.s +++ /dev/null @@ -1,278 +0,0 @@ -@ VFP Instructions for D variants (Double precision) - .text - .global F -F: - @ First we test the basic syntax and bit patterns of the opcodes. - @ Most of these tests deliberatly use d0/r0 to avoid setting - @ any more bits than necessary. - - @ Comparison operations - - fcmped d0, d0 - fcmpezd d0 - fcmpd d0, d0 - fcmpzd d0 - - @ Monadic data operations - - fabsd d0, d0 - fcpyd d0, d0 - fnegd d0, d0 - fsqrtd d0, d0 - - @ Dyadic data operations - - faddd d0, d0, d0 - fdivd d0, d0, d0 - fmacd d0, d0, d0 - fmscd d0, d0, d0 - fmuld d0, d0, d0 - fnmacd d0, d0, d0 - fnmscd d0, d0, d0 - fnmuld d0, d0, d0 - fsubd d0, d0, d0 - - @ Load/store operations - - fldd d0, [r0] - fstd d0, [r0] - - @ Load/store multiple operations - - fldmiad r0, {d0} - fldmfdd r0, {d0} - fldmiad r0!, {d0} - fldmfdd r0!, {d0} - fldmdbd r0!, {d0} - fldmead r0!, {d0} - - fstmiad r0, {d0} - fstmead r0, {d0} - fstmiad r0!, {d0} - fstmead r0!, {d0} - fstmdbd r0!, {d0} - fstmfdd r0!, {d0} - - @ Conversion operations - - fsitod d0, s0 - fuitod d0, s0 - - ftosid s0, d0 - ftosizd s0, d0 - ftouid s0, d0 - ftouizd s0, d0 - - fcvtds d0, s0 - fcvtsd s0, d0 - - @ ARM from VFP operations - - fmrdh r0, d0 - fmrdl r0, d0 - - @ VFP From ARM operations - - fmdhr d0, r0 - fmdlr d0, r0 - - @ Now we test that the register fields are updated correctly for - @ each class of instruction. - - @ Single register operations (compare-zero): - - fcmpzd d1 - fcmpzd d2 - fcmpzd d15 - - @ Two register comparison operations: - - fcmpd d0, d1 - fcmpd d0, d2 - fcmpd d0, d15 - fcmpd d1, d0 - fcmpd d2, d0 - fcmpd d15, d0 - fcmpd d5, d12 - - @ Two register data operations (monadic) - - fnegd d0, d1 - fnegd d0, d2 - fnegd d0, d15 - fnegd d1, d0 - fnegd d2, d0 - fnegd d15, d0 - fnegd d12, d5 - - @ Three register data operations (dyadic) - - faddd d0, d0, d1 - faddd d0, d0, d2 - faddd d0, d0, d15 - faddd d0, d1, d0 - faddd d0, d2, d0 - faddd d0, d15, d0 - faddd d1, d0, d0 - faddd d2, d0, d0 - faddd d15, d0, d0 - faddd d12, d9, d5 - - @ Conversion operations - - fcvtds d0, s1 - fcvtds d0, s2 - fcvtds d0, s31 - fcvtds d1, s0 - fcvtds d2, s0 - fcvtds d15, s0 - fcvtsd s1, d0 - fcvtsd s2, d0 - fcvtsd s31, d0 - fcvtsd s0, d1 - fcvtsd s0, d2 - fcvtsd s0, d15 - - @ Move to VFP from ARM - - fmrdh r1, d0 - fmrdh r14, d0 - fmrdh r0, d1 - fmrdh r0, d2 - fmrdh r0, d15 - fmrdl r1, d0 - fmrdl r14, d0 - fmrdl r0, d1 - fmrdl r0, d2 - fmrdl r0, d15 - - @ Move to ARM from VFP - - fmdhr d0, r1 - fmdhr d0, r14 - fmdhr d1, r0 - fmdhr d2, r0 - fmdhr d15, r0 - fmdlr d0, r1 - fmdlr d0, r14 - fmdlr d1, r0 - fmdlr d2, r0 - fmdlr d15, r0 - - @ Load/store operations - - fldd d0, [r1] - fldd d0, [r14] - fldd d0, [r0, #0] - fldd d0, [r0, #1020] - fldd d0, [r0, #-1020] - fldd d1, [r0] - fldd d2, [r0] - fldd d15, [r0] - fstd d12, [r12, #804] - - @ Load/store multiple operations - - fldmiad r0, {d1} - fldmiad r0, {d2} - fldmiad r0, {d15} - fldmiad r0, {d0-d1} - fldmiad r0, {d0-d2} - fldmiad r0, {d0-d15} - fldmiad r0, {d1-d15} - fldmiad r0, {d2-d15} - fldmiad r0, {d14-d15} - fldmiad r1, {d0} - fldmiad r14, {d0} - - @ Check that we assemble all the register names correctly - - fcmpzd d0 - fcmpzd d1 - fcmpzd d2 - fcmpzd d3 - fcmpzd d4 - fcmpzd d5 - fcmpzd d6 - fcmpzd d7 - fcmpzd d8 - fcmpzd d9 - fcmpzd d10 - fcmpzd d11 - fcmpzd d12 - fcmpzd d13 - fcmpzd d14 - fcmpzd d15 - - @ Now we check the placement of the conditional execution substring. - @ On VFP this is always at the end of the instruction. - - @ Comparison operations - - fcmpedeq d1, d15 - fcmpezdeq d2 - fcmpdeq d3, d14 - fcmpzdeq d4 - - @ Monadic data operations - - fabsdeq d5, d13 - fcpydeq d6, d12 - fnegdeq d7, d11 - fsqrtdeq d8, d10 - - @ Dyadic data operations - - fadddeq d9, d1, d15 - fdivdeq d2, d3, d14 - fmacdeq d4, d13, d12 - fmscdeq d5, d6, d11 - fmuldeq d7, d10, d9 - fnmacdeq d8, d9, d10 - fnmscdeq d7, d6, d11 - fnmuldeq d5, d4, d12 - fsubdeq d3, d13, d14 - - @ Load/store operations - - flddeq d2, [r5] - fstdeq d1, [r12] - - @ Load/store multiple operations - - fldmiadeq r1, {d1} - fldmfddeq r2, {d2} - fldmiadeq r3!, {d3} - fldmfddeq r4!, {d4} - fldmdbdeq r5!, {d5} - fldmeadeq r6!, {d6} - - fstmiadeq r7, {d15} - fstmeadeq r8, {d14} - fstmiadeq r9!, {d13} - fstmeadeq r10!, {d12} - fstmdbdeq r11!, {d11} - fstmfddeq r12!, {d10} - - @ Conversion operations - - fsitodeq d15, s1 - fuitodeq d1, s31 - - ftosideq s1, d15 - ftosizdeq s31, d2 - ftouideq s15, d2 - ftouizdeq s11, d3 - - fcvtdseq d1, s10 - fcvtsdeq s11, d1 - - @ ARM from VFP operations - - fmrdheq r8, d1 - fmrdleq r7, d15 - - @ VFP From ARM operations - - fmdhreq d1, r15 - fmdlreq d15, r1 diff --git a/gas/testsuite/gas/arm/vfp1xD.d b/gas/testsuite/gas/arm/vfp1xD.d deleted file mode 100644 index 4b787e05d1..0000000000 --- a/gas/testsuite/gas/arm/vfp1xD.d +++ /dev/null @@ -1,241 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: VFP Single-precision instructions -#as: -mfpu=vfpxd - -# Test the ARM VFP Single Precision instructions - -.*: +file format .*arm.* - -Disassembly of section .text: -0+000 <[^>]*> eef1fa10 fmstat -0+004 <[^>]*> eeb40ac0 fcmpes s0, s0 -0+008 <[^>]*> eeb50ac0 fcmpezs s0 -0+00c <[^>]*> eeb40a40 fcmps s0, s0 -0+010 <[^>]*> eeb50a40 fcmpzs s0 -0+014 <[^>]*> eeb00ac0 fabss s0, s0 -0+018 <[^>]*> eeb00a40 fcpys s0, s0 -0+01c <[^>]*> eeb10a40 fnegs s0, s0 -0+020 <[^>]*> eeb10ac0 fsqrts s0, s0 -0+024 <[^>]*> ee300a00 fadds s0, s0, s0 -0+028 <[^>]*> ee800a00 fdivs s0, s0, s0 -0+02c <[^>]*> ee000a00 fmacs s0, s0, s0 -0+030 <[^>]*> ee100a00 fmscs s0, s0, s0 -0+034 <[^>]*> ee200a00 fmuls s0, s0, s0 -0+038 <[^>]*> ee000a40 fnmacs s0, s0, s0 -0+03c <[^>]*> ee100a40 fnmscs s0, s0, s0 -0+040 <[^>]*> ee200a40 fnmuls s0, s0, s0 -0+044 <[^>]*> ee300a40 fsubs s0, s0, s0 -0+048 <[^>]*> ed900a00 flds s0, \[r0\] -0+04c <[^>]*> ed800a00 fsts s0, \[r0\] -0+050 <[^>]*> ec900a01 fldmias r0, {s0} -0+054 <[^>]*> ec900a01 fldmias r0, {s0} -0+058 <[^>]*> ecb00a01 fldmias r0!, {s0} -0+05c <[^>]*> ecb00a01 fldmias r0!, {s0} -0+060 <[^>]*> ed300a01 fldmdbs r0!, {s0} -0+064 <[^>]*> ed300a01 fldmdbs r0!, {s0} -0+068 <[^>]*> ec900b03 fldmiax r0, {d0} -0+06c <[^>]*> ec900b03 fldmiax r0, {d0} -0+070 <[^>]*> ecb00b03 fldmiax r0!, {d0} -0+074 <[^>]*> ecb00b03 fldmiax r0!, {d0} -0+078 <[^>]*> ed300b03 fldmdbx r0!, {d0} -0+07c <[^>]*> ed300b03 fldmdbx r0!, {d0} -0+080 <[^>]*> ec800a01 fstmias r0, {s0} -0+084 <[^>]*> ec800a01 fstmias r0, {s0} -0+088 <[^>]*> eca00a01 fstmias r0!, {s0} -0+08c <[^>]*> eca00a01 fstmias r0!, {s0} -0+090 <[^>]*> ed200a01 fstmdbs r0!, {s0} -0+094 <[^>]*> ed200a01 fstmdbs r0!, {s0} -0+098 <[^>]*> ec800b03 fstmiax r0, {d0} -0+09c <[^>]*> ec800b03 fstmiax r0, {d0} -0+0a0 <[^>]*> eca00b03 fstmiax r0!, {d0} -0+0a4 <[^>]*> eca00b03 fstmiax r0!, {d0} -0+0a8 <[^>]*> ed200b03 fstmdbx r0!, {d0} -0+0ac <[^>]*> ed200b03 fstmdbx r0!, {d0} -0+0b0 <[^>]*> eeb80ac0 fsitos s0, s0 -0+0b4 <[^>]*> eeb80a40 fuitos s0, s0 -0+0b8 <[^>]*> eebd0a40 ftosis s0, s0 -0+0bc <[^>]*> eebd0ac0 ftosizs s0, s0 -0+0c0 <[^>]*> eebc0a40 ftouis s0, s0 -0+0c4 <[^>]*> eebc0ac0 ftouizs s0, s0 -0+0c8 <[^>]*> ee100a10 fmrs r0, s0 -0+0cc <[^>]*> eef00a10 fmrx r0, fpsid -0+0d0 <[^>]*> eef10a10 fmrx r0, fpscr -0+0d4 <[^>]*> eef80a10 fmrx r0, fpexc -0+0d8 <[^>]*> ee000a10 fmsr s0, r0 -0+0dc <[^>]*> eee00a10 fmxr fpsid, r0 -0+0e0 <[^>]*> eee10a10 fmxr fpscr, r0 -0+0e4 <[^>]*> eee80a10 fmxr fpexc, r0 -0+0e8 <[^>]*> eef50a40 fcmpzs s1 -0+0ec <[^>]*> eeb51a40 fcmpzs s2 -0+0f0 <[^>]*> eef5fa40 fcmpzs s31 -0+0f4 <[^>]*> eeb40a60 fcmps s0, s1 -0+0f8 <[^>]*> eeb40a41 fcmps s0, s2 -0+0fc <[^>]*> eeb40a6f fcmps s0, s31 -0+100 <[^>]*> eef40a40 fcmps s1, s0 -0+104 <[^>]*> eeb41a40 fcmps s2, s0 -0+108 <[^>]*> eef4fa40 fcmps s31, s0 -0+10c <[^>]*> eef4aa46 fcmps s21, s12 -0+110 <[^>]*> eeb10a60 fnegs s0, s1 -0+114 <[^>]*> eeb10a41 fnegs s0, s2 -0+118 <[^>]*> eeb10a6f fnegs s0, s31 -0+11c <[^>]*> eef10a40 fnegs s1, s0 -0+120 <[^>]*> eeb11a40 fnegs s2, s0 -0+124 <[^>]*> eef1fa40 fnegs s31, s0 -0+128 <[^>]*> eeb16a6a fnegs s12, s21 -0+12c <[^>]*> ee300a20 fadds s0, s0, s0 -0+130 <[^>]*> ee300a01 fadds s0, s0, s0 -0+134 <[^>]*> ee300a2f fadds s0, s0, s0 -0+138 <[^>]*> ee300a80 fadds s0, s1, s0 -0+13c <[^>]*> ee310a00 fadds s0, s2, s0 -0+140 <[^>]*> ee3f0a80 fadds s0, s31, s0 -0+144 <[^>]*> ee700a00 fadds s1, s0, s1 -0+148 <[^>]*> ee301a00 fadds s2, s0, s2 -0+14c <[^>]*> ee70fa00 fadds s31, s0, s31 -0+150 <[^>]*> ee3a6aa2 fadds s12, s21, s12 -0+154 <[^>]*> eeb80ae0 fsitos s0, s1 -0+158 <[^>]*> eeb80ac1 fsitos s0, s2 -0+15c <[^>]*> eeb80aef fsitos s0, s31 -0+160 <[^>]*> eef80ac0 fsitos s1, s0 -0+164 <[^>]*> eeb81ac0 fsitos s2, s0 -0+168 <[^>]*> eef8fac0 fsitos s31, s0 -0+16c <[^>]*> eebd0a60 ftosis s0, s1 -0+170 <[^>]*> eebd0a41 ftosis s0, s2 -0+174 <[^>]*> eebd0a6f ftosis s0, s31 -0+178 <[^>]*> eefd0a40 ftosis s1, s0 -0+17c <[^>]*> eebd1a40 ftosis s2, s0 -0+180 <[^>]*> eefdfa40 ftosis s31, s0 -0+184 <[^>]*> ee001a10 fmsr s0, r1 -0+188 <[^>]*> ee007a10 fmsr s0, r7 -0+18c <[^>]*> ee00ea10 fmsr s0, lr -0+190 <[^>]*> ee000a90 fmsr s1, r0 -0+194 <[^>]*> ee010a10 fmsr s2, r0 -0+198 <[^>]*> ee0f0a90 fmsr s31, r0 -0+19c <[^>]*> ee0a7a90 fmsr s21, r7 -0+1a0 <[^>]*> eee01a10 fmxr fpsid, r1 -0+1a4 <[^>]*> eee0ea10 fmxr fpsid, lr -0+1a8 <[^>]*> ee100a90 fmrs r0, s1 -0+1ac <[^>]*> ee110a10 fmrs r0, s2 -0+1b0 <[^>]*> ee1f0a90 fmrs r0, s31 -0+1b4 <[^>]*> ee101a10 fmrs r1, s0 -0+1b8 <[^>]*> ee107a10 fmrs r7, s0 -0+1bc <[^>]*> ee10ea10 fmrs lr, s0 -0+1c0 <[^>]*> ee159a90 fmrs r9, s11 -0+1c4 <[^>]*> eef01a10 fmrx r1, fpsid -0+1c8 <[^>]*> eef0ea10 fmrx lr, fpsid -0+1cc <[^>]*> ed910a00 flds s0, \[r1\] -0+1d0 <[^>]*> ed9e0a00 flds s0, \[lr\] -0+1d4 <[^>]*> ed900a00 flds s0, \[r0\] -0+1d8 <[^>]*> ed900aff flds s0, \[r0, #1020\] -0+1dc <[^>]*> ed100aff flds s0, \[r0, -#1020\] -0+1e0 <[^>]*> edd00a00 flds s1, \[r0\] -0+1e4 <[^>]*> ed901a00 flds s2, \[r0\] -0+1e8 <[^>]*> edd0fa00 flds s31, \[r0\] -0+1ec <[^>]*> edccaac9 fsts s21, \[ip, #804\] -0+1f0 <[^>]*> ecd00a01 fldmias r0, {s1} -0+1f4 <[^>]*> ec901a01 fldmias r0, {s2} -0+1f8 <[^>]*> ecd0fa01 fldmias r0, {s31} -0+1fc <[^>]*> ec900a02 fldmias r0, {s0-s1} -0+200 <[^>]*> ec900a03 fldmias r0, {s0-s2} -0+204 <[^>]*> ec900a20 fldmias r0, {s0-s31} -0+208 <[^>]*> ecd00a1f fldmias r0, {s1-s31} -0+20c <[^>]*> ec901a1e fldmias r0, {s2-s31} -0+210 <[^>]*> ec90fa02 fldmias r0, {s30-s31} -0+214 <[^>]*> ec910a01 fldmias r1, {s0} -0+218 <[^>]*> ec9e0a01 fldmias lr, {s0} -0+21c <[^>]*> ec801b03 fstmiax r0, {d1} -0+220 <[^>]*> ec802b03 fstmiax r0, {d2} -0+224 <[^>]*> ec80fb03 fstmiax r0, {d15} -0+228 <[^>]*> ec800b05 fstmiax r0, {d0-d1} -0+22c <[^>]*> ec800b07 fstmiax r0, {d0-d2} -0+230 <[^>]*> ec800b21 fstmiax r0, {d0-d15} -0+234 <[^>]*> ec801b1f fstmiax r0, {d1-d15} -0+238 <[^>]*> ec802b1d fstmiax r0, {d2-d15} -0+23c <[^>]*> ec80eb05 fstmiax r0, {d14-d15} -0+240 <[^>]*> ec810b03 fstmiax r1, {d0} -0+244 <[^>]*> ec8e0b03 fstmiax lr, {d0} -0+248 <[^>]*> eeb50a40 fcmpzs s0 -0+24c <[^>]*> eef50a40 fcmpzs s1 -0+250 <[^>]*> eeb51a40 fcmpzs s2 -0+254 <[^>]*> eef51a40 fcmpzs s3 -0+258 <[^>]*> eeb52a40 fcmpzs s4 -0+25c <[^>]*> eef52a40 fcmpzs s5 -0+260 <[^>]*> eeb53a40 fcmpzs s6 -0+264 <[^>]*> eef53a40 fcmpzs s7 -0+268 <[^>]*> eeb54a40 fcmpzs s8 -0+26c <[^>]*> eef54a40 fcmpzs s9 -0+270 <[^>]*> eeb55a40 fcmpzs s10 -0+274 <[^>]*> eef55a40 fcmpzs s11 -0+278 <[^>]*> eeb56a40 fcmpzs s12 -0+27c <[^>]*> eef56a40 fcmpzs s13 -0+280 <[^>]*> eeb57a40 fcmpzs s14 -0+284 <[^>]*> eef57a40 fcmpzs s15 -0+288 <[^>]*> eeb58a40 fcmpzs s16 -0+28c <[^>]*> eef58a40 fcmpzs s17 -0+290 <[^>]*> eeb59a40 fcmpzs s18 -0+294 <[^>]*> eef59a40 fcmpzs s19 -0+298 <[^>]*> eeb5aa40 fcmpzs s20 -0+29c <[^>]*> eef5aa40 fcmpzs s21 -0+2a0 <[^>]*> eeb5ba40 fcmpzs s22 -0+2a4 <[^>]*> eef5ba40 fcmpzs s23 -0+2a8 <[^>]*> eeb5ca40 fcmpzs s24 -0+2ac <[^>]*> eef5ca40 fcmpzs s25 -0+2b0 <[^>]*> eeb5da40 fcmpzs s26 -0+2b4 <[^>]*> eef5da40 fcmpzs s27 -0+2b8 <[^>]*> eeb5ea40 fcmpzs s28 -0+2bc <[^>]*> eef5ea40 fcmpzs s29 -0+2c0 <[^>]*> eeb5fa40 fcmpzs s30 -0+2c4 <[^>]*> eef5fa40 fcmpzs s31 -0+2c8 <[^>]*> 0ef1fa10 fmstateq -0+2cc <[^>]*> 0ef41ae3 fcmpeseq s3, s7 -0+2d0 <[^>]*> 0ef52ac0 fcmpezseq s5 -0+2d4 <[^>]*> 0ef40a41 fcmpseq s1, s2 -0+2d8 <[^>]*> 0ef50a40 fcmpzseq s1 -0+2dc <[^>]*> 0ef00ae1 fabsseq s1, s3 -0+2e0 <[^>]*> 0ef0fa69 fcpyseq s31, s19 -0+2e4 <[^>]*> 0eb1aa44 fnegseq s20, s8 -0+2e8 <[^>]*> 0ef12ae3 fsqrtseq s5, s7 -0+2ec <[^>]*> 0e323a82 faddseq s6, s5, s6 -0+2f0 <[^>]*> 0ec11a20 fdivseq s3, s2, s1 -0+2f4 <[^>]*> 0e4ffa2e fmacseq s31, s30, s29 -0+2f8 <[^>]*> 0e1dea8d fmscseq s28, s27, s26 -0+2fc <[^>]*> 0e6cca2b fmulseq s25, s24, s23 -0+300 <[^>]*> 0e0abaca fnmacseq s22, s21, s20 -0+304 <[^>]*> 0e599a68 fnmscseq s19, s18, s17 -0+308 <[^>]*> 0e278ac7 fnmulseq s16, s15, s14 -0+30c <[^>]*> 0e766a65 fsubseq s13, s12, s11 -0+310 <[^>]*> 0d985a00 fldseq s10, \[r8\] -0+314 <[^>]*> 0dc74a00 fstseq s9, \[r7\] -0+318 <[^>]*> 0c914a01 fldmiaseq r1, {s8} -0+31c <[^>]*> 0cd23a01 fldmiaseq r2, {s7} -0+320 <[^>]*> 0cb33a01 fldmiaseq r3!, {s6} -0+324 <[^>]*> 0cf42a01 fldmiaseq r4!, {s5} -0+328 <[^>]*> 0d352a01 fldmdbseq r5!, {s4} -0+32c <[^>]*> 0d761a01 fldmdbseq r6!, {s3} -0+330 <[^>]*> 0c971b03 fldmiaxeq r7, {d1} -0+334 <[^>]*> 0c982b03 fldmiaxeq r8, {d2} -0+338 <[^>]*> 0cb93b03 fldmiaxeq r9!, {d3} -0+33c <[^>]*> 0cba4b03 fldmiaxeq sl!, {d4} -0+340 <[^>]*> 0d3b5b03 fldmdbxeq fp!, {d5} -0+344 <[^>]*> 0d3c6b03 fldmdbxeq ip!, {d6} -0+348 <[^>]*> 0c8d1a01 fstmiaseq sp, {s2} -0+34c <[^>]*> 0cce0a01 fstmiaseq lr, {s1} -0+350 <[^>]*> 0ce1fa01 fstmiaseq r1!, {s31} -0+354 <[^>]*> 0ca2fa01 fstmiaseq r2!, {s30} -0+358 <[^>]*> 0d63ea01 fstmdbseq r3!, {s29} -0+35c <[^>]*> 0d24ea01 fstmdbseq r4!, {s28} -0+360 <[^>]*> 0c857b03 fstmiaxeq r5, {d7} -0+364 <[^>]*> 0c868b03 fstmiaxeq r6, {d8} -0+368 <[^>]*> 0ca79b03 fstmiaxeq r7!, {d9} -0+36c <[^>]*> 0ca8ab03 fstmiaxeq r8!, {d10} -0+370 <[^>]*> 0d29bb03 fstmdbxeq r9!, {d11} -0+374 <[^>]*> 0d2acb03 fstmdbxeq sl!, {d12} -0+378 <[^>]*> 0ef8dac3 fsitoseq s27, s6 -0+37c <[^>]*> 0efdca62 ftosiseq s25, s5 -0+380 <[^>]*> 0efdbac2 ftosizseq s23, s4 -0+384 <[^>]*> 0efcaa61 ftouiseq s21, s3 -0+388 <[^>]*> 0efc9ac1 ftouizseq s19, s2 -0+38c <[^>]*> 0ef88a60 fuitoseq s17, s1 -0+390 <[^>]*> 0e11ba90 fmrseq fp, s3 -0+394 <[^>]*> 0ef09a10 fmrxeq r9, fpsid -0+398 <[^>]*> 0e019a90 fmsreq s3, r9 -0+39c <[^>]*> 0ee08a10 fmxreq fpsid, r8 diff --git a/gas/testsuite/gas/arm/vfp1xD.s b/gas/testsuite/gas/arm/vfp1xD.s deleted file mode 100644 index 82f080f499..0000000000 --- a/gas/testsuite/gas/arm/vfp1xD.s +++ /dev/null @@ -1,339 +0,0 @@ -@ VFP Instructions for v1xD variants (Single precision only) - .text - .global F -F: - @ First we test the basic syntax and bit patterns of the opcodes. - @ Most of these tests deliberatly use s0/r0 to avoid setting - @ any more bits than necessary. - - @ Comparison operations - - fmstat - - fcmpes s0, s0 - fcmpezs s0 - fcmps s0, s0 - fcmpzs s0 - - @ Monadic data operations - - fabss s0, s0 - fcpys s0, s0 - fnegs s0, s0 - fsqrts s0, s0 - - @ Dyadic data operations - - fadds s0, s0, s0 - fdivs s0, s0, s0 - fmacs s0, s0, s0 - fmscs s0, s0, s0 - fmuls s0, s0, s0 - fnmacs s0, s0, s0 - fnmscs s0, s0, s0 - fnmuls s0, s0, s0 - fsubs s0, s0, s0 - - @ Load/store operations - - flds s0, [r0] - fsts s0, [r0] - - @ Load/store multiple operations - - fldmias r0, {s0} - fldmfds r0, {s0} - fldmias r0!, {s0} - fldmfds r0!, {s0} - fldmdbs r0!, {s0} - fldmeas r0!, {s0} - - fldmiax r0, {d0} - fldmfdx r0, {d0} - fldmiax r0!, {d0} - fldmfdx r0!, {d0} - fldmdbx r0!, {d0} - fldmeax r0!, {d0} - - fstmias r0, {s0} - fstmeas r0, {s0} - fstmias r0!, {s0} - fstmeas r0!, {s0} - fstmdbs r0!, {s0} - fstmfds r0!, {s0} - - fstmiax r0, {d0} - fstmeax r0, {d0} - fstmiax r0!, {d0} - fstmeax r0!, {d0} - fstmdbx r0!, {d0} - fstmfdx r0!, {d0} - - @ Conversion operations - - fsitos s0, s0 - fuitos s0, s0 - - ftosis s0, s0 - ftosizs s0, s0 - ftouis s0, s0 - ftouizs s0, s0 - - @ ARM from VFP operations - - fmrs r0, s0 - fmrx r0, fpsid - fmrx r0, fpscr - fmrx r0, fpexc - - @ VFP From ARM operations - - fmsr s0, r0 - fmxr fpsid, r0 - fmxr fpscr, r0 - fmxr fpexc, r0 - - @ Now we test that the register fields are updated correctly for - @ each class of instruction. - - @ Single register operations (compare-zero): - - fcmpzs s1 - fcmpzs s2 - fcmpzs s31 - - @ Two register comparison operations: - - fcmps s0, s1 - fcmps s0, s2 - fcmps s0, s31 - fcmps s1, s0 - fcmps s2, s0 - fcmps s31, s0 - fcmps s21, s12 - - @ Two register data operations (monadic) - - fnegs s0, s1 - fnegs s0, s2 - fnegs s0, s31 - fnegs s1, s0 - fnegs s2, s0 - fnegs s31, s0 - fnegs s12, s21 - - @ Three register data operations (dyadic) - - fadds s0, s0, s1 - fadds s0, s0, s2 - fadds s0, s0, s31 - fadds s0, s1, s0 - fadds s0, s2, s0 - fadds s0, s31, s0 - fadds s1, s0, s0 - fadds s2, s0, s0 - fadds s31, s0, s0 - fadds s12, s21, s5 - - @ Conversion operations - - fsitos s0, s1 - fsitos s0, s2 - fsitos s0, s31 - fsitos s1, s0 - fsitos s2, s0 - fsitos s31, s0 - - ftosis s0, s1 - ftosis s0, s2 - ftosis s0, s31 - ftosis s1, s0 - ftosis s2, s0 - ftosis s31, s0 - - @ Move to VFP from ARM - - fmsr s0, r1 - fmsr s0, r7 - fmsr s0, r14 - fmsr s1, r0 - fmsr s2, r0 - fmsr s31, r0 - fmsr s21, r7 - - fmxr fpsid, r1 - fmxr fpsid, r14 - - @ Move to ARM from VFP - - fmrs r0, s1 - fmrs r0, s2 - fmrs r0, s31 - fmrs r1, s0 - fmrs r7, s0 - fmrs r14, s0 - fmrs r9, s11 - - fmrx r1, fpsid - fmrx r14, fpsid - - @ Load/store operations - - flds s0, [r1] - flds s0, [r14] - flds s0, [r0, #0] - flds s0, [r0, #1020] - flds s0, [r0, #-1020] - flds s1, [r0] - flds s2, [r0] - flds s31, [r0] - fsts s21, [r12, #804] - - @ Load/store multiple operations - - fldmias r0, {s1} - fldmias r0, {s2} - fldmias r0, {s31} - fldmias r0, {s0-s1} - fldmias r0, {s0-s2} - fldmias r0, {s0-s31} - fldmias r0, {s1-s31} - fldmias r0, {s2-s31} - fldmias r0, {s30-s31} - fldmias r1, {s0} - fldmias r14, {s0} - - fstmiax r0, {d1} - fstmiax r0, {d2} - fstmiax r0, {d15} - fstmiax r0, {d0-d1} - fstmiax r0, {d0-d2} - fstmiax r0, {d0-d15} - fstmiax r0, {d1-d15} - fstmiax r0, {d2-d15} - fstmiax r0, {d14-d15} - fstmiax r1, {d0} - fstmiax r14, {d0} - - @ Check that we assemble all the register names correctly - - fcmpzs s0 - fcmpzs s1 - fcmpzs s2 - fcmpzs s3 - fcmpzs s4 - fcmpzs s5 - fcmpzs s6 - fcmpzs s7 - fcmpzs s8 - fcmpzs s9 - fcmpzs s10 - fcmpzs s11 - fcmpzs s12 - fcmpzs s13 - fcmpzs s14 - fcmpzs s15 - fcmpzs s16 - fcmpzs s17 - fcmpzs s18 - fcmpzs s19 - fcmpzs s20 - fcmpzs s21 - fcmpzs s22 - fcmpzs s23 - fcmpzs s24 - fcmpzs s25 - fcmpzs s26 - fcmpzs s27 - fcmpzs s28 - fcmpzs s29 - fcmpzs s30 - fcmpzs s31 - - @ Now we check the placement of the conditional execution substring. - @ On VFP this is always at the end of the instruction. - @ We use different register numbers here to check for correct - @ disassembly - - @ Comparison operations - - fmstateq - - fcmpeseq s3, s7 - fcmpezseq s5 - fcmpseq s1, s2 - fcmpzseq s1 - - @ Monadic data operations - - fabsseq s1, s3 - fcpyseq s31, s19 - fnegseq s20, s8 - fsqrtseq s5, s7 - - @ Dyadic data operations - - faddseq s6, s5, s4 - fdivseq s3, s2, s1 - fmacseq s31, s30, s29 - fmscseq s28, s27, s26 - fmulseq s25, s24, s23 - fnmacseq s22, s21, s20 - fnmscseq s19, s18, s17 - fnmulseq s16, s15, s14 - fsubseq s13, s12, s11 - - @ Load/store operations - - fldseq s10, [r8] - fstseq s9, [r7] - - @ Load/store multiple operations - - fldmiaseq r1, {s8} - fldmfdseq r2, {s7} - fldmiaseq r3!, {s6} - fldmfdseq r4!, {s5} - fldmdbseq r5!, {s4} - fldmeaseq r6!, {s3} - - fldmiaxeq r7, {d1} - fldmfdxeq r8, {d2} - fldmiaxeq r9!, {d3} - fldmfdxeq r10!, {d4} - fldmdbxeq r11!, {d5} - fldmeaxeq r12!, {d6} - - fstmiaseq r13, {s2} - fstmeaseq r14, {s1} - fstmiaseq r1!, {s31} - fstmeaseq r2!, {s30} - fstmdbseq r3!, {s29} - fstmfdseq r4!, {s28} - - fstmiaxeq r5, {d7} - fstmeaxeq r6, {d8} - fstmiaxeq r7!, {d9} - fstmeaxeq r8!, {d10} - fstmdbxeq r9!, {d11} - fstmfdxeq r10!, {d12} - - @ Conversion operations - - fsitoseq s27, s6 - ftosiseq s25, s5 - ftosizseq s23, s4 - ftouiseq s21, s3 - ftouizseq s19, s2 - fuitoseq s17, s1 - - @ ARM from VFP operations - - fmrseq r11, s3 - fmrxeq r9, fpsid - - @ VFP From ARM operations - - fmsreq s3, r9 - fmxreq fpsid, r8 - diff --git a/gas/testsuite/gas/arm/xscale.d b/gas/testsuite/gas/arm/xscale.d deleted file mode 100644 index d1ec7322cd..0000000000 --- a/gas/testsuite/gas/arm/xscale.d +++ /dev/null @@ -1,35 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: XScale instructions -#as: -mxscale -EL - -# Test the XScale instructions: - -.*: +file format .*arm.* - -Disassembly of section .text: -0+00 <foo> ee201010 mia acc0, r0, r1 -0+04 <[^>]*> be20d01e mialt acc0, lr, sp -0+08 <[^>]*> ee284012 miaph acc0, r2, r4 -0+0c <[^>]*> 1e286015 miaphne acc0, r5, r6 -0+10 <[^>]*> ee2c8017 miaBB acc0, r7, r8 -0+14 <[^>]*> ee2da019 miaBT acc0, r9, sl -0+18 <[^>]*> ee2eb01c miaTB acc0, ip, fp -0+1c <[^>]*> ee2f0010 miaTT acc0, r0, r0 -0+20 <[^>]*> ec411000 mar acc0, r1, r1 -0+24 <[^>]*> cc4c2000 margt acc0, r2, ip -0+28 <[^>]*> ec543000 mra r3, r4, acc0 -0+2c <[^>]*> ec585000 mra r5, r8, acc0 -0+30 <[^>]*> f5d0f000 pld \[r0\] -0+34 <[^>]*> f5d1f789 pld \[r1, #1929\] -0+38 <[^>]*> f7d2f003 pld \[r2, r3\] -0+3c <[^>]*> f754f285 pld \[r4, -r5, lsl #5\] -0+40 <[^>]*> e1c100d0 ldrd r0, \[r1\] -0+44 <[^>]*> 01c327d8 ldreqd r2, \[r3, #120\] -0+48 <[^>]*> b10540d6 ldrltd r4, \[r5, -r6\] -0+4c <[^>]*> e16a88f9 strd r8, \[sl, -#137\]! -0+50 <[^>]*> e1ac00fd strd r0, \[ip, sp\]! -0+54 <[^>]*> 30ce21f0 strccd r2, \[lr\], #16 -0+58 <[^>]*> 708640f8 strvcd r4, \[r6\], r8 -0+5c <[^>]*> e5910000 ldr r0, \[r1\] -0+60 <[^>]*> e5832000 str r2, \[r3\] -0+64 <[^>]*> e321f011 msr CPSR_c, #17 ; 0x11 diff --git a/gas/testsuite/gas/arm/xscale.s b/gas/testsuite/gas/arm/xscale.s deleted file mode 100644 index d78d9a7424..0000000000 --- a/gas/testsuite/gas/arm/xscale.s +++ /dev/null @@ -1,37 +0,0 @@ - .text - .global foo -foo: - mia acc0, r0, r1 - mialt acc0, r14, r13 - - miaph acc0, r2, r4 - miaphne acc0, r5, r6 - - miaBB acc0, r7, r8 - miaBT acc0, r9, r10 - miaTB acc0, r12, r11 - miaTT acc0, r0, r0 - - mar acc0, r1, r1 - margt acc0, r2, r12 - - mra r3, r4, acc0 - mra r5, r8, acc0 - - pld [r0] - pld [r1, #0x789] - pld [r2, r3] - pld [r4, -r5, lsl #5] - - ldrd r0, [r1] - ldreqd r2, [r3, #0x78] - ldrltd r4, [r5, -r6] - strd r8, [r10,#-0x89]! - strald r0, [r12, +r13]! - strlod r2, [r14], #+0x010 - strvcd r4, [r6], r8 - - ldr r0, [r1] - str r2, [r3] - - msr cpsr_ctl, #0x11 |