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* Fix 68hc11 timer device (accuracy, io, timer overflow)Stephane Carrez2000-09-062-115/+197
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* Fix 68HC11 SPI simulatorStephane Carrez2000-09-052-8/+38
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* 2000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley2000-08-2811-181/+346
| | | | | | | | | | | | | * Makefile.in: Use of @true confuses VPATH. Remove it. * cpu.h: Regenerated. * cpux.h: Regenerated. * decode.c: Regenerated. * decodex.c: Regenerated. * model.c: Regenerated. * modelx.c: Regenerated. * sem-switch.c: Regenerated. * sem.c: Regenerated. * semx-switch.c: Regenerated.
* 2000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley2000-08-283-78/+176
| | | | | * cpu.h: Regenerated. * decode.c: Regenerated.
* 2000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley2000-08-282-1/+13
| | | | | * cgen-trace.c (sim_cgen_disassemble_insn): Make sure entire insn is in insn_value if it will fit.
* Forgot to check this in with last commit!Dave Brolley2000-08-221-0/+15
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* * Contribute CGEN simulator build support code.Frank Ch. Eigler2000-08-219-4/+325
| | | | * Patch was posted by bje@redhat.com.
* 2000-08-15 Dave Brolley <brolley@redhat.com>Dave Brolley2000-08-151-2/+2
| | | | * sim-profile.c (profile_print_speed): Print cpu frequency if not zero.
* 2000-08-15 Dave Brolley <brolley@redhat.com>Dave Brolley2000-08-152-6/+103
| | | | | | | | | | | * sim-profile.h (PROFILE_DATA): Add cpu_freq. (PROFILE_CPU_FREQ): New macro. * sim-profile.c (OPTION_PROFILE_CPU_FREQUENCY): New enumerator. (profile-options): Add profile-cpu-frequency. (parse_frequency): New function. (profile_option_handler): Handle OPTION_PROFILE_CPU_FREQUENCY. (profile_print_speed): Print cpu frequency and simulated execution time. Re-indent other items to match.
* Compute write back value for post increment loads beforeNick Clifton2000-08-152-34/+47
| | | | performing the load in case the offset register is overwritten.
* Use address mapping levels for 68hc11 simulator (kill overlap hack)Stephane Carrez2000-08-119-39/+67
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* 2000-08-10 Kazu Hirata <kazu@hxi.com>Kazu Hirata2000-08-112-8/+10
| | | | * compile.c (decode): Clean up the code.
* Eliminate use of MIN().Andrew Cagney2000-08-112-2/+7
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* * am33.igen: Warning clean-up.Alexandre Oliva2000-08-092-42/+24
| | | | | | | | (movm): Initialize PC and mask. (mov, movbu, movhu): Set srcreg2 from RI0. (bsch): Initialize c. (sat16_cmp): Actually do the comparison. (mov_llt): Do not overwrite dstreg with uninitialized variable.
* * Usability improvementFrank Ch. Eigler2000-07-272-1/+6
| | | | | | | 2000-07-27 Frank Ch. Eigler <fche@redhat.com> From Maciej W. Rozycki <macro@ds2.pg.gda.pl> * Makefile.in (install): Install run.1 man page.
* Don't clean *.igen.Andrew Cagney2000-07-272-1/+6
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* 2000-06-23 Doug Evans <dje@casey.transmeta.com>Andrew Cagney2000-07-272-8/+10
| | | | * Makefile.in (headers,nltvals.def): Merge.
* 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney2000-07-273-2/+9
| | | | | | | * nrun.c (main): Print the simulator statistics only in verbose mode. * hw-properties.h (hw_find_integer_array_property): Fix prototype (use signed_cell).
* 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney2000-07-275-0/+39
| | | | | | | | * sim-events.c (sim_events_remain_time): New function returning the time that remains before the event is raised. * hw-events.c (hw_event_remain_time): Likewise. * sim-events.h (sim_events_remain_time): Declare. * hw-events.h (hw_event_remain_time): Declare.
* 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney2000-07-272-1/+17
| | | | | | * sim-hw.c: Use <errno.h> instead of <sys/errno.h> (OPTION_HW_LIST): New option --hw-list to list the devices. (hw_option_handler): List the device tree with 'sim_hw_print'.
* Add m68hc11 configry.Andrew Cagney2000-07-275-0/+4366
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* New simulator.Andrew Cagney2000-07-2716-0/+7449
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* From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:Andrew Cagney2000-07-274-2/+126
| | | | | | | | | * sim-bits.h (_MSB_16, _LSB_16): Define for 16-bit targets. (MASK, LSBIT, MSBIT): Likewise and use _MSB_16 and _LSB_16. (EXTENDED): Define for 16-bit word size. * sim-bits.c (LSEXTRACTED, MSEXTRACTED, LSINSERTED, MSINSERTED, LSSEXT, MSSEXT): Implement for 16-bit word size. * sim-types.h: Added support for 16-bit targets.
* * compile.c (decode): Distinguish inc/dec.[wl] and adds/subsAndrew Cagney2000-07-272-1/+11
| | | | correctly.
* * m16.igen (break): Call SignalException not sim_engine_halt.Andrew Cagney2000-07-202-1/+5
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* 2000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2000-07-142-1/+5
| | | | * wrapper.c (sim_create_inferior): Fix typo in the previous patch.
* 2000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2000-07-142-0/+9
| | | | | * wrapper.c (sim_create_inferior): Reset mode to ARM when creating a new inferior.
* Change minimum loop size limit to 0x10 (103792)Nick Clifton2000-07-052-1/+5
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* * armvirt.c (ABORTS): Do not define.Alexandre Oliva2000-07-042-1/+3
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* * armdefs.h (struct ARMul_State): Add is_StrongARM.Alexandre Oliva2000-07-045-11/+59
| | | | | | | | | | (ARM_Strong_Prop, STRONGARM): Define. * arminit.c (ARMul_NewState): Reset is_StrongARM. (ARMul_SelectProcessor): Set is_StrongARM. * wrapper.c (sim_create_inferior): Use bfd machine type to determine processor type to emulate. * armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC when emulating StrongARM.
* * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.Alexandre Oliva2000-07-042-1/+3
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* * armemu.h (INSN_SIZE): New macro.Alexandre Oliva2000-07-044-45/+48
| | | | | | | (SET_ABORT): Save CPSR in SPSR and set LR. * armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE. (WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode. * arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
* * armemu.c (LoadSMult): Use WriteR15() to discard the leastAlexandre Oliva2000-07-042-2/+5
| | | | significant bits of PC.
* * armemu.h (WRITEDESTB): New macro.Alexandre Oliva2000-07-043-37/+48
| | | | | | | | | * armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to modify PC. Moved the existing logic... (WriteR15Branch): ... here. New function. (WriteR15, WriteSR15): Drop the two least significant bits. (LoadSMult): Use WriteR15Branch() to modify PC. (LoadMult): Use WRITEDESTB() instead of WRITEDEST().
* * armemu.h (GETSPSR): Call ARMul_GetSPSR().Alexandre Oliva2000-07-043-4/+18
| | | | | | | | * armsupp.c (ARMul_CPSRAltered): Zero out bits as they're extracted from state->Cpsr, but preserve the unused bits. (ARMul_GetCPSR): Get bits preserved in state->Cpsr. (ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to get the full CPSR word.
* * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.Alexandre Oliva2000-07-044-30/+40
| | | | | | | | | (SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros. (SETPSR, SET_INTMODE, SETCC): Removed. * armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit mask. Use SETPSR_* to modify PSR. (ARMul_SetCPSR): Load all bits from value. * armemu.c (ARMul_Emulate, msr): Do not test bit mask.
* * armemu.c (ARMul_Emulate): Compute writeback value beforeAlexandre Oliva2000-07-042-8/+20
| | | | | loading, since the offset register may be the destination register.
* * armdefs.h (SYSTEMBANK): Define as USERBANK.Alexandre Oliva2000-07-043-8/+6
| | | | * armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases.
* TIc80 simulator.Andrew Cagney2000-07-0418-1/+8613
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* Fix MOVN.fmt and MOVZ.fmt, need to test GPR[RT].Andrew Cagney2000-07-042-14/+14
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* * verbosity reductionFrank Ch. Eigler2000-06-242-2/+5
| | | | | | 2000-06-23 Frank Ch. Eigler <fche@redhat.com> * cgen-trace.h (TRACE_USEFUL_MASK): Remove TRACE_EVENTS_IDX.
* * build cleanliness fixFrank Ch. Eigler2000-06-242-1/+6
| | | | | | | 2000-06-24 Frank Ch. Eigler <fche@redhat.com> From Maciej W. Rozycki <macro@ds2.pg.gda.pl>: * Makefile.in (distclean): Clean cconfig.h also.
* Fix printf arguments.Andrew Cagney2000-06-232-3/+8
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* * armemu.c (Multiply64): Fix computation of flag N.Alexandre Oliva2000-06-222-4/+5
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* * armemu.c (MultiplyAdd64): Fix computation of flag N.Alexandre Oliva2000-06-222-4/+7
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* * build fixFrank Ch. Eigler2000-06-202-21/+11
| | | | | | | | 2000-06-20 Frank Ch. Eigler <fche@redhat.com> * compile.c: Don't include "wait.h". (sim_resume): Use local SIM_WIFEXITED and SIM_WIFSIGNALED macros instead of WIF* from host.
* * armemu.h (NEGBRANCH): Do not overwrite the two most significantAlexandre Oliva2000-06-202-1/+6
| | | | bits of the offset.
* Add strongarm testsNick Clifton2000-06-192-1/+10
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* * "Dont" -> "Don't"Frank Ch. Eigler2000-06-133-2/+6
| | | | | | 2000-06-13 Frank Ch. Eigler <fche@redhat.com> * compile.c, writecode.c: Correct typo.
* 2000-06-13 Kazu Hirata <kazu@hxi.com>Jeff Law2000-06-132-47/+36
| | | | * compile.c: Fix formatting.
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