summaryrefslogtreecommitdiff
path: root/sim
Commit message (Expand)AuthorAgeFilesLines
* Add MSBIT* and LSBIT* macro's to sim-bits.hAndrew Cagney1997-08-277-1/+1214
* New file - generic implementation of sim_load for hardware onlyAndrew Cagney1997-08-271-0/+53
* Add ABFD argument to sim_create_inferior. Document.Andrew Cagney1997-08-2731-310/+553
* * idecode_expression.h (ALU_END): From Charles Lefurgy - ExtractAndrew Cagney1997-08-272-3/+13
* Save a copy of argv, not just a pointer.Andrew Cagney1997-08-273-18/+54
* Make building of w65 simulator conditional on --enable-sim.Andrew Cagney1997-08-263-2/+15
* Flush defunct sim_kill.Andrew Cagney1997-08-2624-92/+48
* Add ABFD argument to sim_open call. Pass through to sim_config soAndrew Cagney1997-08-2537-487/+3319
* Updated with respect to the HDD-tool-0611 document.Nick Clifton1997-08-222-58/+82
* Added N step divide routines, courtesy of Sugimoto at NEC.Nick Clifton1997-08-202-218/+338
* Fixed interpretation of SR bit in list18 structures.Nick Clifton1997-08-202-640/+1943
* Add suport for v850e and v850eqNick Clifton1997-08-181-0/+61
* Add support for V850eq variant opcodes.Nick Clifton1997-08-181-0/+14
* Add comment.David Edelsohn1997-08-141-1/+8
* * callback.c (os_poll_quit): Make static.David Edelsohn1997-08-142-3/+41
* Tidied up sanitization.Nick Clifton1997-08-142-4/+45
* Added support for v850e and v850eq instructions.Nick Clifton1997-08-142-1/+55
* * sim-calls.c (sim_store_register): Allow accumulatorsMark Alexander1997-08-092-2/+7
* Add test for "mtsa"Andrew Cagney1997-07-293-0/+16
* Handle overflow from signed divide by -1.Andrew Cagney1997-07-281-5/+24
* More checks for pdivuwAndrew Cagney1997-07-282-0/+18
* gencode.c: Two arg MADD should not assign result to /bin/bash.Gavin Romig-Koch1997-07-252-1/+7
* * configure.in (sparc*-*-*): Don't build erc32.David Edelsohn1997-07-251-0/+3
* Keep sim-watch.[ch].David Edelsohn1997-07-221-0/+2
* Don't always keep igen, it's currently only kept if d30v or tic80.David Edelsohn1997-07-221-1/+0
* * sim-n-core.h (sim_core_write_unaligned_N): Add missing breakDavid Edelsohn1997-07-221-0/+5
* Configure r5900 testsuite sub-directory.Andrew Cagney1997-07-152-1/+38
* Similistic configure/build scripts for tx59 simulator tests.Andrew Cagney1997-07-155-0/+1182
* Generic tests for 5900.Andrew Cagney1997-07-152-0/+40
* Standard simulator tests.Andrew Cagney1997-07-144-0/+65
* Tests for mips r5900 instructionsAndrew Cagney1997-07-1156-0/+892
* Fix a number of problems in the r5900 specific p* (parallel) instructions.Andrew Cagney1997-07-113-90/+177
* Sync powerpc simulator with public version. Enable FPSCR and stringAndrew Cagney1997-07-031-1/+1
* * gencode.c (build_instruction): Handle "pext5" according toJeff Law1997-07-022-1/+4
* * gencode.c (build_instruction): Handle "ppac5" according toJeff Law1997-07-022-1/+6
* * interp.c (sim_engine_run): Reset the ZERO register to zeroJeff Law1997-07-022-23/+40
* * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.Jeff Law1997-07-022-3/+20
* Add test for dbt/rtd instructionsAndrew Cagney1997-06-271-0/+38
* * interp.c (sim_resume): Clear State.exited.Jeff Law1997-06-241-0/+1
* * simops.c: Fix thinko in last change.Jeff Law1997-06-122-1/+5
* * simops.c: "call" stores the callee saved registers into theJeff Law1997-06-102-53/+55
* * simops.c: Fix return address computation for "call" instructions.Jeff Law1997-06-102-2/+10
* Open in binary mode when available.Andrew Cagney1997-06-061-0/+8
* Clean up formatting of instruction traces.Andrew Cagney1997-06-061-0/+33
* Verify magic number of simulator struct.Andrew Cagney1997-06-051-0/+4
* Initialize the sim-engine module.Andrew Cagney1997-06-041-0/+12
* o Fixes to repeated watchpointsAndrew Cagney1997-06-033-110/+228
* o Fix padd insnAndrew Cagney1997-06-021-8/+12
* Add assembler information to igen input files.Andrew Cagney1997-05-307-153/+309
* Fix subu immed - was incorrectly using unsigned.Andrew Cagney1997-05-293-1/+10
View Lorry Controller Status