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* Update the RX simulator to handle the latest opcode types.Nick Clifton2015-11-102-1/+24
* sim: cr16/d10v: localize translation funcsMike Frysinger2015-11-104-6/+18
* sim: m32c: move test code to testsuiteMike Frysinger2015-11-108-26/+17
* sim: m32c: drop redundant dependency infoMike Frysinger2015-11-102-13/+4
* sim: h8300: drop unused littleendian variableMike Frysinger2015-11-102-13/+5
* sim: ft32: test coverage for link parameters and PM write portJames Bowman2015-10-122-0/+42
* sim: moxie: fix leakage in error path [BZ #18273]Mike Frysinger2015-10-112-0/+6
* sim: bfin: handle negative left saturated shifts as ashifts [BZ #18407]Mike Frysinger2015-10-114-1/+33
* sim: ft32: correct simulation of MEMCPY and MEMSETJames Bowman2015-09-292-2/+7
* sim: ft32: correctly simulate PM write portJames Bowman2015-09-292-2/+10
* [PATCH] Add micromips support to the MIPS simulatorAndrew Bennett2015-09-2522-1468/+7290
* sim: ft32: add character input portJames Bowman2015-09-222-0/+6
* Fix building GDB for the M32C by providing a stub sim_info function.Nick Clifton2015-08-052-0/+11
* Remove leading/trailing white spaces in ChangeLogH.J. Lu2015-07-2431-1219/+1219
* Remove extraneous whitespace from ARM sim sources.Nick Clifton2015-07-1429-320/+348
* Fix snafu with latest addition to the ARM sim.Nick Clifton2015-07-022-1/+7
* Add support for ARM v6 instructions.Nick Clifton2015-06-289-126/+3881
* sim: trace: drop unused trace_one_insnMike Frysinger2015-06-243-98/+5
* sim: trace: rename debug_printf fullyMike Frysinger2015-06-243-5/+10
* sim: trace: add a basic cpu register classMike Frysinger2015-06-248-42/+56
* sim: trace: add set of system helpersMike Frysinger2015-06-242-0/+28
* sim: trace: document alu/fpu/vpu trace options betterMike Frysinger2015-06-243-7/+14
* sim: common: replace SIM_FILTER_PATH with lbasenameMike Frysinger2015-06-233-26/+16
* sim: use AS_HELP_STRING everywhereMike Frysinger2015-06-2360-368/+791
* sim: trace: do not enable internal debug by defaultMike Frysinger2015-06-232-2/+6
* sim: assume recentish compiler/systemsMike Frysinger2015-06-236-43/+14
* sim: common: add basic model assertMike Frysinger2015-06-212-0/+5
* sim: common: use standard intXX_t types for signedXXMike Frysinger2015-06-212-82/+27
* sim: common: standardize multiple include definesMike Frysinger2015-06-216-13/+26
* sim: syscall: simplify unknown syscall traceMike Frysinger2015-06-182-5/+7
* sim: callback: fix sentinel testing when walking mapsMike Frysinger2015-06-182-2/+7
* sim: syscall: add common sim_syscall helpersMike Frysinger2015-06-1715-171/+197
* sim: syscall: unify memory helpersMike Frysinger2015-06-1720-214/+167
* sim: callback: add human readable strings for debugging to mapsMike Frysinger2015-06-177-675/+768
* sim: bfin: expand CB_SYS_xxx commentMike Frysinger2015-06-122-1/+7
* sim: update configure.in->configure.ac docsMike Frysinger2015-06-1262-40/+162
* sim: drop -DTRACE from configureMike Frysinger2015-06-1255-84/+193
* sim: msp430: use new common trace print helpersMike Frysinger2015-06-122-109/+69
* sim: moxie: use new common trace definesMike Frysinger2015-06-122-4/+14
* sim: trace: add common macros for logging infoMike Frysinger2015-06-128-37/+74
* sim: mips: switch to common WITH_TRACE_ANY_PMike Frysinger2015-06-124-30/+36
* sim: trace: add WITH_TRACE_ANY_P helperMike Frysinger2015-06-124-8/+19
* sim: moxie: rename TRACE to MOXIE_TRACE_INSNMike Frysinger2015-06-122-73/+79
* sim: cgen: namespace custom trace functionsMike Frysinger2015-06-1243-7039/+7143
* sim: msp430: delete unused trace macrosMike Frysinger2015-06-112-48/+6
* sim: trace: centralize the system tracingMike Frysinger2015-06-114-17/+14
* sim: trace: add STRACE_xxx_P macrosMike Frysinger2015-06-112-0/+21
* sim: trace: use existing defines for the useful maskMike Frysinger2015-06-112-4/+5
* sim: trace: create a common WITH_TRACE_P macroMike Frysinger2015-06-112-19/+28
* sim: frv: drop custom debug maskMike Frysinger2015-06-112-5/+4