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* * sim-calls.c (sim_store_register): Allow accumulatorsMark Alexander1997-08-092-2/+7
* Add test for "mtsa"Andrew Cagney1997-07-293-0/+16
* Handle overflow from signed divide by -1.Andrew Cagney1997-07-281-5/+24
* More checks for pdivuwAndrew Cagney1997-07-282-0/+18
* gencode.c: Two arg MADD should not assign result to /bin/bash.Gavin Romig-Koch1997-07-252-1/+7
* * configure.in (sparc*-*-*): Don't build erc32.David Edelsohn1997-07-251-0/+3
* Keep sim-watch.[ch].David Edelsohn1997-07-221-0/+2
* Don't always keep igen, it's currently only kept if d30v or tic80.David Edelsohn1997-07-221-1/+0
* * sim-n-core.h (sim_core_write_unaligned_N): Add missing breakDavid Edelsohn1997-07-221-0/+5
* Configure r5900 testsuite sub-directory.Andrew Cagney1997-07-152-1/+38
* Similistic configure/build scripts for tx59 simulator tests.Andrew Cagney1997-07-155-0/+1182
* Generic tests for 5900.Andrew Cagney1997-07-152-0/+40
* Standard simulator tests.Andrew Cagney1997-07-144-0/+65
* Tests for mips r5900 instructionsAndrew Cagney1997-07-1156-0/+892
* Fix a number of problems in the r5900 specific p* (parallel) instructions.Andrew Cagney1997-07-113-90/+177
* Sync powerpc simulator with public version. Enable FPSCR and stringAndrew Cagney1997-07-031-1/+1
* * gencode.c (build_instruction): Handle "pext5" according toJeff Law1997-07-022-1/+4
* * gencode.c (build_instruction): Handle "ppac5" according toJeff Law1997-07-022-1/+6
* * interp.c (sim_engine_run): Reset the ZERO register to zeroJeff Law1997-07-022-23/+40
* * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.Jeff Law1997-07-022-3/+20
* Add test for dbt/rtd instructionsAndrew Cagney1997-06-271-0/+38
* * interp.c (sim_resume): Clear State.exited.Jeff Law1997-06-241-0/+1
* * simops.c: Fix thinko in last change.Jeff Law1997-06-122-1/+5
* * simops.c: "call" stores the callee saved registers into theJeff Law1997-06-102-53/+55
* * simops.c: Fix return address computation for "call" instructions.Jeff Law1997-06-102-2/+10
* Open in binary mode when available.Andrew Cagney1997-06-061-0/+8
* Clean up formatting of instruction traces.Andrew Cagney1997-06-061-0/+33
* Verify magic number of simulator struct.Andrew Cagney1997-06-051-0/+4
* Initialize the sim-engine module.Andrew Cagney1997-06-041-0/+12
* o Fixes to repeated watchpointsAndrew Cagney1997-06-033-110/+228
* o Fix padd insnAndrew Cagney1997-06-021-8/+12
* Add assembler information to igen input files.Andrew Cagney1997-05-307-153/+309
* Fix subu immed - was incorrectly using unsigned.Andrew Cagney1997-05-293-1/+10
* Add a simple dissasembler to igenAndrew Cagney1997-05-294-38/+740
* Fix watching PC for 64bit (mips) target.Andrew Cagney1997-05-272-42/+146
* Extend xor-endian and per-cpu support in core module.Andrew Cagney1997-05-2711-63/+294
* Preliminary suport for xor-endian suport in core module.Andrew Cagney1997-05-236-79/+181
* Incorrect test for zero-r0 code gen.Andrew Cagney1997-05-232-2/+12
* Enumerate longjmp's return type.Andrew Cagney1997-05-231-0/+5
* ifdef out uses of simSTOP, simSTEP and simBE when DEBUG is defined.Gavin Romig-Koch1997-05-222-0/+9
* Change longjmp param/setjmp return value used for simulator restart from 0 to 2.Gavin Romig-Koch1997-05-223-6/+27
* * interp.c (sim_resume): Add missing case in big switchJeff Law1997-05-222-0/+6
* Watchpoint interface.Andrew Cagney1997-05-2116-817/+1486
* * interp.c: Replace all references to load_mem and store_memJeff Law1997-05-203-340/+295
* Part II of adding callback argument to sim_open(). Update all theAndrew Cagney1997-05-207-56/+48
* Depreciate sim_set_callbacks() function. Set simulator callbacksAndrew Cagney1997-05-203-18/+19
* Make getpid, kill supported system callsMichael Meissner1997-05-196-39/+157
* * interp.c (dispatch): Make this an inline function.Jeff Law1997-05-193-7/+10
* Graft sim/common event and other code onto the mips simulator.Andrew Cagney1997-05-195-220/+196
* Update.Andrew Cagney1997-05-191-3/+8
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