| Commit message (Expand) | Author | Age | Files | Lines |
* | Fixes problems building the V850 simulator introduced with the previous delta. | Nick Clifton | 2015-02-27 | 1 | -7/+7 |
* | Adds support for emulating V850 e3v5 instructions to the simulator. | Nick Clifton | 2015-02-24 | 1 | -22/+811 |
* | * v850.igen (LDSR): Accept but ignore a selID parameter. | Nick Clifton | 2013-05-13 | 1 | -3/+5 |
* | * simops.c (v850_rotl): New function. | Nick Clifton | 2013-01-28 | 1 | -0/+206 |
* | * interp.c (sim_open): Add support for bfd_arch_v850_rh850 | Nick Clifton | 2013-01-10 | 1 | -14/+102 |
* | * v850.igen (W,WWWW): Correct computation of register number. | Nick Clifton | 2012-09-13 | 1 | -14/+7 |
* | Commit gdb and sim support for v850e2 and v850e2v3 on behalf of | Kevin Buettner | 2012-03-29 | 1 | -10/+2069 |
* | * simops.c (OP_1C007E0): Compensate for 64 bit hosts. | DJ Delorie | 2008-02-06 | 1 | -2/+2 |
* | Index: ChangeLog | DJ Delorie | 2008-02-06 | 1 | -18/+18 |
* | Add support for v850e1 instructions | Nick Clifton | 2003-09-05 | 1 | -0/+62 |
* | * simops.c (OP_40): Delete. Move code to... | Nick Clifton | 2003-04-06 | 1 | -1/+42 |
* | Remove v850ea references | Nick Clifton | 2002-09-19 | 1 | -316/+0 |
* | Remove illegal instruciton pattern, since it is the same as the breakpoint | Nick Clifton | 2000-05-30 | 1 | -7/+0 |
* | * merge from internal tree | Frank Ch. Eigler | 2000-05-08 | 1 | -4/+15 |
* | * more compatibility with v850 hardware | Frank Ch. Eigler | 2000-03-25 | 1 | -0/+7 |
* | Initial creation of sourceware repositorygdb-4_18-branchpoint | Stan Shebs | 1999-04-16 | 1 | -0/+1407 |
* | Initial creation of sourceware repository | Stan Shebs | 1999-04-16 | 1 | -1461/+0 |
* | Reverrt BREAK value back to its old value | Nick Clifton | 1997-12-05 | 1 | -1/+1 |
* | Fixed sanitization, | Nick Clifton | 1997-12-04 | 1 | -208/+64 |
* | Clean up tracing for Bcond & jmp insns. | Andrew Cagney | 1997-09-19 | 1 | -128/+100 |
* | Fix cmov immed. | Andrew Cagney | 1997-09-19 | 1 | -12/+56 |
* | Fix cmov insn. | Andrew Cagney | 1997-09-19 | 1 | -1/+3 |
* | Clean up more tracing. | Andrew Cagney | 1997-09-17 | 1 | -3/+21 |
* | Fix tracing for: "ctret", "bsw", "hsw" | Andrew Cagney | 1997-09-17 | 1 | -36/+72 |
* | Smooth some of ALU tracing's rough edges. | Andrew Cagney | 1997-09-16 | 1 | -39/+69 |
* | Restrict ldsr (load system register) to modifying just non-reserved PSW bits. | Andrew Cagney | 1997-09-16 | 1 | -2/+16 |
* | Add v850e version of breakpoint instruction. | Andrew Cagney | 1997-09-16 | 1 | -5/+16 |
* | For instructions moved into v850.igen was computing (wrong) NIA when | Andrew Cagney | 1997-09-15 | 1 | -10/+10 |
* | Fix sanitization for v850 V v850e V v850eq | Andrew Cagney | 1997-09-15 | 1 | -11/+267 |
* | For v850eq start up with US bit set. | Andrew Cagney | 1997-09-15 | 1 | -2/+26 |
* | Check reserved bits before executing instructions. | Andrew Cagney | 1997-09-12 | 1 | -1/+48 |
* | Add multi-sim support to v850/v850e/v850eq simulators. | Andrew Cagney | 1997-09-08 | 1 | -0/+1151 |