| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Switch mips-lsi-elf mips16 simulator to igen (from gencode). | Andrew Cagney | 1998-11-23 | 1 | -2/+2 |
| * | Add configury for mips-lsi-elf target (32 bit MIPS16). | Andrew Cagney | 1998-11-12 | 1 | -4/+12 |
| * | * MONSTER sky -> devo merge | Frank Ch. Eigler | 1998-10-27 | 1 | -46/+134 |
| * | * Patch for PR 17142, brought over from sky branch. | Frank Ch. Eigler | 1998-09-08 | 1 | -6/+21 |
| * | * sim-main.h: shadow NUM_CORE_REGS from tm-txvu.h | Ron Unrau | 1998-07-31 | 1 | -6/+14 |
| * | * interp.c (OPTION_BRANCH_BUG_4011): Add. | Gavin Romig-Koch | 1998-06-29 | 1 | -1/+39 |
| * | * sky-pke.c(read_pke_pc): return source address of current pc | Ron Unrau | 1998-06-16 | 1 | -2/+15 |
| * | * sky-engine.c: Set ordering of device issues to match enumerated type | Ron Unrau | 1998-06-14 | 1 | -7/+7 |
| * | * Handle 10 and 20-bit versions of Break instruction. Move handling | Ian Carmichael | 1998-06-09 | 1 | -1/+19 |
| * | * Monster patch - may destablize MIPS sims for a little while. | Frank Ch. Eigler | 1998-05-18 | 1 | -7/+72 |
| * | * sim-main.h (INSN_NAME): New arg `cpu'. | Doug Evans | 1998-05-07 | 1 | -2/+8 |
| * | * sim-main.h, sky-libvpe.c: r59fp_op* functions were called with | James Lemke | 1998-04-29 | 1 | -11/+12 |
| * | Move target specific stuff from sim/common/sim-base.h to sim/mips/sim-main.h | James Lemke | 1998-04-22 | 1 | -0/+11 |
| * | r5900.igen, sim-main.h, sky-libvpe.c: Add run-time option --float-type | James Lemke | 1998-04-21 | 1 | -0/+19 |
| * | Fix sanitize tag. The proper keyword is "start-sanitize-*", not | Jason Molenda | 1998-04-21 | 1 | -2/+2 |
| * | For new IGEN simulators, rewrite checks validating correct use of the | Andrew Cagney | 1998-04-21 | 1 | -37/+47 |
| * | Debug tx19 built from igen sources. | Andrew Cagney | 1998-04-15 | 1 | -1/+7 |
| * | Implement 32 bit MIPS16 instructions listed in m16.igen. | Andrew Cagney | 1998-04-14 | 1 | -5/+7 |
| * | * Backed out week-old attempt at enabling quadword memory access on | Frank Ch. Eigler | 1998-04-09 | 1 | -12/+0 |
| * | * Temporarily change LOADDRMASK in sky build. | Ian Carmichael | 1998-04-09 | 1 | -0/+2 |
| * | * R5900 COP2 is now ready for testing. Let loose the dogs! | Frank Ch. Eigler | 1998-04-07 | 1 | -0/+11 |
| * | * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF | Frank Ch. Eigler | 1998-04-05 | 1 | -2/+6 |
| * | aclocal.m4: Don't enable inlining when cross-compiling. | Andrew Cagney | 1998-04-05 | 1 | -9/+19 |
| * | Re-do load/store operations so that they work for both 32 and 64 bit | Andrew Cagney | 1998-04-02 | 1 | -2/+9 |
| * | sky-vu.[ch]: prototype decls, cast floats to ints before register transfer | Ron Unrau | 1998-04-01 | 1 | -3/+4 |
| * | * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hide | Frank Ch. Eigler | 1998-03-30 | 1 | -4/+7 |
| * | * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] code | Frank Ch. Eigler | 1998-03-27 | 1 | -1/+13 |
| * | Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't check | Andrew Cagney | 1998-03-03 | 1 | -1/+1 |
| * | Add generic sim-info.c:sim_info() function using module mechanism. | Andrew Cagney | 1998-02-28 | 1 | -1/+1 |
| * | Finish implementation of r5900 instructions. | Andrew Cagney | 1998-02-25 | 1 | -0/+16 |
| * | sim-main.h: Re-arange r5900 registers so that they have their own | Andrew Cagney | 1998-02-23 | 1 | -51/+96 |
| * | Rewrite the mipsI/II/III pending-slot code. | Andrew Cagney | 1998-02-02 | 1 | -36/+81 |
| * | mips: Add multi-processor support for r5900. Others might work. | Andrew Cagney | 1998-02-01 | 1 | -65/+74 |
| * | igen: Fix SMP simulator generator support. | Andrew Cagney | 1998-01-31 | 1 | -2/+4 |
| * | Use macro GPR_SET(N,VAL) to clear zero registers. | Andrew Cagney | 1998-01-21 | 1 | -2/+5 |
| * | o Add SIM_SIGFPE to sim-signals | Andrew Cagney | 1997-11-20 | 1 | -10/+0 |
| * | Allow reads/writes to C0_CONFIG register. | Andrew Cagney | 1997-11-20 | 1 | -1/+18 |
| * | Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1, | Andrew Cagney | 1997-11-11 | 1 | -0/+3 |
| * | Replace global IPC with function argument cia or current instruction | Andrew Cagney | 1997-11-06 | 1 | -2/+0 |
| * | IGEN likes to cache the current instruction address (CIA). Change the | Andrew Cagney | 1997-11-06 | 1 | -49/+48 |
| * | Rewrite the MIPS simulator's memory model so that it uses the generic | Andrew Cagney | 1997-11-05 | 1 | -9/+13 |
| * | Delete -l and -n options, didn't do anything. | Andrew Cagney | 1997-11-05 | 1 | -1/+0 |
| * | Rewrite sim_monitor (implements read, write, open, et.al. system | Andrew Cagney | 1997-11-05 | 1 | -3/+4 |
| * | Correct r5900 sanitization. | Gavin Romig-Koch | 1997-11-04 | 1 | -1/+1 |
| * | common/sim-bits.h: Document ROTn macro. | Andrew Cagney | 1997-10-29 | 1 | -0/+3 |
| * | Add function to fetch 32bit instructions | Andrew Cagney | 1997-10-24 | 1 | -23/+28 |
| * | Use SIM*_OVERFLOW_RESULT defined in sim-alu.h | Andrew Cagney | 1997-10-21 | 1 | -2/+2 |
| * | Delete profile support from MIPS simulator, use sim/common/sim-profile | Andrew Cagney | 1997-10-21 | 1 | -2/+0 |
| * | Make mips registers of type unsigned_word. | Andrew Cagney | 1997-10-20 | 1 | -2/+3 |
| * | Move register definitions and macros out of interp.c and into sim-main.h | Andrew Cagney | 1997-10-16 | 1 | -1/+318 |
