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path: root/sim/mips/sim-main.h
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* Move target specific stuff from sim/common/sim-base.h to sim/mips/sim-main.hJames Lemke1998-04-221-0/+11
* r5900.igen, sim-main.h, sky-libvpe.c: Add run-time option --float-typeJames Lemke1998-04-211-0/+19
* Fix sanitize tag. The proper keyword is "start-sanitize-*", notJason Molenda1998-04-211-2/+2
* For new IGEN simulators, rewrite checks validating correct use of theAndrew Cagney1998-04-211-37/+47
* Debug tx19 built from igen sources.Andrew Cagney1998-04-151-1/+7
* Implement 32 bit MIPS16 instructions listed in m16.igen.Andrew Cagney1998-04-141-5/+7
* * Backed out week-old attempt at enabling quadword memory access onFrank Ch. Eigler1998-04-091-12/+0
* * Temporarily change LOADDRMASK in sky build.Ian Carmichael1998-04-091-0/+2
* * R5900 COP2 is now ready for testing. Let loose the dogs!Frank Ch. Eigler1998-04-071-0/+11
* * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIFFrank Ch. Eigler1998-04-051-2/+6
* aclocal.m4: Don't enable inlining when cross-compiling.Andrew Cagney1998-04-051-9/+19
* Re-do load/store operations so that they work for both 32 and 64 bitAndrew Cagney1998-04-021-2/+9
* sky-vu.[ch]: prototype decls, cast floats to ints before register transferRon Unrau1998-04-011-3/+4
* * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hideFrank Ch. Eigler1998-03-301-4/+7
* * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] codeFrank Ch. Eigler1998-03-271-1/+13
* Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't checkAndrew Cagney1998-03-031-1/+1
* Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1998-02-281-1/+1
* Finish implementation of r5900 instructions.Andrew Cagney1998-02-251-0/+16
* sim-main.h: Re-arange r5900 registers so that they have their ownAndrew Cagney1998-02-231-51/+96
* Rewrite the mipsI/II/III pending-slot code.Andrew Cagney1998-02-021-36/+81
* mips: Add multi-processor support for r5900. Others might work.Andrew Cagney1998-02-011-65/+74
* igen: Fix SMP simulator generator support.Andrew Cagney1998-01-311-2/+4
* Use macro GPR_SET(N,VAL) to clear zero registers.Andrew Cagney1998-01-211-2/+5
* o Add SIM_SIGFPE to sim-signalsAndrew Cagney1997-11-201-10/+0
* Allow reads/writes to C0_CONFIG register.Andrew Cagney1997-11-201-1/+18
* Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,Andrew Cagney1997-11-111-0/+3
* Replace global IPC with function argument cia or current instructionAndrew Cagney1997-11-061-2/+0
* IGEN likes to cache the current instruction address (CIA). Change theAndrew Cagney1997-11-061-49/+48
* Rewrite the MIPS simulator's memory model so that it uses the genericAndrew Cagney1997-11-051-9/+13
* Delete -l and -n options, didn't do anything.Andrew Cagney1997-11-051-1/+0
* Rewrite sim_monitor (implements read, write, open, et.al. systemAndrew Cagney1997-11-051-3/+4
* Correct r5900 sanitization.Gavin Romig-Koch1997-11-041-1/+1
* common/sim-bits.h: Document ROTn macro.Andrew Cagney1997-10-291-0/+3
* Add function to fetch 32bit instructionsAndrew Cagney1997-10-241-23/+28
* Use SIM*_OVERFLOW_RESULT defined in sim-alu.hAndrew Cagney1997-10-211-2/+2
* Delete profile support from MIPS simulator, use sim/common/sim-profileAndrew Cagney1997-10-211-2/+0
* Make mips registers of type unsigned_word.Andrew Cagney1997-10-201-2/+3
* Move register definitions and macros out of interp.c and into sim-main.hAndrew Cagney1997-10-161-1/+318
* Move global MIPS simulator variables into sim_cpu struct.Andrew Cagney1997-10-141-38/+208
* o Add support for configuring wordsize, fp hardware and targetAndrew Cagney1997-10-141-0/+221