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* Index: sim/frv/ChangeLogAndrew Cagney2003-10-311-1/+1
* Index: common/ChangeLogAndrew Cagney2002-11-141-0/+3
* 2002-05-28 Elena Zannoni <ezannoni@redhat.com>Elena Zannoni2002-05-281-4/+4
* Report SIGBUS and halt simulation when ld/st detect a misaligned address.Andrew Cagney2000-02-091-32/+44
* import gdb-2000-01-05 snapshotJason Molenda2000-01-061-26/+183
* import gdb-1999-12-06 snapshotJason Molenda1999-12-071-0/+22
* import gdb-1999-11-16 snapshotJason Molenda1999-11-171-8/+20
* import gdb-1999-11-01 snapshotJason Molenda1999-11-021-2/+2
* import gdb-1999-09-21Jason Molenda1999-09-221-7/+1
* import gdb-1999-09-13 snapshotJason Molenda1999-09-131-0/+175
* import gdb-1999-09-08 snapshotStan Shebs1999-09-091-2/+2
* import gdb-19990422 snapshotStan Shebs1999-04-261-2/+6
* Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1999-04-161-0/+3252
* Initial creation of sourceware repositoryStan Shebs1999-04-161-3252/+0
* 1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)Jason Molenda1999-01-271-868/+1032
* Implement separate user (SPU) and interrupt (SPI) stack pointers.Andrew Cagney1998-02-131-0/+2
* Don't abort() when system call is unknown.Andrew Cagney1998-02-111-1/+1
* Ensure zero-hardwired bits in DPSW remain zero.Andrew Cagney1998-02-111-3/+35
* First round of d10v ABI changesMichael Meissner1998-01-231-68/+68
* For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: SteppingAndrew Cagney1997-12-081-77/+79
* Add DM (bit 4) to PSW. See 7-1 for more info.Andrew Cagney1997-12-041-0/+2
* * d10v_sim.h (SEXT56): Define.Andrew Cagney1997-12-031-6/+10
* For "msbu", subtract unsigned product from ACC,Andrew Cagney1997-12-021-4/+8
* For "mulxu", store unsigned product in ACC.Andrew Cagney1997-12-021-3/+6
* For MACU add unsigned multiply to accumulator.Andrew Cagney1997-12-021-4/+8
* For sub2w, compute carry according to negated addition rules.Andrew Cagney1997-12-021-2/+3
* Rework sim/common/sim-alu.h to differentiate between direcctAndrew Cagney1997-12-011-11/+16
* * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and moveFred Fish1997-10-131-8/+8
* * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.Fred Fish1997-10-111-15/+3
* Cleanups to compile under FreeBSDAndrew Cagney1997-04-171-40/+24
* Fix problems in setting the carry bitMichael Meissner1997-03-131-31/+22
* Fix os_printf_filtered; Flush stdout after calling printf_filteredMichael Meissner1997-03-131-24/+58
* Fix -t option to work with memory mapping; Print PC in some error messagesMichael Meissner1996-10-301-22/+1
* Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1996-10-291-16/+54
* Fix tracing of accumulatorsMichael Meissner1996-10-161-2/+2
* Better error messages when a program stops due to signal; support d10v getpid...Michael Meissner1996-10-151-0/+145
* Fix ld2w r2,@r2 so that r3 loads the proper valueMichael Meissner1996-10-131-13/+93
* Fix tracing for st2wMichael Meissner1996-09-251-12/+41
* Make sure cmp{,eq,u}i use correct castsMichael Meissner1996-09-201-5/+5
* Fix tracing infoMichael Meissner1996-09-191-1/+1
* Make sure there is a trailing space after the instructionMichael Meissner1996-09-191-2/+2
* Provide macros that can be overriden for the width of the PC & line number fi...Michael Meissner1996-09-191-6/+21
* Rename sim_bfd -> exec_bfd for gdb compatibilityMichael Meissner1996-09-181-6/+6
* Make exit/stop return correct exit value; Add line number tracing.Michael Meissner1996-09-181-19/+94
* For unknown traps, print contents of registers and continue executionMichael Meissner1996-09-141-0/+31
* * simops.c (OP_5F00): Fix problems with system calls.Mark Alexander1996-09-121-40/+17
* Correct trap tracing informationMichael Meissner1996-09-121-1/+1
* Addi needs to set the carryMichael Meissner1996-09-091-0/+5
* Fix ld2w tracingMichael Meissner1996-09-091-1/+1
* Correct tracing of cpfgMichael Meissner1996-09-091-2/+6
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