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path: root/sim/common/sim-core.c
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* * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoidFelix Lee1997-09-101-1/+1
* Redo watchpoint code so that it target can specify interrupt names.Andrew Cagney1997-09-051-3/+7
* Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue.Andrew Cagney1997-09-051-1/+1
* o Add modulo argument to sim_core_attachAndrew Cagney1997-09-041-125/+224
* Stanify error reporting memory overlaps.Andrew Cagney1997-09-031-8/+23
* Passify GCC. Convert 0x0LL to something more portable in the FP code.Andrew Cagney1997-08-301-55/+199
* Preliminary suport for xor-endian suport in core module.Andrew Cagney1997-05-231-19/+58
* Watchpoint interface.Andrew Cagney1997-05-211-15/+49
* c80 simulator fixes.Andrew Cagney1997-05-121-1/+1
* Start of implementation of a distributed (between processors)Andrew Cagney1997-05-051-31/+52
* Update devo version of m32r sim to build with recent sim/common changes.Andrew Cagney1997-05-021-8/+24
* * Makefile.in (sim-options_h): Define.David Edelsohn1997-05-011-57/+83
* Add a number of per-simulator options: hostendian, endian, inline, warnings.Andrew Cagney1997-03-141-0/+375