summaryrefslogtreecommitdiff
path: root/opcodes
Commit message (Collapse)AuthorAgeFilesLines
* 2002-06-18 Dave Brolley <brolley@redhat.com>Dave Brolley2002-06-1814-2/+17242
| | | | | | | | | | | | | | | | | | | * po/POTFILES.in: Add frv-*.[ch]. * disassemble.c (ARCH_frv): New macro. (disassembler): Handle bfd_arch_frv. * configure.in: Support frv_bfd_arch. * Makefile.am (HFILES): Add frv-*.h. (CFILES): Add frv-*.c (ALL_MACHINES): Add frv-*.lo. (CLEANFILES): Add stamp-frv. (FRV_DEPS): New variable. (stamp-frv): New target. (frv-asm.lo): New target. (frv-desc.lo): New target. (frv-dis.lo): New target. (frv-ibld.lo): New target. (frv-opc.lo): New target. (frv-*.[ch]): New files.
* * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.Ben Elliston2002-06-183-2/+7
| | | | * Makefile.in: Regenerate.
* * a29k-dis.c: Replace CONST with const.Alan Modra2002-06-086-15/+24
| | | | | | | * h8300-dis.c: Likewise. * m68k-dis.c: Likewise. * or32-dis.c: Likewise. * sparc-dis.c: Likewise.
* bfd:Jason Thorpe2002-06-043-66/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
* 2002-05-31 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou2002-05-312-8/+13
| | | | | * mips-opc.c: Clean up a few whitespace issues, and sort a few entries understanding that 'x' follows 'w' in the alphabet.
* [ opcodes/ChangeLog ]Chris Demetriou2002-05-312-46/+54
| | | | | | | | | | | | | | 2002-05-31 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-opc.c: Add support for SB-1 MDMX subset and extensions. [ gas/testsuite/ChangeLog ] 2002-05-31 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/sb1-ext-mdmx.s: New file. * gas/mips/sb1-ext-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.
* * Makefile.am: Run "make dep-am".Alan Modra2002-05-314-5/+10
| | | | | * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
* [ gas/ChangeLog ]Chris Demetriou2002-05-313-8/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
* Fix for invalid conflict warning.Tom Rix2002-05-302-2/+7
|
* Add DLX targetNick Clifton2002-05-287-1/+573
|
* * Makefile.am (sh-dis.lo): Don't put make commands in deps.Alan Modra2002-05-255-8/+19
| | | | | | * Makefile.in: Regenerate. * arc-dis.c: Use #include "" instead of <> for local header files. * m68k-dis.c: Likewise.
* Fix handling of BLX instruction to conform to Operations definition in theNick Clifton2002-05-231-23/+23
| | | | ARM ARM.
* * Makefile.am (sh-dis.lo): Compile with @archdefs@.Joern Rennecke2002-05-223-2/+7
| | | | * Makefile.in: regenerate.
* Avoid dereferencing null pointer in:Joern Rennecke2002-05-222-2/+3
| | | | | * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4 for disassembly.
* * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4Joern Rennecke2002-05-222-0/+10
| | | | for disassembly.
* ? gas/testsuite/gas/mips/rol64.dThiemo Seufer2002-05-212-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ? gas/testsuite/gas/mips/rol64.s Index: gas/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/ChangeLog,v retrieving revision 1.1334 diff -u -p -r1.1334 ChangeLog --- gas/ChangeLog 21 May 2002 20:01:51 -0000 1.1334 +++ gas/ChangeLog 21 May 2002 23:32:51 -0000 @@ -1,3 +1,8 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.c (macro2): Add 64 bit drol, dror macros. + Optimize the rotate by zero case. + 2002-05-21 Nick Clifton <nickc@cambridge.redhat.com> * configure.in: Remove accidental enabling of bfd_gas=yes for Index: gas/config/tc-mips.c =================================================================== RCS file: /cvs/src/src/gas/config/tc-mips.c,v retrieving revision 1.123 diff -u -p -r1.123 tc-mips.c --- gas/config/tc-mips.c 14 May 2002 23:35:59 -0000 1.123 +++ gas/config/tc-mips.c 21 May 2002 23:32:52 -0000 @@ -6686,6 +6686,17 @@ macro2 (ip) --mips_opts.noreorder; break; + case M_DROL: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + break; + case M_ROL: macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu", "d,v,t", AT, 0, treg); @@ -6697,15 +6708,55 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROL_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + l = (rot < 0x20) ? "dsll" : "dsll32"; + r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROL_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + + case M_DROR: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); break; case M_ROR: @@ -6719,15 +6770,44 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROR_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + r = (rot < 0x20) ? "dsrl" : "dsrl32"; + l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROR_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } break; case M_S_DOB: Index: gas/testsuite/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v retrieving revision 1.315 diff -u -p -r1.315 ChangeLog --- gas/testsuite/ChangeLog 20 May 2002 17:05:34 -0000 1.315 +++ gas/testsuite/ChangeLog 21 May 2002 23:32:54 -0000 @@ -1,3 +1,9 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * gas/mips/rol64.s: New file, test of drol, dror macros. + * gas/mips/rol64.d: Likewise. + * gas/mips/mips.exp: Add new test. + 2002-05-20 Nick Clifton <nickc@cambridge.redhat.com> * gas/arm/arm.exp: Replace deprecated command line switches Index: gas/testsuite/gas/mips/mips.exp =================================================================== RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v retrieving revision 1.32 diff -u -p -r1.32 mips.exp --- gas/testsuite/gas/mips/mips.exp 4 Apr 2002 08:23:30 -0000 1.32 +++ gas/testsuite/gas/mips/mips.exp 21 May 2002 23:32:54 -0000 @@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then { run_dump_test "mul" } run_dump_test "rol" + run_dump_test "rol64" if !$aout { run_dump_test "sb" } run_dump_test "trunc" if !$aout { run_dump_test "ulh" } Index: include/opcode/ChangeLog =================================================================== RCS file: /cvs/src/src/include/opcode/ChangeLog,v retrieving revision 1.167 diff -u -p -r1.167 ChangeLog --- include/opcode/ChangeLog 17 May 2002 19:01:03 -0000 1.167 +++ include/opcode/ChangeLog 21 May 2002 23:32:57 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases. + 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com> * h8300.h: Corrected defs of all control regs Index: include/opcode/mips.h =================================================================== RCS file: /cvs/src/src/include/opcode/mips.h,v retrieving revision 1.24 diff -u -p -r1.24 mips.h --- include/opcode/mips.h 16 Mar 2002 03:09:18 -0000 1.24 +++ include/opcode/mips.h 21 May 2002 23:32:57 -0000 @@ -526,9 +526,13 @@ enum M_REM_3I, M_REMU_3, M_REMU_3I, + M_DROL, M_ROL, + M_DROL_I, M_ROL_I, + M_DROR, M_ROR, + M_DROR_I, M_ROR_I, M_S_DA, M_S_DOB, Index: opcodes/ChangeLog =================================================================== RCS file: /cvs/src/src/opcodes/ChangeLog,v retrieving revision 1.447 diff -u -p -r1.447 ChangeLog --- opcodes/ChangeLog 17 May 2002 14:36:45 -0000 1.447 +++ opcodes/ChangeLog 21 May 2002 23:33:00 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros. + Fri May 17 14:26:44 2002 J"orn Rennecke <joern.rennecke@superh.com> * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh. Index: opcodes/mips-opc.c =================================================================== RCS file: /cvs/src/src/opcodes/mips-opc.c,v retrieving revision 1.32 diff -u -p -r1.32 mips-opc.c --- opcodes/mips-opc.c 17 Mar 2002 02:42:25 -0000 1.32 +++ opcodes/mips-opc.c 21 May 2002 23:33:00 -0000 @@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 }, {"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 }, {"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 }, +{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 }, +{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 }, +{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 }, +{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 }, {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
* print_insn_sh cleanup:Joern Rennecke2002-05-174-80/+38
| | | | | | | | | | | | | | | | | | | | | | | | include: * dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype. gdb: * sh-tdep.c (gdb_print_insn_sh64): Delete. (gdb_print_insn_sh): Just set info->endian and use print_insn_sh. (sh_gdbarch_init): Always use gdb_print_insn_sh. opcodes: * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh. * sh-dis.c (LITTLE_BIT): Delete. (print_insn_sh, print_insn_shl): Deleted. (print_insn_shx): Renamed to (print_insn_sh). No longer static. Handle SHmedia instructions. Use info->endian to determine endianness. * sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete. (print_insn_sh64x): No longer static. Renamed to (print_insn_sh64). Removed pfun_compact and endian arguments. If we got an uneven address to indicate SHmedia, adjust it. Return -2 for SHcompact instructions. sim/sh64: * sim-if.c (sh64_disassemble_insn): Use print_insn_sh instead of print_insn_shl.
* * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.Alan Modra2002-05-177-220/+332
| | | | | | | | | | | | | | | * configure.in: Invoke AM_INSTALL_LIBBFD. * Makefile.am (install-data-local): Move to.. (install_libopcodes): .. New target. (uninstall_libopcodes): Likewise. (install-bfdlibLTLIBRARIES): Likewise. (uninstall-bfdlibLTLIBRARIES): Likewise. (bfdlibdir): New. (bfdincludedir): New. (lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES. * aclocal.m4: Regenerate. * configure: Regenerate. * Makefile.in: Regenerate.
* Regernate cgen built files.Nick Clifton2002-05-1513-20/+283
|
* * mips-dis.c (is_newabi): EABI is not a NewABI.Thiemo Seufer2002-05-142-4/+6
|
* * configure.in (shle-*-*elf*): Include sh64 support.Jason Thorpe2002-05-133-66/+60
| | | | * configure: Regenerate.
* * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.Jason Thorpe2002-05-092-8/+39
| | | | (print_insn_mode): Print some basic info about floating point values.
* * ppc-opc.c: Add "tlbiel" for POWER4.Alan Modra2002-05-092-0/+6
|
* [ cgen/ChangeLog ]Graydon Hoare2002-05-082-3/+37
| | | | | | | | | | | | | 2002-05-01 Graydon Hoare <graydon@redhat.com> * desc-cpu.scm (@arch@_cgen_cpu_close): Fix memory leaks. [ opcodes/ChangeLog ] 2002-05-07 Graydon Hoare <graydon@redhat.com> * cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather than just most-recently-opened.
* * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke.Alan Modra2002-05-012-0/+6
|
* The patch contains mostly fixes for the disassembler. It also fixesNick Clifton2002-04-254-139/+180
| | | | | | a crash of the assembler with some malformed source input. Long segmented addresses are now correctly relocated. Finally it updates my email address in the MAINTAINERS file.
* Add Indonesian translationNick Clifton2002-04-244-2/+403
|
* * gas/ppc/altivec.d: Fix dssall test.Matthew Green2002-04-172-1/+5
| | | | | | | | | | * gas/ppc/altivec.s: Likewise. * gas/ppc/altivec_xcoff.d: Likewise. * gas/ppc/altivec_xcoff.s: Likewise. * gas/ppc/altivec_xcoff64.d: Likewise. * gas/ppc/altivec_xcoff64.s: Likewise. * ppc-opc.c (powerpc_opcode): Fix dssall operand list.
* fix a typo in my nameMatthew Green2002-04-071-1/+1
|
* * dep-in.sed: Cope with absolute paths.Alan Modra2002-04-046-32/+57
| | | | | | | | * Makefile.am (dep.sed): Subst TOPDIR. Run "make dep-am". * Makefile.in: Regenerate. * ppc-opc.c: Whitespace. * s390-dis.c: Fix copyright date.
* * ppc-opc.c (vmaddfp): Fix operand order.Matthew Green2002-03-232-1/+5
|
* * Makefile.am: Run "make dep-am".Alan Modra2002-03-213-3/+8
| | | | * Makefile.in: Regenerate.
* * ppc-opc.c: Add optional field to mtmsrd.Alan Modra2002-03-212-1/+13
| | | | (MTMSRD_L, XRLARB_MASK): Define.
* * i386-dis.c (prefix_name): Fix handling of 32bit address prefixJan Hubicka2002-03-182-13/+41
| | | | | | | | in 64bit mode. (print_insn) Likewise. (putop): Fix handling of 'E' (OP_E, OP_OFF): handle 32bit addressing mode in 64bit. (ptr_reg): Likewise.
* Updated French translationsNick Clifton2002-03-182-9/+13
|
* 2002-03-16 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-172-8/+19
| | | | | | | | * mips-opc.c (M3D): Tweak comment. (mips_builtin_op): Add comment indicating that opcodes of the same name must be placed together in the table, and sort the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt", "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
* Tidy up sh64 rulesNick Clifton2002-03-163-34/+31
|
* 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-162-1/+5
| | | | * mips-dis.c: Update copyright years.
* [ gas/ChangeLog ]Chris Demetriou2002-03-163-3/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mips3d" member. (mips_opts): Initialize "ase_mips3d" member. (file_ase_mips3d): New variable. (CPU_HAS_MIPS3D): New macro. (md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d based on command line options and configuration defaults. (macro_build, mips_ip): Accept MIPS-3D instructions if mips_opts.ase_mips3d is set. (OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option): Add support for "-mips3d" and "-no-mips3d" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mips3d" and ".set nomips3d". (mips_elf_final_processing): Add a comment indicating that a MIPS-3D ASE ELF header flag should be set, when one exists. * doc/as.texinfo: Document -mips3d and -no-mips3d options. * doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set nomips3d" directives. [ gas/testsuite/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mips3d.s: New file. * gas/mips/mips64-mips3d.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mips3d" test. [ include/opcode/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D instructions. (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks may be passed along with the ISA bitmask. [ opcodes/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that indicate that they should dissassemble all applicable MIPS-specified ASEs. * mips-opc.c: Add support for MIPS-3D instructions. (M3D): New definition. * mips-opc.c: Update copyright years.
* 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-162-6/+10
| | | | * mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
* 2002-03-15 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-152-4/+12
| | | | * mips-dis.c (is_newabi): Fix ABI decoding.
* 2002-03-14 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-152-4/+9
| | | | | * mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32 and bfd_mach_mipsisa64 cases to match the rest.
* Updated French translationsNick Clifton2002-03-132-77/+38
|
* * ppc-opc.c: Add optional `L' field to tlbie.Alan Modra2002-03-132-1/+9
| | | | (XRTLRA_MASK): Define.
* 2002-03-06 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-062-1/+10
| | | | | | | * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being present on I4. * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
* * pdp11-opc.c: Fix "mark" operand type. Fix operand typesAlan Modra2002-03-053-20/+118
| | | | | | | | for float opcodes that take float operands. Add alternate names (xxxD vs. xxxF) for float opcodes. * pdp11-dis.c (print_operand): Clean up formatting for mode 67. (print_foperand): New function to handle float opcode operands. (print_insn_pdp11): Use print_foperand to disassemble float ops.
* Update translation files.Nick Clifton2002-02-272-16/+18
|
* Export dis-asm.h as part of an installNick Clifton2002-02-263-6/+22
|
* Import new Spanish and German translationsNick Clifton2002-02-264-2/+401
|
* * ppc-dis.c (powerpc_dialect): Handle power4 option.Alan Modra2002-02-253-314/+334
| | | | | | | | | | | | | * ppc-opc.c (insert_bdm): Correct description of "at" branch hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour. (extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise. (BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc. (BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise. (PPCCOM32, PPCCOM64): Delete. (NOPOWER4, POWER4): Define. (powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4, and PPCCOM4 with POWER4 so that "at" style branch hint opcodes are enabled for power4 rather than ppc64.
View Lorry Controller Status