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* X86: Remove pcommit instructionH.J. Lu2016-10-217-5391/+5365
* Check invalid mask registersH.J. Lu2016-10-202-17/+43
* Check addr32flag instead of sizeflag for rip/eipH.J. Lu2016-10-182-2/+8
* Remove the remaining SSE5 supportH.J. Lu2016-10-182-1/+6
* AArch64/opcodes: Correct an `index' global shadowing errorMaciej W. Rozycki2016-10-182-4/+9
* Removed pseudo invalid instructions opcodes.Cupertino Miranda2016-10-172-93/+4
* [ARC] Disassembler: fix LIMM detection for short instructions.Claudiu Zissulescu2016-10-142-2/+8
* [AArch64] PR target/20666, fix wrong encoding of new introduced BFC pseudoJiong Wang2016-10-112-1/+6
* [AArch64] PR target/20667, fix disassembler for the "special" optional SYS_Rt...Jiong Wang2016-10-072-4/+14
* bfd_merge_private_bfd_data tidyAlan Modra2016-10-072-1/+4
* -Wimplicit-fallthrough warning fixesAlan Modra2016-10-0613-4/+47
* -Wimplicit-fallthrough error fixesAlan Modra2016-10-064-99/+108
* Don't use boolean OR in arithmetic expressionsAlan Modra2016-10-063-2/+7
* Don't assign alt twiceH.J. Lu2016-09-302-1/+5
* [AArch64] PR target/20553, fix opcode mask for SIMD multiply by elementJiong Wang2016-09-302-4/+9
* Disallow 3-operand cmp[l][i] for ppc64Alan Modra2016-09-292-73/+39
* When building target binaries, ensure that the warning flags selected for the...Vlad Zakharov2016-09-263-6/+56
* [ARC] ISA alignment.Claudiu Zissulescu2016-09-264-35/+67
* [AArch64] Print spaces after commas in addressesRichard Sandiford2016-09-212-8/+14
* [AArch64] Use "must" rather than "should" in error messagesRichard Sandiford2016-09-212-3/+8
* [AArch64] Add SVE condition codesRichard Sandiford2016-09-213-20/+72
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-218-116/+9454
* [AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford2016-09-215-0/+217
* [AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford2016-09-217-20/+75
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-2111-50/+239
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-2111-100/+647
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-2110-38/+290
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-2111-41/+739
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-2111-17/+126
* [AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford2016-09-217-11/+127
* [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford2016-09-212-0/+13
* [AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford2016-09-2111-1/+291
* [AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford2016-09-213-16/+41
* [AArch64][SVE 19/32] Refactor address-printing codeRichard Sandiford2016-09-212-36/+65
* [AArch64][SVE 18/32] Tidy definition of aarch64-opc.c:int_regRichard Sandiford2016-09-212-18/+17
* [AArch64][SVE 17/32] Add a prefix parameter to print_register_listRichard Sandiford2016-09-212-13/+21
* [AArch64][SVE 16/32] Use specific insert/extract methods for fpimmRichard Sandiford2016-09-218-6/+40
* [AArch64][SVE 15/32] Add {insert,extract}_all_fields helpersRichard Sandiford2016-09-213-14/+50
* [AArch64][SVE 14/32] Make aarch64_logical_immediate_p take an element sizeRichard Sandiford2016-09-213-29/+39
* [AArch64][SVE 13/32] Add an F_STRICT flagRichard Sandiford2016-09-212-1/+14
* [AArch64][SVE 02/32] Avoid hard-coded limit in indented_printRichard Sandiford2016-09-212-5/+5
* [ARC] Disassemble correctly extension instructions.Claudiu Zissulescu2016-09-162-3/+7
* Modify POWER9 support to match final ISA 3.0 documentation.Peter Bergner2016-09-142-22/+23
* Stop the ARC disassembler from seg-faulting if initialised without a BFD pres...Anton Kolesov2016-09-142-3/+12
* S/390: Add alternate processor names.Andreas Krebbel2016-09-122-9/+21
* S/390: Fix kmctr instruction type.Patrick Steuer2016-09-122-1/+5
* X86: Allow additional ISAs for IAMCU in assemblerH.J. Lu2016-09-073-9/+5
* Fixed issue with NULL pointer access on header var.Cupertino Miranda2016-08-302-1/+8
* opcodes, gas: fix mnemonic of sparc camellia_flJose E. Marchesi2016-08-262-1/+6
* Add missing ARMv8-M special registersThomas Preud'homme2016-08-262-14/+29
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