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path: root/opcodes/i386-dis.c
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* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* x86: don't omit disambiguating suffixes from "fi*"Jan Beulich2017-11-241-12/+12
* x86: fix AVX-512 16-bit addressingJan Beulich2017-11-231-0/+2
* x86: correct UDnJan Beulich2017-11-231-4/+4
* x86: ignore high register select bit(s) in 32- and 16-bit modesJan Beulich2017-11-161-28/+36
* x86: use correct register namesJan Beulich2017-11-151-3/+3
* x86: drop VEXI4_Fixup()Jan Beulich2017-11-151-50/+37
* x86: add disassembler support for XOP VPCOM* pseudo-opsJan Beulich2017-11-141-8/+62
* Enable Intel AVX512_BITALG instructions.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel AVX512_VNNI instructions.Igor Tsimbalist2017-10-231-0/+2
* Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist2017-10-231-12/+2
* Enable Intel VAES instructions.Igor Tsimbalist2017-10-231-48/+8
* Enable Intel GFNI instructions.Igor Tsimbalist2017-10-231-8/+78
* Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist2017-10-231-2/+32
* x86: Remove restriction on NOTRACK prefix positionH.J. Lu2017-09-091-16/+2
* Fix spelling typos.Yuri Chornovian2017-07-181-1/+1
* X86: Disassemble primary opcode map's group 2 ModRM.reg == 6 aliases correctlyBorislav Petkov2017-07-051-6/+6
* x86: CET v2.0: Update incssp and setssbsyH.J. Lu2017-06-211-11/+12
* x86: CET v2.0: Rename savessp to saveprevsspH.J. Lu2017-06-211-1/+1
* x86: CET v2.0: Update NOTRACK prefixH.J. Lu2017-06-211-8/+6
* i386-dis: Check valid bnd registerH.J. Lu2017-06-151-0/+10
* Move print_insn_XXX to an opcodes internal headerYao Qi2017-05-241-1/+1
* x86: Add NOTRACK prefix supportH.J. Lu2017-05-221-3/+41
* Add support for Intel CET instructionsH.J. Lu2017-03-061-10/+95
* x86: fix handling of 64-bit operand size VPCMPESTR{I,M}Jan Beulich2017-02-281-14/+26
* x86: also correctly support TEST opcode aliasesJan Beulich2017-02-241-2/+2
* x86: drop stray VEX opcode 82 referencesJan Beulich2017-02-231-4/+4
* Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist2017-01-121-0/+2
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* Fix abort in x86 disassembler.Nick Clifton2016-12-011-1/+2
* X86: Ignore REX_B bit for 32-bit XOP instructionsAmit Pawar2016-11-281-4/+8
* X86: Remove the .s suffix from EVEX vpextrwH.J. Lu2016-11-091-9/+1
* X86: Remove the THREE_BYTE_0F7A entryH.J. Lu2016-11-081-295/+2
* X86: Properly handle bad FPU opcodeH.J. Lu2016-11-071-18/+23
* X86: Reuse opcode 0x80 decoder for opcode 0x82H.J. Lu2016-11-031-58/+5
* X86: Decode opcode 0x82 as opcode 0x80 in 32-bit modeH.J. Lu2016-11-031-1/+61
* X86: Rename REG_82 to REG_83H.J. Lu2016-11-031-3/+3
* Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist2016-11-021-0/+2
* X86: Remove pcommit instructionH.J. Lu2016-10-211-9/+2
* Check invalid mask registersH.J. Lu2016-10-201-17/+34
* Check addr32flag instead of sizeflag for rip/eipH.J. Lu2016-10-181-2/+2
* Remove the remaining SSE5 supportH.J. Lu2016-10-181-1/+1
* -Wimplicit-fallthrough warning fixesAlan Modra2016-10-061-3/+7
* Don't assign alt twiceH.J. Lu2016-09-301-1/+0
* X86: Add ptwrite instructionH.J. Lu2016-08-241-1/+16
* Handle indirect branches for AMD64 and Intel64H.J. Lu2016-06-031-3/+29
* Enable Intel RDPID instruction.Alexander Fomin2016-05-101-1/+1
* Skip if size of bfd_vma is smaller than address sizeH.J. Lu2016-04-231-0/+7
* Add parentheses to prevent truncated addressesH.J. Lu2016-02-151-2/+2
* Copyright update for binutilsAlan Modra2016-01-011-1/+1