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path: root/opcodes/arm-dis.c
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* [BINUTILS, ARM] Add Armv8.5-A to select_arm_features and update macros.Sudakshina Das2018-11-061-5/+5
* Arm: Fix disassembler crashing on -b binary when thumb file and thumb not for...Tamar Christina2018-10-191-3/+8
* [Arm, 2/3] Add instruction SB for AArch32Sudakshina Das2018-10-051-0/+6
* Adds the speculation barrier instructions to the ARM assembler and disassembler.Sudakshina Das2018-07-111-6/+10
* GDB PR tdep/8282: MIPS: Wire in `set disassembler-options'Maciej W. Rozycki2018-07-021-5/+11
* [ARM] Update bfd's Tag_CPU_arch knowledgeThomas Preud'homme2018-07-021-21/+50
* opcodes error messagesAlan Modra2018-03-031-2/+5
* [ARM] Remove ARM_FEATURE_COPY macroThomas Preud'homme2018-02-271-2/+2
* [ARM] Fix bxns maskThomas Preud'homme2018-02-191-1/+1
* [Arm] Add CSDB instructionJames Greenhalgh2018-01-091-0/+6
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* Adds command line support for Armv8.4-A, via the new command line option -mar...Jiong Wang2017-11-081-0/+18
* [ARM] Don't warn on REG_SP when used in CRC32 instructionsJiong Wang2017-08-091-11/+6
* [Patch ARM] Support MVFR2 VFP Coprocessor register for ARMv8-ARamana Radhakrishnan2017-07-041-0/+4
* [ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang2017-06-281-0/+6
* Don't use print_insn_XXX in GDBYao Qi2017-06-141-1/+1
* [opcodes][arm] Remove bogus entry added by accident in former patchAndre Vieira2017-06-141-2/+0
* Fix value in comment of disassembled ARM type A opcodes.Bernd Edlinger2017-05-021-2/+2
* -Wwrite-strings: Constify struct disassemble_info's disassembler_options fieldPedro Alves2017-04-051-2/+2
* GDB: Add support for the new set/show disassembler-options commands.Peter Bergner2017-02-281-95/+74
* [ARM] Fix the decoding of indexed element VCMLA instructionSzabolcs Nagy2017-01-181-4/+4
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* Fix compile time warning building arm-dis.cNick Clifton2016-12-161-2/+2
* [ARM] Add ARMv8.3 VCMLA and VCADD instructionsSzabolcs Nagy2016-12-051-0/+28
* [ARM] Add ARMv8.3 VJCVT instructionSzabolcs Nagy2016-12-051-0/+4
* -Wimplicit-fallthrough warning fixesAlan Modra2016-10-061-0/+1
* Add missing ARMv8-M special registersThomas Preud'homme2016-08-261-14/+23
* Fix typo in commentYao Qi2016-06-301-1/+1
* [ARM] Add command line option for RAS extension.Matthew Wahab2016-06-071-2/+2
* Use getters/setters to access ARM branch typeThomas Preud'homme2016-05-101-4/+5
* Add support for ARMv8-M security extensions instructionsThomas Preud'homme2016-05-101-1/+18
* [ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)Jiong Wang2016-04-051-6/+18
* [ARM] Support ARMv8.2 FP16 simd instructionsJiong Wang2016-03-161-23/+81
* [OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support.Renlin Li2016-02-241-4/+87
* [OPCODES][ARM]Fix mask for a few coprocessor opcodes.Renlin Li2016-02-241-8/+8
* [OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2,...Renlin Li2016-02-241-0/+23
* [PATCH[ARM]Check mapping symbol while backward searching for IT block.Renlin Li2016-01-251-3/+78
* [ARM] Support ARMv8.2 RAS extension.Matthew Wahab2016-01-121-0/+8
* Copyright update for binutilsAlan Modra2016-01-011-1/+1
* Add assembler support for ARMv8-M BaselineThomas Preud'homme2015-12-241-13/+15
* Add assembler support for ARMv8-M MainlineThomas Preud'homme2015-12-241-12/+18
* Fix ldah being disassembled as ldaexhAndre Vieira2015-12-021-1/+1
* opcodes: handle mach-o for thumb/arm disambiguation.Tristan Gingold2015-11-231-0/+8
* Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.Andre Vieira2015-08-131-3/+11
* Remove trailing spaces in opcodesH.J. Lu2015-08-121-57/+57
* Updates the ARM disassembler's output of floating point constants to include ...Alessandro Marzocchi2015-07-161-2/+33
* Fixes a compile time warnng about left shifting a negative value.Szabolcs Nagy2015-06-161-1/+1
* [ARM] Support for ARMv8.1 Adv.SIMD extensionMatthew Wahab2015-06-021-0/+19
* [ARM] Add support for ARMv8.1 PAN extensionMatthew Wahab2015-06-021-0/+5
* [ARM] Rework CPU feature selection in the disassemblerMatthew Wahab2015-06-021-29/+26