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* Properly check address mode for SIBH.J. Lu2013-03-271-0/+6
* PR binutils/15068Nick Clifton2013-03-271-0/+5
* * include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type inNick Clifton2013-03-201-1/+10
* Eliminate warning message.Michael Eager2013-03-121-0/+4
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-121-0/+4
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-121-0/+4
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-121-0/+4
* Add support for AArch32 CRC instruction in ARMv8.Kyrylo Tkachov2013-03-111-0/+6
* PR binutils/15241Nick Clifton2013-03-081-0/+4
* Add RegRex64 to rizH.J. Lu2013-03-021-0/+5
* include/opcode/Yufeng Zhang2013-02-281-0/+11
* * rl78-decode.opc (rl78_decode_opcode): Fix typo.Alan Modra2013-02-271-0/+5
* * rl78-decode.opc: Fix encoding of DIVWU insn.Nick Clifton2013-02-251-0/+5
* Implement Intel SMAP instructionsH.J. Lu2013-02-191-0/+16
* * metag-dis.c: Initialize outf->bytes_per_chunk to 4Nick Clifton2013-02-151-0/+6
* opcodes/Yufeng Zhang2013-02-141-0/+6
* Correct ChangeLog dates.Maciej W. Rozycki2013-02-131-1/+1
* opcodes/Maciej W. Rozycki2013-02-131-0/+5
* 2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw2013-02-111-0/+4
* gas/Richard Sandiford2013-02-091-0/+6
* 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2013-02-061-0/+15
* * po/POTFILES.in: Regenerate.Alan Modra2013-02-041-0/+6
* include/opcode/Yufeng Zhang2013-01-301-0/+15
* Add support for V850E3V5 architectureNick Clifton2013-01-241-1/+6
* include/opcode/Yufeng Zhang2013-01-171-0/+13
* Add OPERAND_TYPE_IMM32_64H.J. Lu2013-01-161-0/+7
* * config/tc-v850.c (md_assemble): Allow signed values forNick Clifton2013-01-151-0/+6
* * metag-dis.c (REG_WIDTH): Increase to 64.Nick Clifton2013-01-141-0/+4
* include/opcode/Peter Bergner2013-01-111-0/+11
* * common.h: Fix case of "Meta".Nick Clifton2013-01-101-0/+9
* (make_instruction): Rename to cr16_make_instruction.Nick Clifton2013-01-071-0/+5
* * archures.c: Add support for MIPS r5900Nick Clifton2013-01-041-0/+20
* opcodes/Yufeng Zhang2013-01-041-2/+11
* * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,Nick Clifton2013-01-041-0/+5
* Update copyright year to 2013H.J. Lu2013-01-021-0/+4
* opcodes/ChangeLogNick Clifton2013-01-021-1052/+7
* Add copyright noticesNick Clifton2012-12-171-0/+13
* PR binutils/14950Alan Modra2012-12-131-0/+6
* Add copyright noticesNick Clifton2012-12-101-0/+6
* 2012-11-30 Oleg Raikhman <oleg@adapteva.com>Joern Rennecke2012-11-301-0/+5
* opcodes/Roland McGrath2012-11-291-1/+5
* opcodes/Changelog:Michael Eager2012-11-291-0/+6
* include/opcode/Alan Modra2012-11-231-0/+8
* Add swap byte (swapb) and swap halfword (swaph) opcodes.Michael Eager2012-11-211-0/+5
* Add stack high register and stack low register for MicroBlazeMichael Eager2012-11-211-0/+5
* Fix opcode for 64-bit jecxzH.J. Lu2012-11-201-0/+7
* 2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2012-11-201-0/+4
* opcodes/Michael Eager2012-11-141-0/+11
* Add clz opcode.Michael Eager2012-11-141-0/+5
* Add the endian reversing versions of load/store instructions;Michael Eager2012-11-141-0/+7
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