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* Regenerate tree using Autoconf 2.64 and Automake 1.11.Ralf Wildenhues2009-08-225-7423/+5977
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | config/: * override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64. /: * configure: Regenerate. etc/: * configure: Regenerate. sim/common/: * config.in: Regenerate. * configure: Likewise. sim/iq2000/: * config.in: Regenerate. * configure: Likewise. sim/d10v/: * config.in: Regenerate. * configure: Likewise. sim/igen/: * config.in: Regenerate. * configure: Likewise. sim/m32r/: * config.in: Regenerate. * configure: Likewise. sim/frv/: * config.in: Regenerate. * configure: Likewise. sim/: * avr/config.in: Regenerate. * avr/configure: Likewise. * configure: Likewise. * cris/config.in: Likewise. * cris/configure: Likewise. sim/h8300/: * config.in: Regenerate. * configure: Likewise. sim/mn10300/: * config.in: Regenerate. * configure: Likewise. sim/ppc/: * config.in: Regenerate. * configure: Likewise. sim/erc32/: * config.in: Regenerate. * configure: Likewise. sim/arm/: * config.in: Regenerate. * configure: Likewise. sim/m68hc11/: * config.in: Regenerate. * configure: Likewise. sim/lm32/: * config.in: Regenerate. * configure: Likewise. sim/sh64/: * config.in: Regenerate. * configure: Likewise. sim/v850/: * config.in: Regenerate. * configure: Likewise. sim/cr16/: * config.in: Regenerate. * configure: Likewise. sim/moxie/: * config.in: Regenerate. * configure: Likewise. sim/m32c/: * config.in: Regenerate. * configure: Likewise. sim/mips/: * config.in: Regenerate. * configure: Likewise. sim/mcore/: * config.in: Regenerate. * configure: Likewise. sim/testsuite/d10v-elf/: * configure: Regenerate. sim/testsuite/: * configure: Regenerate. sim/testsuite/frv-elf/: * configure: Regenerate. sim/testsuite/m32r-elf/: * configure: Regenerate. sim/testsuite/mips64el-elf/: * configure: Regenerate. sim/sh/: * config.in: Regenerate. * configure: Likewise. gold/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * testsuite/Makefile.in: Likewise. gprof/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * configure: Likewise. * gconfig.in: Likewise. opcodes/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gas/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. ld/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gdb/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. * gnulib/Makefile.in: Likewise. gdb/doc/: * configure: Regenerate. gdb/gdbserver/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. gdb/testsuite/: * configure: Regenerate. * gdb.hp/configure: Likewise. * gdb.hp/gdb.aCC/configure: Likewise. * gdb.hp/gdb.base-hp/configure: Likewise. * gdb.hp/gdb.compat/configure: Likewise. * gdb.hp/gdb.defects/configure: Likewise. * gdb.hp/gdb.objdbg/configure: Likewise. * gdb.stabs/configure: Likewise. binutils/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. bfd/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. bfd/doc/: * Makefile.in: Regenerate. readline/: * configure: Regenerate. readline/examples/rlfe/: * configure: Regenerate.
* 2S09-08-21 Daniel Gutson <dgutson@codesourcery.com>Daniel Gutson2009-08-215-2/+42
| | | | | | | | | | | | | | | ld/ * ld-arm/callweak.d: Opcodes updated. * ld-arm/callweak.s: Architecture specified. * ld-arm/callweak-2.d: New test case. * ld-arm/callweak-2.s: New file. bfd/ * elf32-arm.c (arch_has_thumb2_nop): New function. (arch_has_arm_nop): New function. (elf32_arm_final_link_relocate): NOP opcodes changed. SVS: ----------------------------------------------------------------------
* * scripttempl/elf.sc: Discard sections with .gnu.lto_ prefix.Nick Clifton2009-08-212-1/+5
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* * ld-elf/linkonce1.d: Accept "UNUSED" as part of the name of anNick Clifton2009-08-173-2/+8
| | | | | unused reloc. * ld-elf/linkonce2.d: Likewise.
* 2009-08-12 Tristan Gingold <gingold@adacore.com>Tristan Gingold2009-08-123-2/+41
| | | | | | * ld.h (fat_user_section_struct): Add map_symbol_def_count field. * ldlang.c (hash_entry_addr_cmp): New function. (print_all_symbols): Sort the symbols by address before printing them.
* bfd/Jan Kratochvil2009-08-102-0/+54
| | | | | | | | | | | | Fix go32 stub preservation by objcopy. * coff-stgo32.c (adjust_filehdr_in_post): Use bfd_malloc. (go32_stubbed_coff_bfd_copy_private_bfd_data): Optionally allocate OBFD go32stub. ld/testsuite/ Test go32 stub preservation by objcopy. * ld-i386/i386.exp (go32 stub, go32 stub patch the source) (go32 stub objcopy, go32 stub comparison after objcopy): New.
* bfd/Nathan Sidwell2009-08-105-0/+59
| | | | | | | | | | | | * elf32-ppc.c (shared_stub_entry, stub_entry): Use r12, not r11. (ppc_elf_relax_section): Use symbol index to distinguish relocatable stubs. ld/testsuite/ * ld-powerpc/relax.s: New. * ld-powerpc/relax.d: New. * ld-powerpc/relaxr.d: New. * ld-powerpc/powerpc.exp: Add new tests.
* PR 10474Alan Modra2009-08-1018-174/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * ldemul.c (after_allocation_default): Run lang_relax_sections. * ldlang.h (lang_relax_sections): Declare. * ldlang.c (relax_sections): Delete. (lang_relax_sections): New function. (lang_process): Don't relax directly from here. * emultempl/alphaelf.em (alpha_finish): Call finish_default. * emultempl/armelf.em (arm_elf_after_allocation): Delete. Move body.. (gld${EMULATION_NAME}_finish): ..to here. Move existing code.. (gld${EMULATION_NAME}_after_allocation): ..to here. New function. (LDEMUL_AFTER_ALLOCATION): Update. * emultempl/avrelf.em (avr_elf_finish, LDEMUL_FINISH): Delete. (avr_elf_after_allocation): New function. (LDEMUL_AFTER_ALLOCATION): Define. * emultempl/elf-generic.em (gld${EMULATION_NAME}_map_segments): Call lang_relax_sections. * emultempl/elf32.em (gld${EMULATION_NAME}_finish): Delete. Move.. (gld${EMULATION_NAME}_after_allocation): ..code to here. New function. (LDEMUL_AFTER_ALLOCATION, LDEMUL_FINISH): Update. * emultempl/genelf.em (gld${EMULATION_NAME}_finish): Delete. Move.. (gld${EMULATION_NAME}_after_allocation): ..code to here. New function. (LDEMUL_FINISH): Delete. (LDEMUL_AFTER_ALLOCATION): Define. * emultempl/hppaelf.em (gld${EMULATION_NAME}_finish): Delete. Move.. (gld${EMULATION_NAME}_after_allocation): ..to here. New function. (LDEMUL_FINISH): Delete. (LDEMUL_AFTER_ALLOCATION): Define. * emultempl/m68hc1xelf.em (m68hc11elf_finish): Delete. Move.. (m68hc11elf_after_allocation): ..to here. New function. (LDEMUL_FINISH): Delete. (LDEMUL_AFTER_ALLOCATION): Define. * emultempl/m68kelf.em (m68k_elf_after_allocation): Call gld${EMULATION_NAME}_after_allocation. * emultempl/mmix-elfnmmo.em (mmix_after_allocation): Call gld${EMULATION_NAME}_after_allocation. * emultempl/mmo.em (mmo_finish): Delete. Move body.. (gld${EMULATION_NAME}_after_allocation): ..to here. New function. (LDEMUL_FINISH): Define. * emultempl/ppc64elf.em (ppc_layout_sections_again): Set elf_gp. (gld${EMULATION_NAME}_finish): Move code sizing sections.. (gld${EMULATION_NAME}_after_allocation): ..to here. * emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_after_allocation): Call gld${EMULATION_NAME}_after_allocation. * emultempl/spuelf.em (gld${EMULATION_NAME}_finish): Delete bfd_elf_discard_info and map_segments call.
* Add support for Xilinx MicroBlaze processor.Nick Clifton2009-08-0610-18/+309
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
* bfd/Nathan Sidwell2009-08-065-0/+59
| | | | | | | | | | | * elf32-arm.c (elf32_arm_size_stubs): Call layout_sections_again at least once when fixing cortex-a8. ld/testsuite/ * ld-arm/arm-elf.exp: Add new test. * ld-arm/cortex-a8-fix-hdr.d: New. * ld-arm/cortex-a8-fix-hdr.s: New. * ld-arm/cortex-a8-fix-hdr.t: New.
* bfd/Trevor Smigiel2009-08-056-1/+76
| | | | | | | | | | | | | | | | | | | | | | * elf32-spu.h (spu_elf_params): Add member emit_fixups. (spu_elf_size_sections): Declare prototype. * elf32-spu.c (spu_link_hash_table): Add member sfixup. (FIXUP_RECORD_SIZE, FIXUP_GET, FIXUP_PUT): New macros. (spu_elf_emit_fixup): New function. (spu_elf_relocate_section): Emit fixup for each SPU_ADDR32. (spu_elf_size_sections): New function. ld/ * emulparams/elf32_spu.sh (OTHER_READONLY_SECTIONS): Add .fixup section and __fixup_start symbol. * emultempl/spuelf.em (params): Initialize emit_fixups member. (spu_before_allocation): Call spu_elf_size_sections. (OPTION_SPU_EMIT_FIXUPS): Define. (PARSE_AND_LIST_LONGOPTS): Add --emit-fixups. (PARSE_AND_LIST_ARGS_CASES): Handle --emit-fixups. * ld.texinfo (--emit-fixups): Document. ld/testsuite/ * ld-spu/fixup.d: New. * ld-spu/fixup.s: New.
* bfd/Nathan Sidwell2009-08-055-0/+79
| | | | | | | | | | | | | | | | | * elf32-arm.c (elf32_arm_stub_type): Add arm_stub_a8_veneer_lwm. (arm_build_one_stub): Build a8 veneers as a separate pass. (cortex_a8_erratum_scan): Add prev_num_a8_fixes and stub_changed_p parameters. Use them to check if we create a different a8 fixup than the previous pass. (elf32_arm_size_stubs): Move scope of stub_changed and prev_num_a8_fixes into main loop. (elf32_arm_build_stubs): Build a8 veneers in a second pass. ld/testsuite/ * ld-arm/cortex-a8-far-1.s: New. * ld-arm/cortex-a8-far-2.s: New. * ld-arm/cortex-a8-far.d: New. * ld-arm/arm-elf.exp: Add new test.
* PR 10474Alan Modra2009-08-042-3/+9
| | | | | * emultempl/ppc32elf.em (ppc_before_allocation): Test rawsize, not size, after lang_reset_memory_regions.
* 2009-08-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-08-027-0/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jakub Jelinek <jakub@redhat.com> PR ld/6443 * elf32-i386.c (elf_i386_tls_transition): Check executable instead of shared for TLS when building PIE. (elf_i386_check_relocs): Likewise. (elf_i386_allocate_dynrelocs): Likewise. (elf_i386_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_tls_transition): Check executable instead of shared for TLS when building PIE. (elf64_x86_64_check_relocs): Likewise. (elf64_x86_64_allocate_dynrelocs): Likewise. (elf64_x86_64_relocate_section): Likewise. ld/testsuite/ 2009-08-02 H.J. Lu <hongjiu.lu@intel.com> PR ld/6443 * ld-i386/i386.exp: Run tlspie1. * ld-x86-64/x86-64.exp: tlspie1. * ld-i386/tlspie1.d: New. * ld-i386/tlspie1.s: Likewise. * ld-x86-64/tlspie1.d: Likewise. * ld-x86-64/tlspie1.s: Likewise.
* * ld-mmix/x.s, ld-mmix/y.s, ld-mmix/zeroeh.ld,Hans-Peter Nilsson2009-07-316-9/+18
| | | | | ld-mmix/zeroehelf.d, ld-mmix/zeroehmmo.d: Use .gcc_except_table, not .eh_frame.
* 2009-07-30 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-07-302-3/+8
| | | | * ld-elf/shared.exp: Comment out dl3b.
* * ld-scripts/empty-address-3a.d, ld-scripts/empty-address-3b.d:Hans-Peter Nilsson2009-07-303-0/+7
| | | | Skip for mmix-knuth-mmixware.
* * emulparams/elf32ppc.sh (PLT): Don't include ".iplt".Alan Modra2009-07-295-10/+38
| | | | | | | * emulparams/elf_i386.sh (IREL_IN_PLT): Define. * emulparams/elf_x86_64.sh (IREL_IN_PLT): Define. * scripttempl/elf.sc: Create separate .iplt and .rela.iplt sections when !IREL_IN_PLT.
* * ld-scripts/default-script.s (text): Globalize.Hans-Peter Nilsson2009-07-296-4/+12
| | | | | | * ld-scripts/default-script1.d, ld-scripts/default-script2.d, ld-scripts/default-script3.d, ld-scripts/default-script4.d: Adjust accordingly.
* * scripttempl/mmo.sc: For relocateable links, set $OUTPUT_FORMAT toHans-Peter Nilsson2009-07-294-5/+25
| | | | | | | | | | | the new $RELOCATEABLE_OUTPUT_FORMAT, if set. (OUTPUT_FORMAT): Use the variable $OUTPUT_FORMAT. (ENTRY): Don't emit for relocateable links. (/DISCARD/): Don't discard .gnu.warning.* for relocateable links. * emulparams/mmo.sh (RELOCATEABLE_OUTPUT_FORMAT): Set, to elf64-mmix. * emulparams/elf64mmix.sh (OTHER_TEXT_SECTIONS): Empty, don't provide "Main" or set "_start.", for relocateable links.
* * (po/fi.po): Updated Finnish translation.Nick Clifton2009-07-272-550/+589
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* Add missing files.H.J. Lu2009-07-252-0/+71
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* bfd/H.J. Lu2009-07-259-7/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_architecture): Add bfd_arch_l1om. (bfd_l1om_arch): New. (bfd_archures_list): Add &bfd_l1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. * configure: Regenerated. * cpu-l1om.c: New. * elf64-x86-64.c (elf64_l1om_elf_object_p): New. (bfd_elf64_l1om_vec): Likewise. (bfd_elf64_l1om_freebsd_vec): Likewise. * Makefile.am (ALL_MACHINES): Add cpu-l1om.lo. (ALL_MACHINES_CFILES): Add cpu-l1om.c. * Makefile.in: Regenerated. * targets.c (bfd_elf64_l1om_vec): New. (bfd_elf64_l1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. binutils/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (guess_is_rela): Handle EM_L1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. gas/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add l1om. (check_cpu_arch_compatible): New. (set_cpu_arch): Use it. (i386_arch): New. (i386_mach): Return bfd_mach_l1om for Intel L1OM. (md_show_usage): Display l1om. (i386_target_format): Return ELF_TARGET_L1OM_FORMAT if cpu_arch_isa_flags.bitfield.cpul1om is set. * config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()). (i386_arch): New. (ELF_TARGET_L1OM_FORMAT): Likewise. * doc/c-i386.texi: Document l1om. gas/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/l1om.d: New. * gas/i386/l1om-inval.l: Likewise. * gas/i386/l1om-inval.s: Likewise. * gas/i386/i386.exp: Run l1om-inval and l1om. include/elf/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_L1OM): New. ld/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64 is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and eelf_l1om_fbsd.o (eelf_l1om.c): New. (eelf_l1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * emulparams/elf_l1om.sh: New. * emulparams/elf_l1om_fbsd.sh: Likewise. ld/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-l1om.d: New. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and protected3-l1om. opcodes/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_l1om_arch. * disassemble.c (disassembler): Likewise. * configure: Regenerated. * i386-dis.c (print_insn): Handle bfd_mach_l1om and bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. Add CPU_L1OM_FLAGS. (cpu_flags): Add CpuL1OM. (set_bitfield): Take an argument to set the value field. (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). (process_i386_opcode_modifier): Updated. (process_i386_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuL1OM): New. (CpuXsave): Updated. (i386_cpu_flags): Add cpul1om.
* include/elf/Trevor Smigiel2009-07-244-0/+185
| | | | | | | | | | | | | | | | | | | * spu.h (R_SPU_ADD_PIC): New. bfd/ * reloc.c (BFD_RELOC_SPU_ADD_PIC): Define. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-spu.c (elf_howto_table): Add entries SPU_ADD_PIC. (spu_elf_bfd_to_reloc_type): Handle SPU_ADD_PIC. (spu_elf_relocate_section): Patch instructions marked by SPU_ADD_PIC. gas/ * config/tc-spu.c (md_apply_fix): Handle SPU_ADD_PIC. * config/tc-spu.h (tc_fix_adjustable): Don't adjust for SPU_ADD_PIC. (TC_FORCE_RELOCATION): Emit relocs for SPU_ADD_PIC. ld/testsuite/ * ld-spu/pic.d: New. * ld-spu/pic.s: New. * ld-spu/picdef.s: New.
* bfd/H.J. Lu2009-07-234-1/+26
| | | | | | | | | | | | | | | | | | | 2009-07-23 H.J. Lu <hongjiu.lu@intel.com> PR ld/10434 * elf64-x86-64.c (elf64_x86_64_check_relocs): Check executable instead of shared for R_X86_64_TPOFF32. (elf64_x86_64_relocate_section): Likewise. ld/testsuite/ 2009-07-23 H.J. Lu <hongjiu.lu@intel.com> PR ld/10434 * ld-x86-64/tlsle1.d: New. * ld-x86-64/tlsle1.s: Likewise. * ld-x86-64/x86-64.exp: Run tlsle1.
* * config/obj-elf.c (obj_elf_type): Add code to support a type ofNick Clifton2009-07-232-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gnu_unique_object. * doc/as.texinfo: Document new feature of .type directive. * NEWS: Mention support for gnu_unique_object symbol type. * common.h (STB_GNU_UNIQUE): Define. * NEWS: Mention the linker's support for symbols with a binding of STB_GNU_UNIQUE. * gas/elf/type.s: Add unique global symbol definition. * gas/elf/type.e: Add expected readelf output for global unique symbol. * elfcpp.h (enum STB): Add STB_GNU_UNIQUE. * readelf.c (get_symbol_binding): For Linux targeted files return UNIQUE for symbols with the STB_GNU_UNIQUE binding. * doc/binutils.texi: Document the meaning of the 'u' symbol binding in the output of nm and objdump --syms. * elf-bfd.h (struct elf_link_hash_entry): Add unique_global field. * elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols with the BSF_GNU_UNIQUE flag bit set. * elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. * elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols with the STB_GNU_UNIQUE binding. (elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for symbols with the unique_global field set. (elf_link_output_extsym): Set unique_global field for symbols with the STB_GNU_UNIQUE binding. * syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit. (bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE symbols. (bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE symbols. * bfd-in2.h: Regenerate.
* 2009-07-22 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-07-232-3/+11
| | | | | | PR ld/10429 * ldlang.c (insert_os_after): Tie assignments to non-alloc output sections if there is no-input section.
* bfd/H.J. Lu2009-07-214-4/+42
| | | | | | | | | | | | | | | | | | | | 2009-07-21 H.J. Lu <hongjiu.lu@intel.com> PR ld/10426 * elflink.c (elf_link_add_object_symbols): Turn an IFUNC symbol from a DSO into a normal FUNC symbol. (elf_link_output_extsym): Turn an undefined IFUNC symbol into a normal FUNC symbol. ld/testsuite/ 2009-07-21 H.J. Lu <hongjiu.lu@intel.com> PR ld/10426 * ld-ifunc/ifunc.exp: Check test-1 and libtest-2.so. Updated. * ld-ifunc/test-1.c: New. * ld-ifunc/test-2.c: Likewise.
* * ld-mips-elf/pic-and-nonpic-3b.dd: Updated to use new PLTNick Clifton2009-07-173-8/+8
| | | | | | | | entries. * ld-mips-elf/pic-and-nonpic-5b.dd: Likewise. * ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise. * ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise. * ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* * elfxx-mips.c (LOAD_INTERLOCKS_P): New define.Nick Clifton2009-07-174-8/+12
| | | | | | | | | | | (_bfd_mips_elf_size_dynamic_sections): For CPUs without load interlocking, the last PLT entry needs a nop in the branch delay slot. (_bfd_mips_elf_finish_dynamic_symbol): For CPUs with load itnerlocking, output the last two PLT entries in reverse order. * ld-mips-elf/pic-and-nonpic-3b.dd, ld-mips-elf/pic-and-nonpic-5b.dd, ld-mips-elf/pic-and-nonpic-6-o32.dd: Updated to use new PLT entries.
* bfd/H.J. Lu2009-07-163-0/+26
| | | | | | | | | | | | | | | 2009-07-16 H.J. Lu <hongjiu.lu@intel.com> * elf32-i386.c (elf_i386_relocate_section): Don't get local STT_GNU_IFUNC symbol for relocatable link. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. ld/testsuite/ 2009-07-16 H.J. Lu <hongjiu.lu@intel.com> * ld-ifunc/ifunc-5r-local-i386.d: New. * ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
* gas/Nathan Sidwell2009-07-165-4/+14
| | | | | | | | | | | | | | | * config/tc-arm.c (md_apply_fix <BFD_RELOC_ARM_TARGET2>): Write the offset for REL targets here. gas/testsuite/ * gas/arm/target-reloc-1.s: New. * gas/arm/target-reloc-1.d: New. ld/testsuite/ * ld-arm/arm-target2.s: Add addend cases. * ld-arm/arm-target2-rel.d: Adjust. * ld-arm/arm-target2-abs.d: Adjust. * ld-arm/arm-target2-got-rel.d: Adjust.
* Fix a typo.H.J. Lu2009-07-131-1/+1
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* 2009-07-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-07-132-16/+25
| | | | | | * ld-ifunc/ifunc.exp: Don't use -shared/-static to build object files. Use ld_simple_link to build static non-ifunc-using executable. Re-enable static non-ifunc-using executable check.
* * ldlang.c (insert_os_after): Don't tie assignments to non-allocAlan Modra2009-07-112-5/+17
| | | | output sections.
* 2009-07-10 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-07-102-4/+10
| | | | | * ld-ifunc/ifunc.exp: Don't chck static non-ifunc-using executable.
* 2009-07-10 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2009-07-104-6/+12
| | | | | | * ld-ifunc/ifunc-1-local-x86.d: Updated. * ld-ifunc/ifunc-1-x86.d: Likewise. * ld-ifunc/ifunc-3a-x86.d: Likewise.
* bfd/H.J. Lu2009-07-106-7/+15
| | | | | | | | | | | | | | | | | | 2009-07-10 H.J. Lu <hongjiu.lu@intel.com> * elf.c (_bfd_elf_get_synthetic_symtab): Remove leading zeros when reporting addends. ld/testsuite/ 2009-07-10 H.J. Lu <hongjiu.lu@intel.com> * ld-ifunc/ifunc-1-local-x86.d: Updated. * ld-ifunc/ifunc-1-x86.d: Likewise.Likewise. * ld-ifunc/ifunc-2-local-x86-64.d: Likewise.Likewise. * ld-ifunc/ifunc-2-x86-64.d: Likewise. * ld-ifunc/ifunc-3a-x86.d: Likewise.Likewise.
* * emultempl/ppc32elf.em (ppc_before_allocation): Turn onAlan Modra2009-07-102-0/+38
| | | | linker relaxation if it might be necessary.
* STT_GNU_IFUNC support for PowerPC.Alan Modra2009-07-104-9/+40
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* * ld-selective/selective.exp: Remove check that $CC contains theAlan Modra2009-07-082-9/+12
| | | | string "gcc". Do -dumpversion for $CXX.
* * ld.texinfo: Fix typo.Nick Clifton2009-07-062-1/+5
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* 2009-07-03 Tristan Gingold <gingold@adacore.com>Tristan Gingold2009-07-033-2/+15
| | | | | * scripttempl/pep.sc: Put .eh_frame in its own section. * scripttempl/pe.sc: Ditto.
* PR 10288Nick Clifton2009-06-3030-130/+162
| | | | | | | | | | | * arm-dis.c (coprocessor): Print the LDC and STC versions of the LFM and SFM instructions as comments,. Improve consistency of formatting for instructions displayed as comments and decimal values displayed with their hexadecimal equivalents. Formatting tidy ups. Updated expected disassembler regexps.
* PR 10288Nick Clifton2009-06-2915-34/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | * arm-dis.c (enum opcode_sentinels): New: Used to mark the boundary between variaant and generic coprocessor instuctions. (coprocessor): Use it. Fix architecture version of MCRR and MRRC instructions. (arm_opcdes): Fix patterns for STRB and STRH instructions. (print_insn_coprocessor): Check architecture and extension masks. Print a hexadecimal version of any decimal constant that is outside of the range of -16 to +32. (print_arm_address): Add a return value of the offset used in the adress, if it is worth printing a hexadecimal version of it. (print_insn_neon): Print a hexadecimal version of any decimal constant that is outside of the range of -16 to +32. (print_insn_arm): Likewise. (print_insn_thumb16): Likewise. (print_insn_thumb32): Likewise. PR 10297 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description of an undefined instruction. (arm_opcodes): Use it. (thumb_opcod): Use it. (thumb32_opc): Use it. Update expected disassembly regrexps in GAS and LD testsuites.
* bfd/H.J. Lu2009-06-272-0/+106
| | | | | | | | | | | | | | | | | 2009-06-27 H.J. Lu <hongjiu.lu@intel.com> PR ld/10337 * elf.c (bfd_section_from_shdr): Don't change sh_link for SHT_REL/SHT_RELA sections on executable nor shared library. Treat SHT_REL/SHT_RELA sections with sh_link set to SHN_UNDEF as a normal section. ld/testsuite/ 2009-06-27 H.J. Lu <hongjiu.lu@intel.com> PR ld/10337 * ld-ifunc/binutils.exp: New.
* 2009-06-27 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2009-06-272-2/+2
| | | | | * scripttempl/pe.sc (.debug_pubtypes): Fixed syntax error. * scripttempl/pep.sc (.debug_pubtypes): Likewise.
* 2009-06-26 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2009-06-263-0/+15
| | | | | * scripttempl/pe.sc (.debug_pubtypes): Added section rule. * scripttempl/pep.sc: Likewise.
* 2009-06-25 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2009-06-257-5/+24
| | | | | | | | | | | * ld-pe/aligncomm-1.c (size_t): Add typedef. (main): Use it for casting pointer to scalar. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-scripts/empty-address.exp: Make sure that for x86_64-*-mingw* target imagebase is set to zero. * ld-scripts/weak.exp: Don't fail for x86_64-*-mingw* target.
* 2009-06-25 Tristan Gingold <gingold@adacore.com>Tristan Gingold2009-06-252-5/+13
| | | | | | | * ldlang.c (print_input_section): Add is_discarded parameter. Adjust prototype. (lang_map): Print the size of discarded sections. (print_statement): Adjust call to print_input_section.
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