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* [ARM] Improve indentation of ARM architecture declarationsThomas Preud'homme2018-11-132-254/+340
* [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das2018-11-122-0/+7
* [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das2018-11-122-0/+14
* [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das2018-11-122-0/+7
* [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-ASudakshina Das2018-11-122-0/+6
* Add support for new load commands added by Apple to the MACH-O file format.Roman Bolshakov2018-11-073-28/+55
* Add support for a couple of new Mach-O commands.Nick Clifton2018-11-062-1/+7
* [BINUTILS, ARM] Add Armv8.5-A to select_arm_features and update macros.Sudakshina Das2018-11-062-4/+9
* Support AT_HWCAP2 on FreeBSD.John Baldwin2018-10-262-0/+5
* S12Z: New 32 bit Reloc.John Darrington2018-10-231-1/+2
* [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRSSudakshina Das2018-10-092-1/+9
* [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registersSudakshina Das2018-10-092-1/+14
* [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das2018-10-092-1/+21
* [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructionsSudakshina Das2018-10-092-0/+6
* [PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instructionSudakshina Das2018-10-092-1/+8
* [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructionsSudakshina Das2018-10-092-1/+13
* [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-ASudakshina Das2018-10-092-1/+9
* [PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-ASudakshina Das2018-10-092-1/+14
* [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea...Sudakshina Das2018-10-092-0/+9
* Separate header PT_LOAD for -z separate-codeAlan Modra2018-10-082-0/+7
* [Arm, 3/3] Add Execution and Data Prediction instructions for AArch32Sudakshina Das2018-10-052-1/+8
* [Arm, 2/3] Add instruction SB for AArch32Sudakshina Das2018-10-052-1/+8
* [Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32Sudakshina Das2018-10-052-0/+10
* or1k: Add the l.adrp insn and supporting relocationsStafford Horne2018-10-052-0/+20
* or1k: Add relocations for high-signed and low-storesRichard Henderson2018-10-052-0/+13
* AArch64: Add SVE constraints verifier.Tamar Christina2018-10-032-2/+16
* AArch64: Refactor verifiers to make more general.Tamar Christina2018-10-032-1/+8
* AArch64: Refactor err_type.Tamar Christina2018-10-032-1/+16
* AArch64: Wire through instr_sequenceTamar Christina2018-10-032-2/+27
* AArch64: Mark sve instructions that require MOVPRFX constraintsTamar Christina2018-10-032-2/+22
* Make print_insn_s12z public.John Darrington2018-10-032-0/+5
* RISC-V: Add fence.tso instructionPalmer Dabbelt2018-10-022-0/+7
* [ARC] Entries to Changelog for previous commits.Cupertino Miranda2018-10-021-0/+4
* [ARC] Fixed issue with DTSOFF relocs.Cupertino Miranda2018-10-011-1/+1
* [ARC] Fixes TLS failures related to tls-align.Cupertino Miranda2018-10-011-1/+1
* ELF: Don't include zero size sections at start of PT_NOTE segmentH.J. Lu2018-09-212-4/+12
* Andes Technology has good news for you, we plan to update the nds32 port of b...Nick Clifton2018-09-204-43/+240
* Handle missing Solaris auxv entriesRainer Orth2018-09-202-3/+17
* Disable -Wformat-nonliteral in parts of printcmd.cSimon Marchi2018-09-052-0/+16
* PowerPC64 higher REL16 relocationsAlan Modra2018-08-312-5/+18
* RISC-V: Allow instruction require more than one extensionJim Wilson2018-08-302-2/+14
* [MIPS] Add Loongson 2K1000 proccessor support.Chenghua Xu2018-08-293-0/+6
* [MIPS] Add Loongson 3A2000/3A3000 proccessor support.Chenghua Xu2018-08-293-0/+8
* [MIPS] Add Loongson 3A1000 proccessor support.Chenghua Xu2018-08-293-9/+12
* [MIPS/GAS] Add Loongson EXT2 Instructions support.Chenghua Xu2018-08-293-1/+10
* [MIPS/GAS] Split Loongson EXT Instructions from loongson3a.Chenghua Xu2018-08-293-1/+10
* [MIPS/GAS] Split Loongson CAM Instructions from loongson3aChenghua Xu2018-08-293-1/+10
* x86: Update GNU_PROPERTY_X86_XXX macrosH.J. Lu2018-08-242-24/+147
* x86: Add GNU_PROPERTY_X86_UINT32_VALIDH.J. Lu2018-08-242-0/+7
* Fix changelog entriesAlan Modra2018-08-221-1/+1