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* Update list of ELF machine numbers.Nick Clifton2016-10-172-2/+41
* FINAL/OVERRIDE: Define to empty on g++ < 4.7Pedro Alves2016-10-142-5/+24
* Move OVERRIDE/FINAL from gcc/coretypes.h to include/ansidecl.hPedro Alves2016-10-142-6/+27
* [ARC] Disassembler: fix LIMM detection for short instructions.Claudiu Zissulescu2016-10-142-0/+5
* Disallow 3-operand cmp[l][i] for ppc64Alan Modra2016-09-292-0/+8
* [ARC] ISA alignment.Claudiu Zissulescu2016-09-262-1/+7
* PowerPC .gnu.attributesAlan Modra2016-09-262-5/+16
* [AArch64] Add SVE condition codesRichard Sandiford2016-09-212-1/+5
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-212-0/+20
* [AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford2016-09-212-0/+19
* [AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford2016-09-212-0/+12
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-212-0/+10
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-212-0/+35
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-212-0/+15
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-212-0/+59
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-212-1/+11
* [AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford2016-09-212-0/+12
* [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford2016-09-212-0/+8
* [AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford2016-09-212-0/+34
* [AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford2016-09-212-0/+14
* [AArch64][SVE 13/32] Add an F_STRICT flagRichard Sandiford2016-09-212-1/+7
* [arm] Automatically enable CRC instructions on supported ARMv8-A CPUs.Richard Earnshaw2016-09-072-0/+6
* Fixes to legacy ARC relocations.Cupertino Miranda2016-08-263-19/+47
* 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme2016-08-042-0/+12
* Synchronize libiberty sources with FSF GCC mainline version.Nick Clifton2016-08-022-0/+15
* Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions.Andrew Jenner2016-08-012-0/+7
* Begin implementing ARC NPS-400 Accelerator instructionsGraham Markall2016-07-272-59/+143
* Add support to the ARC disassembler for selecting instruction classes.Claudiu Zissulescu2016-07-202-0/+5
* Add support for creating ELF import librariesThomas Preud'homme2016-07-152-0/+11
* Pass SIGLIBRT directly to child processes.John Baldwin2016-07-152-1/+7
* [ARC] Fix/improve small data support.Claudiu Zissulescu2016-07-142-1/+5
* Fixes done to TLS.Cupertino Miranda2016-07-111-1/+1
* [ARM] Change noread to purecode.Andre Vieria2016-07-052-1/+6
* [AArch64] Fix +nofp16 handlingSzabolcs Nagy2016-07-012-4/+14
* [ARM][GAS] ARMv8.2 should enable ARMv8.1 NEON instructions.Matthew Wahab2016-06-302-1/+6
* sparc: make SPARC_OPCODE_ARCH_MAX part of its enumTrevor Saunders2016-06-292-2/+6
* [AArch64] Make register indices be full 64-bit valuesRichard Sandiford2016-06-282-3/+7
* MIPS16: Add R_MIPS16_PC16_S1 branch relocation supportMaciej W. Rozycki2016-06-282-1/+6
* xtensa: prototype xtensa_make_property_section in elf/xtensa.hTrevor Saunders2016-06-252-0/+6
* Add constants for FreeBSD-specific auxiliary vector entry types.John Baldwin2016-06-242-0/+17
* [ARC] Misc minor edits/fixesGraham Markall2016-06-232-3/+7
* addmore extern CTrevor Saunders2016-06-224-0/+30
* tilegx: move TILEGX_NUM_PIPELINE_ENCODINGS to tilegx_pipeline enumTrevor Saunders2016-06-222-3/+6
* Arc assembler: Convert nps400 from a machine type to an extension.Graham Markall2016-06-213-2/+9
* bfd,opcodes: sparc: new opcode v9{c,d,e,v,m} architectures and bfd machine nu...Jose E. Marchesi2016-06-172-0/+13
* Change the size field of MSP430_Opcode_Decoded to a plain integer.John Baldwin2016-06-142-8/+6
* [ARC] Add deep packet inspection instructions for npsGraham Markall2016-06-141-0/+1
* sparc-coff writing uninitialized memoryAlan Modra2016-06-112-0/+12
* sparc: add missing comment about hyperprivileged register operandsJose E. Marchesi2016-06-092-0/+7
* PowerPC VLEAlan Modra2016-06-072-0/+20
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