summaryrefslogtreecommitdiff
path: root/include/opcode
Commit message (Expand)AuthorAgeFilesLines
* RISC-V: Add .insn support.Jim Wilson2018-03-141-0/+21
* x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu2018-03-081-6/+0
* [ARM] Remove ARM_FEATURE_COPY macroThomas Preud'homme2018-02-271-9/+0
* MIPS16/opcodes: Free up `M' operand codeMaciej W. Rozycki2018-02-201-3/+2
* RISC-V: Add 2 missing privileged registers.Jim Wilson2018-01-041-4/+8
* Update year range in copyright notice of binutils filesAlan Modra2018-01-0372-72/+72
* RISC-V: Add missing privileged spec registers.Jim Wilson2017-12-281-148/+208
* Correct disassembly of dot product instructions.Tamar Christina2017-12-191-0/+5
* Add support for V_4B so we can properly reject it.Tamar Christina2017-12-191-0/+1
* Use consistent types for holding instructions, instruction masks, etc.Peter Bergner2017-12-011-7/+15
* Add new AArch64 FP16 FM{A|S} instructions.Tamar Christina2017-11-161-1/+3
* Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a int...Tamar Christina2017-11-151-1/+2
* Enable the Dot Product extension by default for Armv8.4-a.Tamar Christina2017-11-091-1/+2
* Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina2017-11-091-0/+7
* Split the ARM Crypto ISA extensions for AES and SHA1+2 into their own options...Tamar Christina2017-11-091-0/+5
* Change the type of the aarch64_feature_set typedef to unsigned long long so t...Nick Clifton2017-11-091-1/+1
* Split the AArch64 Crypto instructions for AES and SHA1+2 into their own optio...Nick Clifton2017-11-081-0/+2
* Adds command line support for Armv8.4-A, via the new command line option -mar...Jiong Wang2017-11-081-2/+7
* RISC-V: Add satp as an alias for sptbrPalmer Dabbelt2017-11-071-2/+5
* This patch similarly to the AArch64 one enables Dot Product support by defaul...Tamar Christina2017-11-071-19/+28
* aarch64: Remove AARCH64_FEATURE_F16 from AARCH64_ARCH_V8_2Siddhesh Poyarekar2017-11-021-1/+0
* PR22348, conflicting global vars in crx and cr16Alan Modra2017-10-252-14/+3
* RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2Andrew Waterman2017-10-241-1/+1
* FT32: support for FT32B processor - part 1James Bowman2017-10-121-3/+386
* nds32: Rename __BIT() to N32_BIT().Kuan-Lin Chen2017-09-111-2/+2
* [PowerPC VLE] Add SPE2 and EFS2 instructions supportAlexander Fedotov2017-08-241-0/+14
* [PowerPC VLE] Add LSP (Lightweight Signal Processing) instruction supportAlexander Fedotov2017-08-211-0/+3
* [ARC] Add SJLI instruction.Claudiu Zissulescu2017-07-191-0/+1
* [ARC] Add JLI support.John Eric Martin2017-07-191-1/+14
* Fix spelling typos.Yuri Chornovian2017-07-181-2/+2
* Add support for a __gcc_isr pseudo isntruction to the AVR assembler.Georg-Johann Lay2017-06-301-0/+5
* MIPS: Fix XPA base and Virtualization ASE instruction handlingMaciej W. Rozycki2017-06-301-0/+3
* [AArch64] Add dot product support for AArch64 to binutilsTamar Christina2017-06-281-0/+2
* [ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang2017-06-281-1/+4
* MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor supportMaciej W. Rozycki2017-06-281-5/+16
* [ARM] Add support for ARMv8-R in assembler and readelfThomas Preud'homme2017-06-241-1/+6
* [ARM] Remove ARMv6S-M special casingThomas Preud'homme2017-06-241-5/+7
* [ARM] Rework Tag_CPU_arch build attribute value selectionThomas Preud'homme2017-06-211-0/+1
* S/390: Improve error checking for optional operandsAndreas Krebbel2017-05-301-3/+4
* S/390: Remove optional operand flag.Andreas Krebbel2017-05-301-10/+6
* [ARC] Update MAX_INSN_FLGS.claziss2017-05-231-1/+1
* x86: Add NOTRACK prefix supportH.J. Lu2017-05-221-0/+1
* binutils: support for the SPARC M8 processorJose E. Marchesi2017-05-191-2/+23
* MIPS16e2: Add MIPS16e2 ASE supportMaciej W. Rozycki2017-05-151-5/+34
* Fix match and mask for 64-bit bb opcode.John David Anglin2017-05-141-1/+1
* [ARC] Object attributes.Claudiu Zissulescu2017-05-102-62/+98
* Reorder PPC_OPCODE_* and set PPC_OPCODE_TMR for e6500Alan Modra2017-04-111-43/+46
* Bye bye PPC_OPCODE_HTM and -mhtmAlan Modra2017-04-111-5/+0
* Bye Bye PPC_OPCODE_VSX3Alan Modra2017-04-111-3/+0
* Bye bye PPC_OPCODE_ALTIVEC2Alan Modra2017-04-111-3/+0
View Lorry Controller Status