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* Add missing '$' in configure.ac.Loïc Yhuel2016-11-073-2/+7
| | | | | | | | 2016-11-04 Loïc Yhuel <loic.yhuel@softathome.com> gold/ * configure.ac: add missing '$'. * configure: Regenerate.
* Fix PR 17704.Gergely Nagy2016-10-215-117/+219
| | | | | | | | | | | | | | This fix keeps the section with the highest alignment when folding sections with ICF. PR gold/17704 * icf.cc (match_sections): Add new parameter section_addraligns. Check section alignment and keep the section with the strictest alignment. (find_identical_sections): New local variable section_addraligns. Store each section's alignment. * testsuite/pr17704a_test.s: New file. * testsuite/Makefile.am (pr17704a_test): New test. * testsuite/Makefile.in: Regenerate.
* [GOLD] two more fall-through commentsAlan Modra2016-10-063-4/+9
| | | | | | * powerpc.cc (Target_powerpc::Relocate::relocate): Add fall through comment. * tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
* [GOLD] -Wimplicit-fallthrough warning fixesAlan Modra2016-10-0610-18/+47
| | | | | | | | | | | | | | | | * aarch64.cc: Spell fall through comments as "// Fall through.". * arm.cc: Likewise. * mips.cc: Likewise. * powerpc.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * x86_64.cc: Likewise. * powerpc.cc (Target_powerpc::Relocate::relocate): Add missing fall through comments. * sparc.cc: (Target_sparc::Scan::global): Likewise. (Target_sparc::Relocate::relocate): Likewise. * tilegx.cc (Target_tilegx::Relocate::relocate): Likewise. * resolve.cc (symbol_to_bits): Add missing break.
* Don't treat as separate symbols if unversioned symbol is undefined.Cary Coutant2016-09-272-0/+7
| | | | | | | | | | | | When we see an unversioned symbol reference in a shared library, followed by a default definition of the symbol in another shared library, we were treating them as separate symbols. That should only happen when both are definitions. gold/ PR gold/20238 * symtab.cc (Symbol_table::define_default_version): Check that unversioned symbol is defined.
* When building target binaries, ensure that the warning flags selected for ↵Vlad Zakharov2016-09-264-6/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the command line match the target compiler. bfd * warning.m4 (AC_EGREP_CPP_FOR_BUILD): Introduce macro to verify CC_FOR_BUILD compiler. (AM_BINUTILS_WARNINGS): Introduce ac_cpp_for_build variable and add CC_FOR_BUILD compiler checks. * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. binutils * Makefile.am: Replace AM_CLFAGS with AM_CFLAGS_FOR_BUILD when building with CC_FOR_BUILD compiler. * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. gas * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. gold * Makefile.in: Regenerate. * configure: Likewise. * testsuite/Makefile.in: Likewise. gprof * Makefile.in: Regenerate. * configure: Likewise. ld * Makefile.in: Regenerate. * configure: Likewise. opcodes * Makefile.in: Regenerate. * configure: Likewise.
* [GOLD] regen testsuite/Makefile.inAlan Modra2016-09-262-5/+6
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* [GOLD] warning fixesAlan Modra2016-09-263-2/+8
| | | | | | * aarch64.cc (Target_aarch64::is_erratum_835769_sequence): Avoid compiler warning. * output.cc (Output_segment::set_section_addresses): Likewise.
* Handle ARM-specific --target1-abs, --target1-rel and --target2 optionsDoug Kwan2016-09-0212-16/+484
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* [GOLD] Further tidy to powerpc can_add_to_stub_groupAlan Modra2016-08-312-19/+27
| | | | | | | | | | | This patch adds a little more debug output, and replaces two variables with one, tracking current max group size by group_size_ rather than by has14_. * powerpc.cc (class Stub_control): Delete stub14_group_size_ and has14_. Add group_size_. (Stub_control::can_add_to_stub_group): Adjust to suit. Print debug info when switching to adding sections before stubs.
* [GOLD] Add debug output for powerpc section groupingAlan Modra2016-08-313-3/+21
| | | | | | | * debug.h (DEBUG_TARGET): New. (DEBUG_ALL): Add DEBUG_TARGET. (gold_debug): Delete FORMAT param. * powerpc.cc (Stub_control::can_add_to_stub_group): Print debug ourput.
* [GOLD] correct grouping of stubsAlan Modra2016-08-302-33/+81
| | | | | | | | | | | | | | | | | This patch rewrites the rather obscure can_add_to_stub_group, fixing a problem with the handling of sections containing conditional external branches. When a section group contains any such section, the group size needs to be limited to a much smaller size than groups with only non-conditional external branches. PR 20523 * powerpc.cc (class Stub_control): Add has14_. Comment owner_. (Stub_control::can_add_to_stub_group): Correct grouping of sections containing 14-bit external branches. When returning false, set state_ to reflect the fact that we have one section for the next group. Rewrite most of function for clarity. Add and expand comments. (Target_powerpc::do_relax): Print stub group size retry in hex.
* PR gold/20529 - relaxing loop never ends.Han Shen2016-08-282-3/+35
| | | | | | | | | | | | | gold/ChangeLog 2016-08-26 Han Shen <shenhan@google.com> * powerpc.cc (Stub_table::min_size_threshold_): New member to limit size. (Stub_table::set_min_size_threshold): New member function. (Stub_table::set_address_and_size): Add code to only allow size increase. (Target_powerpc::do_relax): Add code to record last size.
* [gold] Implement -z stack-size optionRoland McGrath2016-08-235-19/+49
| | | | | | | | | | | gold/ * options.h (General_options): Grok -z stack-size. * output.h (Output_segment::set_size): New method. * layout.cc (Layout::create_executable_stack_info): Renamed to ... (Layout::create_stack_segment): ... this. Always create the segment if -z stack-size was used. (Layout::set_segment_offsets): Don't call ->set_offset on the PT_GNU_STACK segment.
* Add --be8 option to gold.Bharathi Seshadri2016-08-233-9/+134
| | | | | | | | | | gold/ * options.h (General_options): Add --be8 option. * arm.cc (Arm_relobj::do_relocate_sections): Add code to swap for be8. (Output_data_plt_arm_standard::do_fill_first_plt_entry): Likewise. (Output_data_plt_arm_short::do_fill_plt_entry): Likewise. (Output_data_plt_arm_long::do_fill_plt_entry): Likewise. (Target_arm::do_adjust_elf_header): Do EF_ARM_BE8 adjustment.
* Fix extraneous complaints about missing expected TLS relocation (i386).Cary Coutant2016-08-174-14/+25
| | | | | | | | | | | | | Build the test objects with the in-tree assembler. Also fix some cascading error messages caused by not resetting the skip_call_tls_get_addr_ flag after printing the error. gold/ * i386.cc (Target_i386): Reset skip_call_tls_get_addr_ after printing error message. * testsuite/Makefile.am (pr20216a): Add missing dependencies. (pr20308a): Add -Bgcctestdir/ to compile rules. * testsuite/Makefile.in: Regenerate.
* PR gold/20462: Fix bogus layout on ARM with linker script using PHDRS clauseRoland McGrath2016-08-122-20/+27
| | | | | | | gold/ PR gold/20462 * script-sections.cc (Script_sections::release_segments): Reset this->segments_created_.
* [gold] Implement HIDDEN syntax in linker scriptsRoland McGrath2016-08-123-1/+11
| | | | | | | gold/ * yyscript.y (HIDDEN): New %token. (assignment): Handle HIDDEN(string = expr) syntax. * script.cc (script_keyword_parsecodes): Add HIDDEN.
* Fix extraneous complaints about missing expected TLS relocation.Cary Coutant2016-08-104-4/+16
| | | | | | | | | | | | | | | | | | | With some versions of gas, the call to tls_get_addr uses a GOTPCREL relocation instead of a GOTPCRELX relocation. We should allow for that when skip_call_tls_get_addr_ is true. We should also build the test objects with the in-tree assembler. This patch also fixes some cascading error messages caused by not resetting the skip_call_tls_get_addr_ flag after printing the error. gold/ PR gold/20216 * x86_64.cc (Target_x86_64::Relocate::relocate): Add check for R_X86_64_GOTPCREL. Reset skip_call_tls_get_addr_ after printing error message. * testsuite/Makefile.am (pr20216_gd.o): Add -Bgcctestdir/. (pr20216_ld.o): Likewise. * testsuite/Makefile.in: Regenerate.
* Fix potential crashes when Target::make_symbol() returns NULL.James Clarke2016-08-102-4/+18
| | | | | | | | | | | | 2016-08-10 James Clarke <jrtc27@jrtc27.com> gold/ PR gold/20443 * symtab.cc (Symbol_table::add_from_relobj): Handle NULL symbols, which will be present for STT_SPARC_REGISTER. (Symbol_table::add_from_pluginobj): Likewise. (Symbol_table::add_from_dynobj): Likewise. (Symbol_table::add_from_incrobj): Removed dead code.
* Fix improper handling of R_SPARC_GOTDATA_OP_LOX10 relocation.James Clarke2016-08-102-7/+13
| | | | | | | | | | | | | | The fall-through in Target_sparc::Relocate::relocate for R_SPARC_GOTDATA_OP_LOX10 is currently R_SPARC_GOT13, but should clearly be R_SPARC_GOT10. GCC has been seen to emit a sethi/xor rather than a sethi/or sequence to load a 32-bit immediate, but if R_SPARC_GOT13 is used then bits 10-12 get zeroed out as both the sethi and xor immediates contain them. gold/ PR gold/20442 * sparc.cc (Target_sparc::Relocate::relocate): R_SPARC_GOTDATA_OP_LOX10 should fall back on R_SPARC_GOT10, not R_SPARC_GOT13.
* Add support for R_SPARC_32 relocation.James Clarke2016-08-102-1/+7
| | | | | | | gold/ PR gold/20441 * sparc.cc (Target_sparc::Scan::check_non_pic): Allow R_SPARC_32 on sparc64.
* Fix aarch64_relocs.sh file modeAlan Modra2016-07-271-0/+0
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* [Gold, aarch64] Implement some AArch64 relocs.Han Shen2016-07-268-9/+300
| | | | | | | | | | | | | | | | | | | | | | | | | | | This CL implemented the following relocs for AArch64 target. - R_AARCH64_MOVW_UABS_G* - R_AARCH64_MOVW_SABS_G* relocations gold/ChangeLog 2016-07-26 Igor Kudrin <ikudrin@accesssoftek.com> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class. (rvalue_bit_select): Use Rvalue_bit_select_impl. * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1, MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3, MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations. * aarch64.cc (Target_aarch64::Scan::local): Add cases for new MOVW_UABS_* and MOVW_SABS_* relocations. (Target_aarch64::Scan::global): Likewise. (Target_aarch64::Relocate::relocate): Add cases and handlings for new MOVW_UABS_* and MOVW_SABS_* relocations. * testsuite/Makefile.am (aarch64_relocs): New test. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_globals.s: New test source file. * testsuite/aarch64_relocs.s: Likewise. * testsuite/aarch64_relocs.sh: New test script.
* Fix gold testsuite failure with GCC 6.Cary Coutant2016-06-292-1/+6
| | | | | | | | | | | | With GCC 6 when not using -static-libstdc++, the operator delete(void*) function is defined in the shared C++ support library, rather than in the main program. The test script is too aggressive in checking for this symbol's presence among the exported symbols. This patch removes the check for that symbol. gold/ PR gold/20310 * testsuite/dynamic_list.sh: Remove check for _ZdlPv.
* Update "make clean" in gold/testsuite.Cary Coutant2016-06-293-2/+7
| | | | | | gold/ * testsuite/Makefile.am (MOSTLYCLEANFILES): Add eh_test_2. * testsuite/Makefile.in: Regenerate.
* [GOLD] Pass -Wl,-z to gcc, not plain -zAlan Modra2016-06-303-4/+10
| | | | | | * testsuite/Makefile.am (memory_test, memory_test_2): Pass -Wl,-z to gcc, not plain -z. * testsuite/Makefile.in: Regenerate.
* gold: Support 386 TLS code sequences without PLTH.J. Lu2016-06-298-126/+663
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are extensions to 386 psABI: https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs to call tls_get_addr via GOT: call *___tls_get_addr@GOT(%reg) where EBX register isn't required as GOT base. Since direct call is 4-byte long and indirect call, is 5-byte long, the extra one byte must be handled properly. For general dynamic model, 7-byte lea instruction before call instruction is replaced by 6-byte one to make room for indirect call. For local dynamic model, we simply use 5-byte indirect call. TLS linker optimization is updated to recognize new instruction patterns. For local dynamic model to local exec model transition, we generate a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte lea instruction. PR gold/20308 * i386.cc (Target_i386::Relocate::relocate): Allow R_386_GOT32X relocation against ___tls_get_addr. (Target_i386::Relocate::tls_gd_to_ie): Support indirect call to __tls_get_addr. (Target_i386::Relocate::tls_gd_to_le): Likewise. (Target_i386::Relocate::tls_ld_to_le): Likewise. * testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test, pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test. (pr20308a_test_SOURCES): New. (pr20308a_test_DEPENDENCIES): Likewise. (pr20308a_test_CFLAGS): Likewise. (pr20308a_test_LDFLAGS): Likewise. (pr20308a_test_LDADD): Likewise. (pr20308b_test_SOURCES): Likewise. (pr20308b_test_DEPENDENCIES): Likewise. (pr20308b_test_CFLAGS): Likewise. (pr20308b_test_LDFLAGS): Likewise. (pr20308b_test_LDADD): Likewise. (pr20308c_test_SOURCES): Likewise. (pr20308c_test_DEPENDENCIES): Likewise. (pr20308c_test_CFLAGS): Likewise. (pr20308c_test_LDFLAGS): Likewise. (pr20308c_test_LDADD): Likewise. (pr20308d_test_SOURCES): Likewise. (pr20308d_test_DEPENDENCIES): Likewise. (pr20308d_test_CFLAGS): Likewise. (pr20308d_test_LDFLAGS): Likewise. (pr20308d_test_LDADD): Likewise. (pr20308e_test_SOURCES): Likewise. (pr20308e_test_DEPENDENCIES): Likewise. (pr20308e_test_CFLAGS): Likewise. (pr20308e_test_LDFLAGS): Likewise. (pr20308e_test_LDADD): Likewise. (pr20308a.so): Likewise. (pr20308b.so): Likewise. (pr20308_gd.o): Likewise. (pr20308_ld.o): Likewise. (MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so. * testsuite/Makefile.in: Regenerated. * testsuite/pr20308_def.c: New file. * testsuite/pr20308_gd.S: Likewise. * testsuite/pr20308_ld.S: Likewise. * testsuite/pr20308_main.c: Likewise.
* gold: Support x86-64 TLS code sequences without PLTH.J. Lu2016-06-2910-121/+639
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are extensions to x86-64 psABI: https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI to call tls_get_addr via GOT: call *__tls_get_addr@GOTPCREL(%rip) Since direct call is 4-byte long and indirect call, is 5-byte long, the extra one byte must be handled properly. For general dynamic model, one 0x66 prefix before call instruction is removed to make room for indirect call. For local dynamic model, we simply use 5-byte indirect call. TLS linker optimization is updated to recognize new instruction patterns. For local dynamic model to local exec model transition, we generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and generate a 5-byte nop, instead of 4-byte, before mov instruction in 32-bit. PR gold/20216 * configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New AM_CONDITIONAL. * configure: Regenerated. * x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow R_X86_64_GOTPCRELX relocation against __tls_get_addr. (Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect call to __tls_get_addr. (Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise. (Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise. * testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test, pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test. (pr20216a_test_SOURCES): New. (pr20216a_test_DEPENDENCIES): Likewise. (pr20216a_test_CFLAGS): Likewise. (pr20216a_test_LDFLAGS): Likewise. (pr20216a_test_LDADD): Likewise. (pr20216b_test_SOURCES): Likewise. (pr20216b_test_DEPENDENCIES): Likewise. (pr20216b_test_CFLAGS): Likewise. (pr20216b_test_LDFLAGS): Likewise. (pr20216b_test_LDADD): Likewise. (pr20216c_test_SOURCES): Likewise. (pr20216c_test_DEPENDENCIES): Likewise. (pr20216c_test_CFLAGS): Likewise. (pr20216c_test_LDFLAGS): Likewise. (pr20216c_test_LDADD): Likewise. (pr20216d_test_SOURCES): Likewise. (pr20216d_test_DEPENDENCIES): Likewise. (pr20216d_test_CFLAGS): Likewise. (pr20216d_test_LDFLAGS): Likewise. (pr20216d_test_LDADD): Likewise. (pr20216e_test_SOURCES): Likewise. (pr20216e_test_DEPENDENCIES): Likewise. (pr20216e_test_CFLAGS): Likewise. (pr20216e_test_LDFLAGS): Likewise. (pr20216e_test_LDADD): Likewise. (pr20216a.so): Likewise. (pr20216b.so): Likewise. (pr20216_gd.o): Likewise. (pr20216_ld.o): Likewise. (MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so. * testsuite/Makefile.in: Regenerated. * testsuite/pr20216_def.c: New file. * testsuite/pr20216_gd.S: Likewise. * testsuite/pr20216_ld.S: Likewise. * testsuite/pr20216_main.c: Likewise.
* [GOLD] Modify script_test_12Alan Modra2016-06-293-4/+7
| | | | | | | Changes necessary to make this test pass on powerpc64. * script_test_12.t: Delete .plt, specify 64k page size. * script_test_12i.t: Likewise.
* [GOLD] alignment testAlan Modra2016-06-292-12/+17
| | | | | | | | | | PowerPC gcc aligns char arrays to a word which results in the test failing since it expects a char alignment. As the test already uses gcc attributes to assign variables to sections, we may as well use an attribute to align too. * testsuite/plugin_layout_with_alignment.c: Explicitly align all variables.
* [GOLD] Disable copy_test_protected on powerpcAlan Modra2016-06-293-111/+118
| | | | | | | A target like powerpc64 that is PIC by default doesn't need copy relocs. * testsuite/Makefile.am (copy_test_protected): Disable for powerpc. * testsuite/Makefile.in: Regenerate.
* Fix execute permission on gold/testsuite/script_test_14.sh.Cary Coutant2016-06-281-0/+0
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* Implement the R_AARCH64_NONE relocation.Igor Kudrin2016-06-287-9/+129
| | | | | | | | | | | | | | | According to "ELF for the ARM(r) 64-bit Architecture (AArch64)", this relocation can be used "to prevent removal of sections that might otherwise appear to be unused." gold/ * aarch64-reloc.def (NONE): New relocation. * aarch64.cc (Target_aarch64::Scan::local): Handle R_AARCH64_NONE. (Target_aarch64::Scan::global): Likewise. * testsuite/Makefile.am (aarch64_reloc_none): New test. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_reloc_none.s: New test source file. * testsuite/aarch64_reloc_none.sh: New test script.
* Convert indirect calls to direct when possible.Sriraman Tallam2016-06-287-28/+250
| | | | | | | | | | | | | | | | | | | | Please see patch discussion: https://www.sourceware.org/ml/binutils/2016-05/msg00322.html 2016-06-28 Sriraman Tallam <tmsriram@google.com> * x86_64.cc (Lazy_view): New class. (can_convert_mov_to_lea): Templatize function. Make the function check for appropriate relocation types and use the view parameter to get section contents. (can_convert_callq_to_direct): New function. (Target_x86_64<size>::Scan::global): Refactor. (Target_x86_64<size>::Relocate::relocate): Refactor. Change any indirect call via GOT that can be converted. * testsuite/Makefile.am (x86_64_indirect_call_to_direct.sh): New test. * testsuite/Makefile.in: Regenerate. * testsuite/x86_64_indirect_call_to_direct1.s: New file. * testsuite/x86_64_indirect_jump_to_direct1.s: New file.
* Implement SORT_BY_INIT_PRIORITY.Igor Kudrin2016-06-282-2/+13
| | | | | | | | | | | | | | | | | | | | 2016-06-28 Igor Kudrin <ikudrin@accesssoftek.com> gold/ PR gold/18098 * script-c.h (Sort_wildcard): Add SORT_WILDCARD_BY_INIT_PRIORITY. * script-sections.cc (Input_section_sorter::get_init_priority): New method. (Input_section_sorter::operator()): Handle SORT_WILDCARD_BY_INIT_PRIORITY. (Output_section_element_input::print): Likewise. * script.cc (script_keyword_parsecodes): Add entry SORT_BY_INIT_PRIORITY. * yyscript.y (SORT_BY_INIT_PRIORITY): New token. (wildcard_section): Handle SORT_BY_INIT_PRIORITY. * testsuite/Makefile.am (script_test_14): New test. * testsuite/Makefile.in: Regenerate. * testsuite/script_test_14.s: New test source file. * testsuite/script_test_14.sh: New test script. * testsuite/script_test_14.t: New test linker script.
* Implement SORT_BY_INIT_PRIORITY.Igor Kudrin2016-06-2810-6/+283
| | | | | | | | | | | | | | | | | | | | 2016-06-28 Igor Kudrin <ikudrin@accesssoftek.com> gold/ PR gold/18098 * script-c.h (Sort_wildcard): Add SORT_WILDCARD_BY_INIT_PRIORITY. * script-sections.cc (Input_section_sorter::get_init_priority): New method. (Input_section_sorter::operator()): Handle SORT_WILDCARD_BY_INIT_PRIORITY. (Output_section_element_input::print): Likewise. * script.cc (script_keyword_parsecodes): Add entry SORT_BY_INIT_PRIORITY. * yyscript.y (SORT_BY_INIT_PRIORITY): New token. (wildcard_section): Handle SORT_BY_INIT_PRIORITY. * testsuite/Makefile.am (script_test_14): New test. * testsuite/Makefile.in: Regenerate. * testsuite/script_test_14.s: New test source file. * testsuite/script_test_14.sh: New test script. * testsuite/script_test_14.t: New test linker script.
* Don't convert R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.James Clarke2016-06-282-4/+13
| | | | | | | | | | | | bfd * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64. gold * sparc.cc (Target_sparc::Scan::local): Don't convert R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64. (Target_sparc::Scan::global): Likewise. ld * testsuite/ld-elf/symbolic-func.r: Allow non-zero offsets from .text.
* Fix bug with grouping sections.Cary Coutant2016-06-236-6/+23
| | | | | | | | | | | | | | | | | | | The fix for PR 15370 did not correctly check all patterns in a group, but instead threw all unassigned sections into the group. This patch fixes that. 2016-06-23 Cary Coutant <ccoutant@gmail.com> Igor Kudrin <ikudrin@accesssoftek.com> gold/ PR gold/15370 * script-sections.cc (Output_section_element_input::set_section_addresses): Keep bin_count separate from input_pattern_count. * testsuite/script_test_12.t: Add another section .x4. * testsuite/script_test_12i.t: Likewise. * testsuite/script_test_12a.c: Likewise. * testsuite/script_test_12b.c: Likewise.
* Fix compilation error in MSYS2 environment.Igor Kudrin2016-06-232-3/+7
| | | | | gold/ * gold-threads.cc (impl_threads::Lock_impl_threads): Fix typos.
* gold: Add a linker configure option --enable-relroH.J. Lu2016-06-226-1/+57
| | | | | | | | | | | | | | | Add a configure option --enable-relro to decide whether -z relro should be enabled by default. Default to yes. PR ld/20283 * NEWS: Mention --enable-relro. * configure.ac: Add --enable-relro. (DEFAULT_LD_Z_RELRO): New. Set by --enable-relro and default to 1. * config.in: Regenerated. * configure: Likewise. * options.h (General_options::relro): Default to DEFAULT_LD_Z_RELRO.
* Update gold to version 1.12.Cary Coutant2016-06-203-1/+48
| | | | | | gold/ * NEWS: Add new features in 1.12. * version.cc (version_string): Bump to 1.12.
* gold/x86: Handle output without PLTH.J. Lu2016-06-203-0/+17
| | | | | | | | | | | | If there is no PLT in output, return 0 for first_plt_entry_offset and plt_entry_size. PR gold/20245 * i386.cc (Target_i386::first_plt_entry_offset): Return 0 if plt_ is NULL. (Target_i386::plt_entry_size): Likewise. (Target_x86_64<size>::first_plt_entry_offset): Likewise. (Target_x86_64<size>::plt_entry_size): Likewise.
* Add support for MIPS .rld_map section.Vladimir Radosavljevic2016-06-204-5/+85
| | | | | | | | | | | | | | | | | | | | | | Includes DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags and __RLD_MAP symbol. 2016-06-20 Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com> elfcpp/ * elfcpp.h (DT_MIPS_RLD_MAP_REL): New enum constant. gold/ * mips.cc (Target_mips::Target_mips): Initialize rld_map_. (Target_mips::rld_map_): New data member. (Target_mips::do_finalize_sections): Add support for DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags, .rld_map section, and __RLD_MAP symbol. (Target_mips::do_dynamic_tag_custom_value): Add support for DT_MIPS_RLD_MAP_REL dynamic tag. * output.cc (Output_data_dynamic::get_entry_offset): New method definition. * output.h (Output_data_dynamic::get_entry_offset): New method declaration.
* Add unaligned check for R_MIPS_PC16.Vladimir Radosavljevic2016-06-202-0/+7
| | | | | gold/ * mips.cc (Mips_relocate_functions::relpc16): Add unaligned check.
* Add support for Mips32r6 and Mips64r6.Vladimir Radosavljevic2016-06-202-10/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | elfcpp/ * mips.h (R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16, R_MIPS_PCLO16): New enums for Mips32r6 and Mips64r6 relocations. (r6_isa): New function. gold/ * mips.cc (relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (hi16_reloc): Add support for R_MIPS_PCHI16 relocation. (is_matching_lo16_reloc): Likewise. (lo16_reloc): Add support for R_MIPS_PCLO16 relocation. (Mips_output_data_plt::plt_entry_r6): New static data member for R6 PLT entry. (Target_mips::is_output_r6): New method. (Target_mips::Mips_mach): Add new enum constants. (Mips_relocate_functions::Status): Likewise. (Mips_relocate_functions::pchi16_relocs): New static data member. (Mips_relocate_functions::relpc21): New method. (Mips_relocate_functions::relpc26): Likewise. (Mips_relocate_functions::relpc18): Likewise. (Mips_relocate_functions::relpc19): Likewise. (Mips_relocate_functions::relpchi16): Likewise. (Mips_relocate_functions::do_relpchi16): Likewise. (Mips_relocate_functions::relpclo16): Likewise. (Mips_output_data_plt::do_write): Add support for Mips r6 plt entry. (Target_mips::mips_32bit_flags): Add E_MIPS_ARCH_32R6 support. (Target_mips::elf_mips_mach): Add E_MIPS_ARCH_32R6 and E_MIPS_ARCH_64R6 support. (Target_mips::update_abiflags_isa): Likewise. (mips_get_size_for_reloc): Add support for relocs: R_MIPS_PCHI16, R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3 and R_MIPS_PC19_S2. (Target_mips::Scan::local): Add support for relocs: R_MIPS_PCHI16 and R_MIPS_PCLO16. (Target_mips::Scan::global): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (Target_mips::Relocate::relocate): Call functions for resolving Mips32r6 and Mips64r6 relocations, and print error message for STATUS_PCREL_UNALIGNED. (Target_mips::Scan::get_reference_flags): Add support for relocs: R_MIPS_PCHI16, R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3 and R_MIPS_PC19_S2. (Target_mips::elf_mips_mach_name): Add E_MIPS_ARCH_32R6 and E_MIPS_ARCH_64R6 support.
* Add .got.plt to testsuite/script_test_2.tH.J. Lu2016-06-132-0/+6
| | | | | | | | The .got.plt section must be placed right after the .got section. Otherwise, GOT offset will be wrong. PR gold/20246 * testsuite/script_test_2.t: Add .got.plt after .got.
* Add support for .MIPS.abiflags and .gnu.attributes sections.Vladimir Radosavljevic2016-06-112-62/+819
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | elfcpp/ * elfcpp.h (SHT_MIPS_ABIFLAGS): New enum constant. * mips.h (EF_MIPS_FP64, EF_MIPS_NAN2008): New enum constants for processor-specific flags. (E_MIPS_MACH_5900): New enum constant for machine variant. (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): New enum constants. (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU, AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS, AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16, AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP, AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900, AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900, AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120, AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E, AFL_EXT_LOONGSON_2F, AFL_EXT_OCTEON3): Likewise. (Tag_GNU_MIPS_ABI_FP, Tag_GNU_MIPS_ABI_MSA): Likewise. (Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE, Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT, Val_GNU_MIPS_ABI_FP_OLD_64,Val_GNU_MIPS_ABI_FP_XX, Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A, Val_GNU_MIPS_ABI_FP_NAN2008, Val_GNU_MIPS_ABI_MSA_ANY, Val_GNU_MIPS_ABI_MSA_128): Likewise. (AFL_FLAGS1_ODDSPREG): New enum constant. gold/ * mips.cc (struct Mips_abiflags): New struct. (Mips_relobj::Mips_relobj): Initialize attributes_section_data_ and abiflags_. (Mips_relobj::~Mips_relobj): Delete object pointed by attributes_section_data_. (Mips_relobj::abiflags): New method. (Mips_relobj::attributes_section_data): Likewise. (Mips_relobj::attributes_section_data_): New data member. (Mips_relobj::abiflags_): Likewise. (class Mips_output_section_abiflags): New class. (Target_mips::Target_mips): Initialize attributes_section_data_, abiflags_ and has_abiflags_section_. (Target_mips::do_should_include_section): Don't emit input .MIPS.abiflags sections to output .MIPS.abiflags. (Target_mips::Mips_mach): Add new enum constants. (Target_mips::mips_isa_ext_mach): New method. (Target_mips::mips_isa_ext): Likewise. (Target_mips::update_abiflags_isa): Likewise. (Target_mips::infer_abiflags): Likewise. (Target_mips::create_abiflags): Likewise. (Target_mips::fp_abi_string): Likewise. (Target_mips::select_fp_abi): Likewise. (Target_mips::merge_obj_attributes): Likewise. (Target_mips::merge_obj_abiflags): Likewise. (Target_mips::level_rev): Likewise. (Target_mips::merge_obj_e_flags): Rename from merge_processor_specific_flags. Remove dyn_obj argument, call update_abiflags_isa when needed, compare NaN encodings and compare FP64 state. (Target_mips::add_machine_extensions): Add two machine extensions and fix one. (Target_mips::attributes_section_data_): New data member. (Target_mips::abiflags_): Likewise. (Target_mips::has_abiflags_section_): Likewise. (Mips_relobj::do_read_symbols): Read .gnu.attributes and .MIPS.abiflags sections if they exists. (Target_mips::elf_mips_mach): Add E_MIPS_MACH_5900 and E_MIPS_MACH_OCTEON3 support. (Target_mips::do_adjust_elf_header): Setup EI_ABIVERSION flag. (Target_mips::do_finalize_sections): Merge .gnu.attributes and .MIPS.abiflags sections from input. Create these sections if needed. (Target_mips::elf_mips_mach_name): Add E_MIPS_MACH_5900 and E_MIPS_MACH_OCTEON3 support, and change strings for E_MIPS_MACH_LS2E, E_MIPS_MACH_LS2F and E_MIPS_MACH_LS3A just to match bfd.
* Fix problems emitting MIPS .reginfo section.Vladimir Radosavljevic2016-06-102-81/+80
| | | | | | | | | | | | | | | | | | | | | gold/ * mips.cc (Mips_relobj::Mips_relobj): Initialize has_reginfo_section_. (Mips_relobj::has_reginfo_section_): New data member. (Mips_relobj::has_reginfo_section): New method. (class Mips_output_section_reginfo): Change base class to Output_section_data, and set masks of the output .reginfo section in constructor. (Mips_output_section_reginfo::as_mips_output_section_reginfo): Remove. (Mips_output_section_reginfo::set_masks): Likewise. (Mips_output_section_reginfo::set_final_data_size): Likewise. (Mips_output_section_reginfo::do_print_to_mapfile): New method. (Target_mips::do_make_output_section): Remove. (Mips_relobj::do_read_symbols): Set has_reginfo_section_ to true if the object contains a .reginfo section. (Target_mips::do_finalize_sections): Create a .reginfo output section if needed.
* Fix compilation error in mips.cc with some versions of GCC.Artemiy Volkov2016-06-092-2/+10
| | | | | | gold/ * mips.cc (Mips_output_data_got::do_write): Add missing template args via typedef.
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