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* x86: Print {bad} on invalid broadcast in OP_E_memoryCui,Lili2021-09-284-5/+23
| | | | | | | | | | | | | | | | | | | Don't print broadcast for scalar_mode, and print {bad} for invalid broadcast. gas/ PR binutils/28381 * testsuite/gas/i386/bad-bcast.s: Add a new testcase. * testsuite/gas/i386/bad-bcast.d: Likewise. * testsuite/gas/i386/bad-bcast-intel.d: New. opcodes/ PR binutils/28381 * i386-dis.c (static struct): Add no_broadcast. (OP_E_memory): Mark invalid broadcast with no_broadcast=1 and Print "{bad}"for it. (intel_operand_size): mark invalid broadcast with no_broadcast=1. (OP_XMM): Mark scalar_mode with no_broadcast=1.
* configure: regenerate in all projects that use libtool.m4Nick Alcock2021-09-272-45/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (including sim/, which has no changelog.) bfd/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. binutils/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. gas/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. gprof/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. ld/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. libctf/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. * Makefile.in: Regenerate. opcodes/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate. zlib/ChangeLog 2021-09-27 Nick Alcock <nick.alcock@oracle.com> * configure: Regenerate.
* PowerPC: Enable mfppr mfppr32, mtppr and mtppr32 extended mnemonics on POWER5Peter Bergner2021-09-256-8/+30
| | | | | | | | | | | | | | | | | SPR 896 and the mfppr mfppr32, mtppr and mtppr32 extended mnemonics were added in ISA 2.03, so enable them on POWER5 and later. opcodes/ * ppc-opc.c (powerpc_opcodes) <mfppr, mfppr32, mtppr, mtppr32>: Enable on POWER5 and later. gas/ * testsuite/gas/ppc/power5.s: New test. * testsuite/gas/ppc/power5.d: Likewise. * testsuite/gas/ppc/ppc.exp: Run it. * testsuite/gas/ppc/power7.s: Remove tests for mfppr, mfppr32, mtppr and mtppr32. * testsuite/gas/ppc/power7.d: Likewise.
* gas/testsuite/ld-elf/dwarf2-21.d: Pass -WHans-Peter Nilsson2021-09-241-1/+1
| | | | | | | | | | | | | | | | Required for the expected "CU:" to be emitted for long source-paths. See binutils/dwarf.c: if (do_wide || strlen (directory) < 76) printf (_("CU: %s/%s:\n"), directory, file_table[0].name); else printf ("%s:\n", file_table[0].name); See also commit 5f410aa50ce2c, "testsuite/ld-elf/pr26936.d: Pass -W." gas/ChangeLog: * testsuite/ld-elf/dwarf2-21.d: Pass -W.
* dwarf2 sub-section testAlan Modra2021-09-224-2/+32
| | | | | | | | | | | | | | | | | | | | | This is a testcase for the bug fixed by commit 5b4846283c3d. When running the testcase on ia64 targets I found timeouts along with lots of memory being consumed, due to ia64 gas not tracking text sub-sections. Trying to add nops for ".nop 16" in ".text 1" resulting in them being added to subsegment 0, with no increase to subsegment 1 size. This patch also fixes that problem. Note that the testcase fails on ft32-elf, mn10200-elf, score-elf, tic5x-elf, and xtensa-elf. The first two are relocation errors, the last three appear to be the .nop directive failing to emit the right number of nops. I didn't XFAIL any of them. * config/tc-ia64.c (md): Add last_text_subseg. (ia64_flush_insns, dot_endp): Use last_text_subseg. (ia64_frob_label, md_assemble): Set last_text_subseg. * testsuite/gas/elf/dwarf2-21.d, * testsuite/gas/elf/dwarf2-21.s: New test. * testsuite/gas/elf/elf.exp: Run it.
* Fix allocate_filenum last dir/file checksAlan Modra2021-09-201-3/+3
| | | | * dwarf2dbg.c (allocate_filenum) Correct use of last_used_dir_len.
* Re: PR28149, debug info with wrong file associationAlan Modra2021-09-201-13/+23
| | | | | | | | | | | | Fixes segfaults when building aarch64-linux kernel, due to only doing part of the work necessary when allocating file numbers late. I'd missed looping over subsegments, which resulted in some u.filename entries left around and later interpreted as u.view. PR 28149 * dwarf2dbg.c (purge_generated_debug): Iterate over subsegs too. (dwarf2_finish): Call do_allocate_filenum for all subsegs too, in a separate loop before subsegs are chained.
* PR28149 part 2, purge generated line infoAlan Modra2021-09-185-48/+40
| | | | | | | | | | | | | | | | | | | | Mixing compiler generated line info with gas generated line info is generally just confusing. Also .loc directives with non-zero view fields might reference a previous .loc. It becomes a little more tricky to locate that previous .loc if there might be gas generated line info present too. Mind you, we turn off gas generation of line info on seeing compiler generated line info, so any reference back won't hit gas generated line info. At least, if the view info is sane. Unfortunately, gas needs to handle mangled source. PR 28149 * dwarf2dbg.c (purge_generated_debug): New function. (dwarf2_directive_filename): Call the above. (out_debug_line): Don't segfault after purging. * testsuite/gas/i386/dwarf2-line-4.d: Update expected output. * testsuite/gas/i386/dwarf4-line-1.d: Likewise. * testsuite/gas/i386/dwarf5-line-1.d: Likewise. * testsuite/gas/i386/dwarf5-line-2.d: Likewise.
* PR28149, debug info with wrong file associationAlan Modra2021-09-188-72/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc-11 and gcc-12 pass -gdwarf-5 to gas, in order to prime gas for DWARF 5 level debug info. Unfortunately it seems there are cases where the compiler does not emit a .file or .loc dwarf debug directive before any machine instructions. (Note that the .file directive typically emitted as the first line of assembly output doesn't count as a dwarf debug directive. The dwarf .file has a file number before the file name string.) This patch delays allocation of file numbers for gas generated line debug info until the end of assembly, thus avoiding any clashes with compiler generated file numbers. Two fixes for test case source are necessary; A .loc can't use a file number that hasn't already been specified with .file. A followup patch will remove all the gas generated line info on seeing a .file directive. PR 28149 * dwarf2dbg.c (num_of_auto_assigned): Delete. (current): Update initialisation. (set_or_check_view): Replace all accesses to view with u.view. (dwarf2_consume_line_info): Likewise. (dwarf2_directive_loc): Likewise. Assert that we aren't generating line info. (dwarf2_gen_line_info_1): Don't call set_or_check_view on gas generated line entries. (dwarf2_gen_line_info): Set and track filenames for gas generated line entries. Simplify generation of labels. (get_directory_table_entry): Use filename_cmp when comparing dirs. (do_allocate_filenum): New function. (dwarf2_where): Set u.filename and filenum to -1 for gas generated line entries. (dwarf2_directive_filename): Remove num_of_auto_assigned handling. (process_entries): Update view field access. Call do_allocate_filenum. * dwarf2dbg.h (struct dwarf2_line_info): Add filename field in union aliasing view. * testsuite/gas/i386/dwarf2-line-3.s: Add .file directive. * testsuite/gas/i386/dwarf2-line-4.s: Likewise. * testsuite/gas/i386/dwarf2-line-4.d: Update expected output. * testsuite/gas/i386/dwarf4-line-1.d: Likewise. * testsuite/gas/i386/dwarf5-line-1.d: Likewise. * testsuite/gas/i386/dwarf5-line-2.d: Likewise.
* RISC-V: Merged extension string tables and their version tables into one.Nelson Chu2021-09-171-119/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two main reasons for this patch, * In the past we had two extension tables, one is used to record all supported extensions in bfd/elfxx-riscv.c, another is used to get the default extension versions in gas/config/tc-riscv.c. It is hard to maintain lots of tables in different files, but in fact we can merge them into just one table. Therefore, we now define many riscv_supported_std* tables, which record names and versions for all supported extensions. We not only use these tables to initialize the riscv_ext_order, but also use them to get the default versions of extensions, and decide if the extensions should be enbaled by default. * We add a new filed `default_enable' for the riscv_supported_std* tables, to decide if the extension should be enabled by default. For now if the `default_enable' field of the extension is set to EXT_DEFAULT, then we should enable the extension when the -march and elf architecture attributes are not set. In the future, I suppose the `default_enable' can be set to lots of EXT_<VENDOR>, each vendor can decide to open which extensions, when the target triple of vendor is chosen. The elf/linux regression tests of riscv-gnu-toolchain are passed. bfd/ * elfnn-riscv.c (cpu-riscv.h): Removed sine it is included in bfd/elfxx-riscv.h. (riscv_merge_std_ext): Updated since the field of rpe is changed. * elfxx-riscv.c (cpu-riscv.h): Removed. (riscv_implicit_subsets): Added implicit extensions for g. (struct riscv_supported_ext): Used to be riscv_ext_version. Moved from gas/config/tc-riscv.c, and added new field `default_enable' to decide if the extension should be enabled by default. (EXT_DEFAULT): Defined for `default_enable' field. (riscv_supported_std_ext): It used to return the supported standard architecture string, but now we move ext_version_table from gas/config/tc-riscv.c to here, and rename it to riscv_supported_std_ext. Currently we not only use the table to initialize riscv_ext_order, but also get the default versions of extensions, and decide if the extensions should be enbaled by default. (riscv_supported_std_z_ext): Likewise, but is used for z* extensions. (riscv_supported_std_s_ext): Likewise, but is used for s* extensions. (riscv_supported_std_h_ext): Likewise, but is used for h* extensions. (riscv_supported_std_zxm_ext): Likewise, but is used for zxm* extensions. (riscv_all_supported_ext): Includes all supported extension tables. (riscv_known_prefixed_ext): Updated. (riscv_valid_prefixed_ext): Updated. (riscv_init_ext_order): Init the riscv_ext_order table according to riscv_supported_std_ext. (riscv_get_default_ext_version): Moved from gas/config/tc-riscv.c. Get the versions of extensions from riscv_supported_std* tables. (riscv_parse_add_subset): Updated. (riscv_parse_std_ext): Updated. (riscv_set_default_arch): Set the default subset list according to the default_enable field of riscv_supported_*ext tables. (riscv_parse_subset): If the input ARCH is NULL, then we call riscv_set_default_arch to set the default subset list. * elfxx-riscv.h (cpu-riscv.h): Included. (riscv_parse_subset_t): Removed get_default_version field, and added isa_spec field to replace it. (extern riscv_supported_std_ext): Removed. gas/ * (bfd/cpu-riscv.h): Removed. (struct riscv_ext_version): Renamed and moved to bfd/elfxx-riscv.c. (ext_version_table): Likewise. (riscv_get_default_ext_version): Likewise. (ext_version_hash): Removed. (init_ext_version_hash): Removed. (riscv_set_arch): Updated since the field of rps is changed. Besides, report error when the architecture string is empty. (riscv_after_parse_args): Updated.
* RISC-V: Update the assembler insn testcase.Nelson Chu2021-09-132-4/+0
| | | | | | | | | | Since the 0x57 is preserved for the vadd.vv instruction in the integration branch, remove it to make sure the testcase can work. gas/ * testsuite/gas/riscv/insn.d: Remove 0x57 since it is preserved for vadd.vv instruction. * testsuite/gas/riscv/insn.s: Likewise.
* MIPS: don't use get_symbol_name() for section parsing. With ↵Jan Beulich2021-09-132-14/+8
| | | | | | | s_change_section() later calling obj_elf_section(), it seems better to pre-parse the section name by the same function that will be used there. This way no differences in what is accepted will result. gas * config/tc-mips.c (s_change_section): Use obj_elf_section_name to parse the section name.
* ia64: don't use get_symbol_name() for section parsing. With cross_section() ↵Jan Beulich2021-09-132-12/+9
| | | | | | | later calling obj_elf_section(), it seems better to pre-parse the section name by the same function that will be used there. This way no differences in what is accepted will result. gas * config/tc-ia64.c (cross_section): Use obj_elf_section_name to parse the section name.
* Re: gas: Use the directory name in .file 0Alan Modra2021-09-101-18/+18
| | | | | | PR gas/28266 * testsuite/gas/elf/dwarf-5-file0-2.s: Use %object rather than @object, .4byte instead of .long, and .asciz instead of .string.
* gas: Use the directory name in .file 0H.J. Lu2021-09-094-4/+135
| | | | | | | | | | | | | | | DWARF5 allows .file 0 to take an optional directory name. Set the entry 0 of the directory table to the directory name in .file 0. PR gas/28266 * dwarf2dbg.c (get_directory_table_entry): Add an argument for the directory name in .file 0 and use it, instead of PWD. (allocate_filenum): Pass NULL to get_directory_table_entry. (allocate_filename_to_slot): Pass the incoming dirname to get_directory_table_entry. * testsuite/gas/elf/dwarf-5-file0-2.d: New file. * testsuite/gas/elf/dwarf-5-file0-2.s: Likewise. * testsuite/gas/elf/elf.exp: Run dwarf-5-file0-2.
* RISC-V: Pretty print values formed with lui and addiw.Jim Wilson2021-09-084-17/+17
| | | | | | | | | | | | | | | | | | | The disassembler has support to pretty print values created by an lui/addi pair, but there is no support for addiw. There is also no support for c.addi and c.addiw. This patch extends the pretty printing support to handle these 3 instructions in addition to addi. Existing testcases serve as tests for the new feature. opcodes/ * riscv-dis.c (maybe_print_address): New arg wide. Sign extend when wide is true. (print_insn_args): Fix calls to maybe_print_address. Add checks for c.addi, c.addiw, and addiw, and call maybe_print_address for them. gas/ * testsuite/gas/riscv/insn.d: Update for disassembler change. * testsuite/gas/li32.d, testsuite/gas/li64.d: Likwise. * testsuite/gas/lla64.d: Likewise.
* Fix potential use on an uninitialised vairable in the MCore assembler.Nick Clifton2021-09-061-3/+6
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* Fix potential uninitialised variable in microblaze assembler code.Nick Clifton2021-09-061-1/+1
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* Add support for the haiku operating system. These are the os support ↵Alexander von Gluck IV2021-09-024-1/+40
| | | | patches we have been grooming and maintaining for quite a few years over on git.haiku-os.org. All of these architectures are working and most have been stable for quite some time.
* Fix the V850 assembler's generation of relocations for the st.b instruction.Nick Clifton2021-09-024-24/+34
| | | | | | | | | | | PR 28292 gas * config/tc-v850.c (handle_lo16): Also accept BFD_RELOC_V850_LO16_SPLIT_OFFSET. * testsuite/gas/v850/split-lo16.s: Add extra line. * testsuite/gas/v850/split-lo16.d: Update expected disassembly. opcodes * v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place of BFD_RELOC_16.
* RISC-V: Extend .insn directive to support hardcode encoding.Nelson Chu2021-08-317-5/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .insn directive can let users use their own instructions, or some new instruction, which haven't supported in the old binutils. For example, if users want to use sifive cache instruction, they cannot just write "cflush.d1.l1" in the assembly code, they should use ".insn i SYSTEM, 0, x0, x10, -0x40". But the .insn directive may not easy to use for some cases, and not so friendly to users. Therefore, I believe most of the users will use ".word 0xfc050073", to encode the instructions directly, rather than use .insn. But once we have supported the mapping symbols, the .word directives are marked as data, so disassembler won't dump them as instructions as usual. I have discussed this with Kito many times, we all think extend the .insn direcitve to support the hardcode encoding, is the easiest way to resolve the problem. Therefore, there are two more .insn formats are proposed as follows, (original) .insn <type>, <operand1>, <operand2>, ... .insn <insn-length>, <value> .insn <value> The <type> is string, and the <insn-length> and <value> are constants. gas/ * config/tc-riscv.c (riscv_ip_hardcode): Similar to riscv_ip, but assembles an instruction according to the hardcode values of .insn directive. * doc/c-riscv.texi: Document two new .insn formats. * testsuite/gas/riscv/insn-fail.d: New testcases. * testsuite/gas/riscv/insn-fail.l: Likewise. * testsuite/gas/riscv/insn-fail.s: Likewise. * testsuite/gas/riscv/insn.d: Updated. * testsuite/gas/riscv/insn.s: Likewise.
* RISC-V: PR27916, Support mapping symbols.Nelson Chu2021-08-3019-2/+516
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to ARM/AARCH64, we add mapping symbols in the symbol table, to mark the start addresses of data and instructions. The $d means data, and the $x means instruction. Then the disassembler uses these symbols to decide whether we should dump data or instruction. Consider the mapping-04 test case, $ cat tmp.s .text .option norelax .option norvc .fill 2, 4, 0x1001 .byte 1 .word 0 .balign 8 add a0, a0, a0 .fill 5, 2, 0x2002 add a1, a1, a1 .data .word 0x1 # No need to add mapping symbols. .word 0x2 $ riscv64-unknown-elf-as tmp.s -o tmp.o $ riscv64-unknown-elf-objdump -d tmp.o Disassembly of section .text: 0000000000000000 <.text>: 0: 00001001 .word 0x00001001 # Marked $d, .fill directive. 4: 00001001 .word 0x00001001 8: 00000001 .word 0x00000001 # .byte + part of .word. c: 00 .byte 0x00 # remaining .word. d: 00 .byte 0x00 # Marked $d, odd byte of alignment. e: 0001 nop # Marked $x, nops for alignment. 10: 00a50533 add a0,a0,a0 14: 20022002 .word 0x20022002 # Marked $d, .fill directive. 18: 20022002 .word 0x20022002 1c: 2002 .short 0x2002 1e: 00b585b3 add a1,a1,a1 # Marked $x. 22: 0001 nop # Section tail alignment. 24: 00000013 nop * Use $d and $x to mark the distribution of data and instructions. Alignments of code are recognized as instructions, since we usually fill nops for them. * If the alignment have odd bytes, then we cannot just fill the nops into the spaces. We always fill an odd byte 0x00 at the start of the spaces. Therefore, add a $d mapping symbol for the odd byte, to tell disassembler that it isn't an instruction. The behavior is same as Arm and Aarch64. The elf/linux toolchain regressions all passed. Besides, I also disable the mapping symbols internally, but use the new objudmp, the regressions passed, too. Therefore, the new objudmp should dump the objects corretly, even if they don't have any mapping symbols. bfd/ pr 27916 * cpu-riscv.c (riscv_elf_is_mapping_symbols): Define mapping symbols. * cpu-riscv.h: extern riscv_elf_is_mapping_symbols. * elfnn-riscv.c (riscv_maybe_function_sym): Do not choose mapping symbols as a function name. (riscv_elf_is_target_special_symbol): Add mapping symbols. binutils/ pr 27916 * testsuite/binutils-all/readelf.s: Updated. * testsuite/binutils-all/readelf.s-64: Likewise. * testsuite/binutils-all/readelf.s-64-unused: Likewise. * testsuite/binutils-all/readelf.ss: Likewise. * testsuite/binutils-all/readelf.ss-64: Likewise. * testsuite/binutils-all/readelf.ss-64-unused: Likewise. gas/ pr 27916 * config/tc-riscv.c (make_mapping_symbol): Create a new mapping symbol. (riscv_mapping_state): Decide whether to create mapping symbol for frag_now. Only add the mapping symbols to text sections. (riscv_add_odd_padding_symbol): Add the mapping symbols for the riscv_handle_align, which have odd bytes spaces. (riscv_check_mapping_symbols): Remove any excess mapping symbols. (md_assemble): Marked as MAP_INSN. (riscv_frag_align_code): Marked as MAP_INSN. (riscv_init_frag): Add mapping symbols for frag, it usually called by frag_var. Marked as MAP_DATA for rs_align and rs_fill, and marked as MAP_INSN for rs_align_code. (s_riscv_insn): Marked as MAP_INSN. (riscv_adjust_symtab): Call riscv_check_mapping_symbols. * config/tc-riscv.h (md_cons_align): Defined to riscv_mapping_state with MAP_DATA. (TC_SEGMENT_INFO_TYPE): Record mapping state for each segment. (TC_FRAG_TYPE): Record the first and last mapping symbols for the fragments. The first mapping symbol must be placed at the start of the fragment. (TC_FRAG_INIT): Defined to riscv_init_frag. * testsuite/gas/riscv/mapping-01.s: New testcase. * testsuite/gas/riscv/mapping-01a.d: Likewise. * testsuite/gas/riscv/mapping-01b.d: Likewise. * testsuite/gas/riscv/mapping-02.s: Likewise. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-02b.d: Likewise. * testsuite/gas/riscv/mapping-03.s: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-03b.d: Likewise. * testsuite/gas/riscv/mapping-04.s: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-04b.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04b.d: Likewise. * testsuite/gas/riscv/no-relax-align.d: Updated. * testsuite/gas/riscv/no-relax-align-2.d: Likewise. include/ pr 27916 * opcode/riscv.h (enum riscv_seg_mstate): Added. opcodes/ pr 27916 * riscv-dis.c (last_map_symbol, last_stop_offset, last_map_state): Added to dump sections with mapping symbols. (riscv_get_map_state): Get the mapping state from the symbol. (riscv_search_mapping_symbol): Check the sorted symbol table, and then find the suitable mapping symbol. (riscv_data_length): Decide which data size we should print. (riscv_disassemble_data): Dump the data contents. (print_insn_riscv): Handle the mapping symbols. (riscv_symbol_is_valid): Marked mapping symbols as invalid.
* x86: Put back 3 aborts in OP_E_memoryH.J. Lu2021-08-191-0/+1
| | | | | | | | | | | | | | Put back 3 aborts where invalid lengths should have been filtered out. gas/ PR binutils/28247 * testsuite/gas/i386/bad-bcast.s: Add a comment. opcodes/ PR binutils/28247 * * i386-dis.c (OP_E_memory): Put back 3 aborts.
* x86: Avoid abort on invalid broadcastH.J. Lu2021-08-193-0/+17
| | | | | | | | | | | | | | | | | Print "{bad}" on invalid broadcast instead of abort. gas/ PR binutils/28247 * testsuite/gas/i386/bad-bcast.d: New file. * testsuite/gas/i386/bad-bcast.s: Likewise. * testsuite/gas/i386/i386.exp: Run bad-bcast. opcodes/ PR binutils/28247 * i386-dis.c (OP_E_memory): Print "{bad}" on invalid broadcast instead of abort.
* Re: as: Replace the removed symbol with the versioned symbolAlan Modra2021-08-181-2/+2
| | | | | | | | | | | | | | | | | | | | Some targets, typically embedded without shared libraries, replace the relocation symbol with a section symbol (see tc_fix_adjustable). Allow the test to pass for such targets. Fixes the following. avr-elf +FAIL: symver symver16 d10v-elf +FAIL: symver symver16 dlx-elf +FAIL: symver symver16 ip2k-elf +FAIL: symver symver16 m68k-elf +FAIL: symver symver16 mcore-elf +FAIL: symver symver16 pj-elf +FAIL: symver symver16 s12z-elf +FAIL: symver symver16 visium-elf +FAIL: symver symver16 z80-elf +FAIL: symver symver16 PR gas/28157 * testsuite/gas/symver/symver16.d: Relax reloc match.
* PATCH [4/4] arm: Add Tag_PACRET_use build attributeAndrea Corallo2021-08-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_PACRET_use' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_PACRET_use' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_PACRET_use' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_PACRET_use'.
* PATCH [3/4] arm: Add Tag_BTI_use build attributeAndrea Corallo2021-08-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_BTI_use' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_BTI_use' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_BTI_use' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_BTI_use'.
* PATCH [2/4] arm: Add Tag_BTI_extension build attributeAndrea Corallo2021-08-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_BTI_extension' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_BTI_extension' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_BTI_extension' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_BTI_extension'.
* PATCH [1/4] arm: Add Tag_PAC_extension build attributeAndrea Corallo2021-08-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_PAC_extension' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_PAC_extension' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_PAC_extension' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_PAC_extension'.
* x86: Always run fp testsH.J. Lu2021-08-174-208/+1
| | | | | | | | | | | | | Always run fp tests since the size of .tfloat, .ds.x, .dc.x and .dcb.x directive outputs is always 10 bytes. There is no need for fp-elf32 nor fp-elf64. PR gas/28230 * testsuite/gas/i386/fp-elf32.d: Removed. * testsuite/gas/i386/fp-elf64.d: Likewise. * testsuite/gas/i386/fp.s: Remove NO_TFLOAT_PADDING codes. * testsuite/gas/i386/i386.exp: Don't run fp-elf32 nor fp-elf64. Always run fp.
* x86: Don't pad .tfloat directive outputH.J. Lu2021-08-165-15/+127
| | | | | | | | | | | | | | | | | | | .tfloat output should always be 10 bytes without padding, independent of psABIs. In glibc, x86 assembly codes expect 10-byte .tfloat output. This also reduces .ds.x output and .tfloat output with hex input from 12 bytes to 10 bytes to match .tfloat output. PR gas/28230 * NEWS: Mention changes of .ds.x output and .tfloat output with hex input. * config/tc-i386.c (x86_tfloat_pad): Removed. * config/tc-i386.h (X_PRECISION_PAD): Changed to 0. (x86_tfloat_pad): Removed. * testsuite/gas/i386/fp.s: If NO_TFLOAT_PADDING isn't defined, add explicit paddings after .tfloat, .ds.x, .dc.x and .dcb.x directives. * testsuite/gas/i386/i386.exp (ASFLAGS): Append "--defsym NO_TFLOAT_PADDING=1" when running the fp test.
* as: Replace the removed symbol with the versioned symbolH.J. Lu2021-08-168-10/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When a symbol removed by .symver is used in relocation and there is one and only one versioned symbol, don't remove the symbol. Instead, mark it to be removed and replace the removed symbol used in relocation with the versioned symbol before generating relocation. PR gas/28157 * symbols.c (symbol_flags): Add removed. (symbol_entry_find): Updated. (symbol_mark_removed): New function. (symbol_removed_p): Likewise. * symbols.h (symbol_mark_removed): New prototype. (symbol_removed_p): Likewise. * write.c (write_relocs): Call obj_fixup_removed_symbol on removed fixp->fx_addsy and fixp->fx_subsy if defined. (set_symtab): Don't add a symbol if symbol_removed_p returns true. * config/obj-elf.c (elf_frob_symbol): Don't remove the symbol if it is used on relocation. Instead, mark it as to be removed and issue an error if the symbol has more than one versioned name. (elf_fixup_removed_symbol): New function. * config/obj-elf.h (elf_fixup_removed_symbol): New prototype. (obj_fixup_removed_symbol): New. * testsuite/gas/symver/symver11.d: Updated expected error message. * testsuite/gas/symver/symver16.d: New file. * testsuite/gas/symver/symver16.s: Likewise.
* PR28168: [CSKY] Fix stack overflow in disassemblerLifang Xia2021-08-133-8/+21
| | | | | | | | | | | | PR 28168: Stack overflow with a large float. %f is not a goot choice for this. %f should be replaced with %.7g. gas/ * testsuite/gas/csky/pr28168.d: New testcase for PR 28168. * testsuite/gas/csky/pr28168.s: Likewise. * testsuite/gas/csky/v2_float_part2.d: Following the new format. * opcodes/csky-dis.c (csky_output_operand): %.7g replaces %f.
* Re: gas: support NaN flavorsAlan Modra2021-08-122-1/+10
| | | | | | | Fixes tic4x-coff FAIL: simple FP constants * testsuite/gas/all/float.s: Make NaN tests conditional on hasnan. * testsuite/gas/all/gas.exp: Define hasnan.
* Fix a typo in the RX asse,bler. The Double-precision floating-point ↵Darius Galis2021-08-115-4/+11
| | | | | | | | | exception handling control register name is DECNT not DCENT. * config/rx-parse.y (DECNT): Fixed typo. * testsuite/gas/rx/dpopm.sm (DECNT): Fixed typo. * testsuite/gas/rx/dpushm.sm (DECNT): Fixed typo. * testsuite/gas/rx/macros.inc (DECNT): Fixed typo.
* Fix an internal error in the CSKY assembler when asked to resolve an ↵Nick Clifton2021-08-112-1/+8
| | | | | | | | overlarge constant. PR 28215 * config/tc-csky.c (md_apply_fix): Correctly handle a fixup that involves an overlarge constant.
* Deprecate a.out support for NetBSD targets.John Ericson2021-08-115-1704/+1694
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As discussed previously, a.out support is now quite deprecated, and in some cases removed, in both Binutils itself and NetBSD, so this legacy default makes little sense. `netbsdelf*` and `netbsdaout*` still work allowing the user to be explicit about there choice. Additionally, the configure script warns about the change as Nick Clifton requested. One possible concern was the status of NetBSD on NS32K, where only a.out was supported. But per [1] NetBSD has removed support, and if it were to come back, it would be with ELF. The binutils implementation is therefore marked obsolete, per the instructions in the last message. With that patch and this one applied, I have confirmed the following: --target=i686-unknown-netbsd --target=i686-unknown-netbsdelf builds completely --target=i686-unknown-netbsdaout properly fails because target is deprecated. --target=vax-unknown-netbsdaout builds completely except for gas, where the target is deprecated. [1]: https://mail-index.netbsd.org/tech-toolchain/2021/07/19/msg004025.html --- bfd/config.bfd | 43 +++++++++++++-------- bfd/configure.ac | 5 +-- binutils/testsuite/binutils-all/nm.exp | 2 +- binutils/testsuite/lib/binutils-common.exp | 7 +--- config/picflag.m4 | 4 +- gas/configure.tgt | 9 +++-- gas/testsuite/gas/arm/blx-bl-convert.d | 2 +- gas/testsuite/gas/arm/blx-local-thumb.d | 2 +- gas/testsuite/gas/sh/basic.exp | 2 +- gdb/configure.host | 34 +++++++---------- gdb/configure.tgt | 2 +- gdb/testsuite/gdb.asm/asm-source.exp | 6 +-- intl/configure | 2 +- ld/configure.tgt | 44 +++++++++++----------- ld/testsuite/ld-arm/arm-elf.exp | 4 +- ld/testsuite/ld-elf/elf.exp | 2 +- ld/testsuite/ld-elf/shared.exp | 4 +- libiberty/configure | 4 +-
* Add a -mno-dollar-line-separator command line option to the AVR assembler.Matt Jacobson2021-08-114-4/+33
| | | | | | | | | | | | | Some frontends, like the gcc Objective-C frontend, emit symbols with $ characters in them. The AVR target code in gas treats $ as a line separator, so the code doesn?t assemble correctly. Provide a machine-specific option to disable treating $ as a line separator. * config/tc-avr.c (enum options): Add option flag. (struct option): Add option -mno-dollar-line-separator. (md_parse_option): Adjust treatment of $ when option is present. * config/tc-avr.h: Use avr_line_separator_chars.
* Fix typo in previous deltaNick Clifton2021-08-112-2/+6
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* gas: fold IEEE encoding of -Inf with that of +InfJan Beulich2021-08-111-42/+3
| | | | | | The respective results differ only by the sign bits - there's no need to have basically identical (partially even arch-specific) logic twice. Simply set the sign bit at the end of encoding the various formats.
* gas: support NaN flavorsJan Beulich2021-08-119-18/+221
| | | | | | | | | | | | | | | | | | | | Like for infinity, there isn't just a single NaN. The sign bit may be of interest and, going beyond infinity, whether the value is quiet or signalling may be even more relevant to be able to encode. Note that an anomaly with x86'es double extended precision NaN values gets taken care of at the same time: For all other formats a positive value with all mantissa bits set was used, while here a negative value with all non-significant mantissa bits clear was chose for an unknown reason. For m68k, since I don't know their X_PRECISION floating point value layout, a warning gets issued if any of the new flavors was attempted to be encoded that way. However likely it may be that, given that the code lives in a source file supposedly implementing IEEE-compliant formats, the bit patterns of the individual words match x86'es, I didn't want to guess so. And my very, very old paper doc doesn't even mention floating point formats other than single and double.
* Arm64: leave .bfloat16 processing to common codeJan Beulich2021-08-111-49/+1
| | | | | | | With x86 support having been implemented by extending atof-ieee.c, avoid unnecessary code duplication in md_atof(). This will then also allow to take advantage of adjustments made there without needing to mirror them here.
* Arm32: leave more .bfloat16 processing to common codeJan Beulich2021-08-111-46/+3
| | | | | | | With x86 support having been implemented by extending atof-ieee.c, avoid unnecessary code duplication in md_atof(). This will then also allow to take advantage of adjustments made there without needing to mirror them here.
* gas: make 2nd argument of .dcb.* consistently optionalJan Beulich2021-08-112-55/+78
| | | | | | | Unlike the forms consuming/producing integer data, the floating point ones so far required the 2nd argument to be present, contrary to documentation. To avoid code duplication, split float_length() out of hex_float() (taking the opportunity to adjust error message wording).
* x86: introduce .bfloat16 directiveJan Beulich2021-08-118-14/+32
| | | | | | | | | | | This is to be able to generate data acted upon by AVX512-BF16 and AMX-BF16 insns. While not part of the IEEE standard, the format is sufficiently standardized to warrant handling in config/atof-ieee.c. Arm, where custom handling was implemented, may want to leverage this as well. To be able to also use the hex forms supported for other floating point formats, a small addition to the generic hex_float() is needed. Extend existing x86 testcases.
* x86: introduce .hfloat directiveJan Beulich2021-08-117-6/+21
| | | | | | | | | This is to be able to generate data passed to {,V}CVTPH2PS and acted upon by AVX512-FP16 insns. To be able to also use the hex forms supported for other floating point formats, a small addition to the generic hex_float() is needed. Extend existing x86 testcases.
* x86/ELF: fix .tfloat output with hex inputJan Beulich2021-08-115-4/+29
| | | | | | | | | | | | | The ELF psABI-s are quite clear here: On 32-bit the data type is 12 bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16 bytes long (with 6 bytes of padding). Make hex_float() capable of handling such padding. Note that this brings the emitted data size of .dc.x / .dcb.x in line also for non-ELF targets; so far they were different depending on input format (dec vs hex). Extend the existing x86 testcases.
* x86/ELF: fix .ds.x outputJan Beulich2021-08-117-7/+38
| | | | | | | | | | | | | | | | | | | | | | | | | The ELF psABI-s are quite clear here: On 32-bit the underlying data type is 12 bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16 bytes long (with 6 bytes of padding). Make s_space() capable of handling 'x' (and 'p') type floating point being other than 12 bytes wide (also adjusting documentation). This requires duplicating the definition of X_PRECISION in the target speciifc header; the compiler would complain if this was out of sync with config/atof-ieee.c. Note that for now padding space doesn't get separated from actual storage, which means that things will work correctly only for little- endian cases, and which also means that by specifying large enough numbers padding space can be set to non-zero. Since the logic is needed for a single little-endian architecture only for now, I'm hoping that this might be acceptable for the time being; otherwise the change will become more intrusive. Note also that this brings the emitted data size of .ds.x vs .tfloat in line for non-ELF targets as well; the issue will be even more obvious when further taking into account a subsequent patch fixing .dc.x/.dcb.x (where output sizes currently differ depending on input format). Extend existing x86 testcases.
* x86/ELF: fix .tfloat outputJan Beulich2021-08-117-6/+60
| | | | | | | | The ELF psABI-s are quite clear here: On 32-bit the data type is 12 bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16 bytes long (with 6 bytes of padding). Make ieee_md_atof() capable of handling such padding, and specify the needed padding for x86 (leaving non-ELF targets alone for now). Split the existing x86 testcase.
* Updated Serbian and Russian translations for various sub-directoriesNick Clifton2021-08-102-4241/+4330
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