summaryrefslogtreecommitdiff
path: root/gas
Commit message (Expand)AuthorAgeFilesLines
* Updated French translation for the gas sub-directory.Nick Clifton2022-01-282-2250/+2641
* gas: drop old cygnus install hackMike Frysinger2022-01-242-13/+5
* Update Bulgarian, French, Romaniam and Ukranian translation for some of the s...Nick Clifton2022-01-242-2245/+2639
* Regenerate Makefile.in files with automake 1.15.1H.J. Lu2022-01-231-1/+0
* Regenerate configure files with autoconf 2.69H.J. Lu2022-01-231-15/+3
* Change version number to 2.38.50 and regenerate filesNick Clifton2022-01-223-23/+40
* Add markers for 2.38 branchNick Clifton2022-01-222-0/+6
* RISC-V: create new frag after alignment.Lifang Xia2022-01-221-0/+6
* drop old unused stamp-h.in fileMike Frysinger2022-01-211-1/+0
* Update the config.guess and config.sub files from the master repository and r...Nick Clifton2022-01-173-1800/+2149
* Fix Z80 assembly failure.Sergey Belyashov2022-01-172-0/+7
* Re: gas: add visibility support using GNU syntax on XCOFFAlan Modra2022-01-131-1/+1
* gas: add visibility support using GNU syntax on XCOFFClément Chigot2022-01-125-0/+85
* gas: add visibility support for XCOFFClément Chigot2022-01-127-36/+405
* objdump, readelf: Emit "CU:" format only when wide output is requestedHans-Peter Nilsson2022-01-121-1/+1
* gas/doc: mention quoted symbol namesJan Beulich2022-01-111-1/+4
* XCOFF: add support for TLS relocations on hidden symbolsClément Chigot2022-01-108-97/+308
* RISC-V: update docs to reflect privileged spec v1.9 has been droppedPhilipp Tomsich2022-01-075-8/+8
* RISC-V: update docs for -mpriv-spec/--with-priv-spec for 1.12Philipp Tomsich2022-01-076-9/+9
* RISC-V: Updated the default ISA spec to 20191213.Nelson Chu2022-01-077-7/+7
* aarch64: Add support for new SME instructionsRichard Sandiford2022-01-062-0/+56
* x86: drop NoAVX insn attributeJan Beulich2022-01-061-17/+21
* x86-64: restrict PC32 -> PLT32 conversionJan Beulich2022-01-062-3/+7
* Adjust quoted-sym-names testAlan Modra2022-01-052-6/+6
* x86/Intel: correct VFPCLASSP{S,D} handling when displacement is presentJan Beulich2022-01-044-5/+9
* gas: rework handling of backslashes in quoted symbol namesJan Beulich2022-01-045-15/+69
* Update year range in copyright notice of binutils filesAlan Modra2022-01-02575-579/+579
* ubsan: next_char_of_string signed integer overflowAlan Modra2022-01-011-2/+2
* ubsan: signed integer multiply overflowAlan Modra2022-01-011-1/+6
* gas reloc sortingAlan Modra2021-12-284-42/+30
* RISC-V: Rewrite the csr testcases.Nelson Chu2021-12-2442-1521/+3567
* RISC-V: Hypervisor ext: support Privileged Spec 1.12Vineet Gupta2021-12-245-5/+313
* RISC-V: Hypervisor ext: drop Privileged Spec 1.9.1 implementation/testsVineet Gupta2021-12-249-90/+0
* RISC-V: Update Scalar Crypto testcases.jiawei2021-12-2218-144/+144
* x86: -mfence-as-lock-add=yes doesn't work for 16-bit modeJan Beulich2021-12-211-1/+6
* gas/ELF: avoid below-base ref in obj_elf_parse_section_letters()Jan Beulich2021-12-211-13/+11
* x86: Terminate mnemonicendp in swap_operand()Vladimir Mezentsev2021-12-178-420/+420
* Fix AVR assembler so that it creates relocs that will work with linker relaxa...Nick Clifton2021-12-167-6/+45
* arm: Add support for Armv9.1-A to Armv9.3-ARichard Sandiford2021-12-1611-3/+94
* arm: Add support for Armv8.7-A and Armv8.8-ARichard Sandiford2021-12-169-1/+65
* aarch64: Add support for Armv9.1-A to Armv9.3-ARichard Sandiford2021-12-1618-2/+95
* RISC-V: Support svinval extension with frozen version 1.0.Nelson Chu2021-12-162-0/+20
* loongarch64 build failure on 32-bit hostAlan Modra2021-12-151-6/+6
* RISC-V: Clarify the behavior of .option arch directive.Nelson Chu2021-12-098-9/+13
* aarch64: Update gas/NEWS for recent changesRichard Sandiford2021-12-021-1/+4
* aarch64: Add BC instructionRichard Sandiford2021-12-027-0/+90
* aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford2021-12-024-10/+202
* aarch64: Add support for +mopsRichard Sandiford2021-12-027-0/+1592
* aarch64: Add Armv8.8-A system registersRichard Sandiford2021-12-025-0/+46
* aarch64: Add id_aa64isar2_el1Richard Sandiford2021-12-025-0/+8