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* [gas/ARM] Remove spurious commentsThomas Preud'homme2018-01-192-2/+5
* RISC-V: Fix bug in prior addi/c.nop patch.Jim Wilson2018-01-172-0/+15
* Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist2018-01-1712-6/+69
* Update translations for various binutils components.Nick Clifton2018-01-162-2448/+2647
* RISC-V: Add support for addi that compresses to c.nop.Jim Wilson2018-01-153-2/+9
* [ARM] Add new macro for Thumb-only opcodesThomas Preud'homme2018-01-152-9/+27
* [ARM] Enable conditional Armv8-M instructionsThomas Preud'homme2018-01-153-11/+27
* [ARM] No IT usage deprecation for ARMv8-MThomas Preud'homme2018-01-157-54/+70
* Update Ukranian translations for bfd, binutils, gas, gold, ld and opcodesNick Clifton2018-01-152-2446/+2678
* Update pot filesNick Clifton2018-01-132-2430/+2597
* Bump version number to 2.30.51Nick Clifton2018-01-132-10/+14
* Add note about 2.30 branch creation to changelogsNick Clifton2018-01-131-0/+1
* Add 2.30 markers to NEWS files.Nick Clifton2018-01-132-0/+6
* Fix compile time warning building aout targeted architectures.Gunther Nikl2018-01-122-3/+10
* Remove VL variants for 4FMAPS and 4VNNIW insns.Igor Tsimbalist2018-01-1120-1030/+36
* gas tc-arm.c warning fixAlan Modra2018-01-112-1/+6
* x86: fix Disp8 handling for scalar AVX512_4FMAPS insnsJan Beulich2018-01-1013-381/+402
* x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variantsJan Beulich2018-01-107-0/+46
* RISC-V: Disassemble x0 based addresses as 0.Jim Wilson2018-01-093-0/+21
* [Arm] Add CSDB instructionJames Greenhalgh2018-01-096-0/+44
* Add support for the AArch64's CSDB instruction.James Greenhalgh2018-01-092-1/+6
* x86: Properly encode vmovd with 64-bit memeoryH.J. Lu2018-01-085-0/+145
* Add a description of the X86_64 assembler's .largcomm pseudo-op.Nick Clifton2018-01-082-1/+16
* RISC-V: Add 2 missing privileged registers.Jim Wilson2018-01-043-24/+33
* Update year range in copyright notice of binutils filesAlan Modra2018-01-03578-580/+584
* ChangeLog rotationAlan Modra2018-01-032-4407/+4421
* Fix typo in do_mrs function in ARM assembler.Nick Clifton2018-01-022-1/+7
* RISC-V: Add missing privileged spec registers.Jim Wilson2017-12-283-0/+522
* RISC-V: Add compressed instruction hints, and a few misc cleanups.Jim Wilson2017-12-2014-0/+110
* Correct disassembly of dot product instructions.Tamar Christina2017-12-193-434/+446
* Add support for V_4B so we can properly reject it.Tamar Christina2017-12-195-3/+35
* Resolve PR 22493 - the encoding to be used when pushing the stack pointer ont...Nick Clifton2017-12-182-0/+11
* x86: fold certain AVX and AVX2 templatesJan Beulich2017-12-182-38/+52
* x86: fold RegXMM/RegYMM/RegZMM into RegSIMDJan Beulich2017-12-184-125/+146
* x86: drop FloatReg and FloatAccJan Beulich2017-12-182-11/+18
* x86: replace Reg8, Reg16, Reg32, and Reg64Jan Beulich2017-12-183-133/+138
* x86: Check pseudo prefix without instructionH.J. Lu2017-12-175-0/+32
* x86: correct operand type checksJan Beulich2017-12-152-4/+9
* x86: correct abort checkJan Beulich2017-12-152-2/+7
* Update the address of the FSF in the copyright notice of files which were usi...Nick Clifton2017-12-148-21/+31
* Add missing RISC-V fsrmi and fsflagsi instructions.Jim Wilson2017-12-133-0/+22
* This patch enables disassembler_needs_relocs for PRU. It is needed to print c...Dimitar Dimitrov2017-12-133-0/+21
* Don't mask X_add_number containing a register numberAlan Modra2017-12-122-1/+6
* gas: xtensa: fix comparison of trampoline chain symbolsMax Filippov2017-12-082-4/+28
* Documentation fixAlan Modra2017-12-042-1/+6
* Run powerpc vle gas tests for all powerpc ELF targetsAlan Modra2017-12-0419-39/+58
* Fix for texinfo 4.8.Jim Wilson2017-12-032-2/+6
* Update and clean up RISC-V gas documentation.Jim Wilson2017-12-013-19/+134
* Use consistent types for holding instructions, instruction masks, etc.Peter Bergner2017-12-012-32/+44
* x86: drop Vec_Disp8Jan Beulich2017-11-302-54/+28
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