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* 2001-01-14 Kazu Hirata <kazu@hxi.com>Kazu Hirata2001-01-142-376/+378
| | | | * config/tc-arc.c: Fix formatting.
* 2001-01-14 Kazu Hirata <kazu@hxi.com>Kazu Hirata2001-01-1413-38/+43
| | | | | | | | | | | | | | | * config/tc-alpha.c: Fix formatting. * config/tc-arc.c: Likewise. * config/tc-arc.h: Likewise. * config/tc-d10v.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tahoe.c: Likewise. * config/tc-vax.c: Likewise.
* Use SEGREL32 relocs for elf32-hppa unwind.Alan Modra2001-01-142-6/+5
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* Adds assembly and dis-assembly support for the HPPA wideAlan Modra2001-01-142-31/+64
| | | | mode, 16 bit forms of ldi, ldo, ldw and stw instructions.
* * tc-i386.h (TARGET_MACH): New macro.Jan Hubicka2001-01-133-0/+21
| | | | | (i386_mach): Declare. * tc-i386.c (i386_mach): New function.
* 2001-01-13 Philip Blundell <philb@gnu.org>Phil Blundell2001-01-133-35/+50
| | | | | | | | * doc/as.texinfo: Fix spelling and cross-references. * doc/c-arm.texi: Fix typos. Say that `;' is a line separator character for all systems, not just GNU/Linux. Make it explicit that `-k' doesn't affect code generation, just ELF flags.
* Formatting fixNick Clifton2001-01-131-1/+0
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* * i386.c (md_assemble): Check cpu_flags even for nullary instructions.Jan Hubicka2001-01-132-2/+13
| | | | | | | * i386.h (i386_optab): Fix pusha and ret templates. * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret templates.
* * gas/cgen featureFrank Ch. Eigler2001-01-122-1/+9
| | | | | | 2001-01-12 Frank Ch. Eigler <fche@redhat.com> * cgen.c (gas_cgen_finish_insn): Call dwarf2_emit_insn.
* Update copyright date to 2001Nick Clifton2001-01-122-2/+6
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* Add missing ARC documentationNick Clifton2001-01-122-0/+212
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* Cure recent x86 warts.Alan Modra2001-01-128-249/+266
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* Updated ARC assembler from arccores.comNick Clifton2001-01-1179-1416/+4738
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* Fix gas 68HC12 indexed addressing code generationStephane Carrez2001-01-115-37/+112
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* Dwarf2 test for 68HC11/68HC12 gasStephane Carrez2001-01-115-0/+427
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* Fix weak symbols for 68HC11 asStephane Carrez2001-01-112-6/+27
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* Rotate ChangeLogsNick Clifton2001-01-112-4861/+4856
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* Make COFF and ELF disassemblys agreeNick Clifton2001-01-113-8/+15
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* * config/tc-i386.h (TC_RELOC_GLOBAL_OFFSET_TABLE): Removed, it'sAndreas Jaeger2001-01-112-10/+6
| | | | not used anywhere.
* Allow ADRL relocs to be adjusted in arm-coffNick Clifton2001-01-113-1/+22
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* Fix local label code to use LOCAL_LABEL_PREFIXNick Clifton2001-01-112-9/+35
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* * i386.exp: Add ssemmx2 and sse2 tests.Jan Hubicka2001-01-106-0/+478
| | | | (sse2.d, sse2.s, ssemmx2.d, ssemmx2.s): New tests.
* fix patterns to match new behaviour of disassemblerNick Clifton2001-01-093-5/+11
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* 2001-01-03 Philip Blundell <pb@futuretv.com>Phil Blundell2001-01-092-0/+5
| | | | * gas/vtable/vtable.exp: Don't run tests on Alpha.
* 2001-01-08 Bo Thorsen <bo@suse.de>Andreas Jaeger2001-01-082-46/+51
| | | | | * config/tc-i386.c (i386_immediate, i386_displacement): GOTPCREL check fix.
* * doc/c-i386.texi (i386-Arch): Remove spaces incorrectly insertedIan Lance Taylor2001-01-082-1/+6
| | | | in last change.
* Update address for bug reports.Phil Blundell2001-01-073-2/+8
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* * configure.in: Define DEFAULT_ARCH for i386.Jan Hubicka2001-01-068-174/+521
| | | | | | | | | | | * tc-i386.c (md_assemble): Return after the error message; move testing for 64bit operands to proper place. * i386.exp: Add tests for presence of 32bit versus 64bit output format; run both 64bit and 32bit tests when format is available; add x86_64 test. * x86_64.s: New file. * x86_64.d: New file.
* 2001-01-06 Jan Hubicka <jh@suse.cz>, Andreas Jaeger <aj@suse.de>Andreas Jaeger2001-01-063-31/+205
| | | | | | | * doc/as.texinfo: Document '#' as comment character for i386 and x86_64. Add AMD x86-64 into menu of machine dependent information. * doc/c-i386.texi: Document x86_64 extensions.
* * tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.Jan Hubicka2001-01-052-18/+10
| | | | * i386.h (i386_optab): Make [sml]fence template to use immext field.
* * tc-i386.c (cpu_arch): Add Pentium4 and modify sledgehammer entry.Jan Hubicka2001-01-043-1/+9
| | | | * NEWS: Add note about Pentium4 support.
* * tc-i387.c (pi, pte, pt): Update.Jan Hubicka2001-01-032-16/+24
| | | | (type_names): Add new types.
* * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,Jan Hubicka2001-01-032-8/+17
| | | | | | | | | CpuUnknown): Renumber (CpuP4, CpuSSE2): New. (CpuUnknownFlags): Add CpuP4 and CpuSSE2 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions introduced by Pentium4
* 2001-01-03 Philip Blundell <pb@futuretv.com>Phil Blundell2001-01-032-1/+16
| | | | | | | * config/tc-alpha.c (alpha_force_relocation): Handle vtable relocs. (alpha_fix_adjustable): Likewise. (md_apply_fix): Likewise.
* Fix msr-bsd testNick Clifton2001-01-022-1/+6
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* 2001-01-01 Philip Blundell <philb@gnu.org>Phil Blundell2001-01-018-0/+83
| | | | | | | * gas/arm/adrl.s, gas/arm/pic.s, gas/arm/msr-bad.s: New tests. * gas/arm/arm.exp: Run them. * gas/arm/adrl.d, gas/arm/pic.d: Expected results for above. * gas/arm/arm6.s: Also test uppercase `CPSR' and `SPSR'.
* 2000-12-31 H.J. Lu <hjl@gnu.org>H.J. Lu2001-01-013-174/+184
| | | | | | | * listing.c (listing_message): Allocate string only if it is used. * configure: Rebuild.
* * doc/internals.texi (Relaxing with a table) <after relaxation>:Hans-Peter Nilsson2000-12-312-0/+15
| | | | Point out caveats with generating fixups for the opcode in a frag.
* * configure.in: Add support for x86_64 and x86_64-*-linux-gnu*Jan Hubicka2000-12-303-1/+10
| | | | | | | | | | | | | * NEWS: Add x86_64. * i386.h (i386_optab): Add "rex*" instructions; add swapgs; disable jmp/call far direct instructions for 64bit mode; add syscall and sysret; disable registers for 0xc6 template. Add 'q' suffixes to extendable instructions, disable obsoletted instructions, add new sign/zero extension ones. (i386_regtab): Add extended registers. (*Suf): Add No_qSuf. (q_Suf, wlq_Suf, bwlq_Suf): New.
* 2000-12-29 H.J. Lu <hjl@gnu.org>H.J. Lu2000-12-292-0/+6
| | | | | * listing.c (calc_hex): Print the variable part only if the fragment type is rs_fill.
* * doc/internals.texi (tc_conditional_pseudoop,Hans-Peter Nilsson2000-12-292-2/+7
| | | | TC_LINKRELAX_FIXUP): Fix typos.
* * write.c (subsegs_finish): Fix thinko last change -- don'tRichard Henderson2000-12-282-7/+9
| | | | "optimize" the alignment == 0 case.
* * as.h (rs_align_test): New.Richard Henderson2000-12-2823-259/+421
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * frags.c (NOP_OPCODE): Move default from read.c. (MAX_MEM_FOR_RS_ALIGN_CODE): New default. (frag_align_code): New. * frags.h (frag_align_code): Declare. * read.c (NOP_OPCODE): Remove. (do_align): Use frag_align_code. * write.c (NOP_OPCODE): Remove. (get_recorded_alignment): New. (cvt_frag_to_fill): Handle rs_align_test. (relax_segment): Likewise. (subsegs_finish): Align last subseg in section to the section alignment. Use frag_align_code. * write.h (get_recorded_alignment): Declare. * config/obj-coff.c (size_section): Handle rs_align_test. (fill_section, fixup_mdeps): Likewise. (write_object_file): Use frag_align_code. * config/tc-alpha.c (alpha_align): Use frag_align_code. (alpha_handle_align): New. * config/tc-alpha.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-i386.h (md_do_align): Use frag_align_code. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-ia64.c (ia64_md_do_align): Don't do code alignment. (ia64_handle_align): New. * config/tc-ia64.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m32r.c (m32r_do_align): Remove. (m32r_handle_align): New. (fill_insn): Use frag_align_code. * config/tc-m32r.h (md_do_align): Remove. (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m88k.c, config/tc-m88k.h: Similarly. * config/tc-mips.c, config/tc-mips.h: Similarly. * config/tc-sh.c (sh_cons_align): Use rs_align_test. (sh_handle_align): Likewise. Handle rs_align_code. (sh_do_align): Remove. * config/tc-sh.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-sparc.c (sparc_cons_align): Use rs_align_test. (sparc_handle_align): Likewise. Handle rs_align_code. * config/tc-sparc.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New.
* * config/tc-d10v.c (md_assemble): set prev_seg and prev_subsegDJ Delorie2000-12-222-0/+7
| | | | when we assemble the first half of a pair.
* 2000-12-22 H.J. Lu <hjl@gnu.org>H.J. Lu2000-12-223-2/+7
| | | | | * gas/i386/intel.s: Replace "nop" with ".p2align 4,0". * gas/i386/intel.d: Updated.
* 2000-12-22 H.J. Lu <hjl@gnu.org>H.J. Lu2000-12-222-10/+17
| | | | | | * config/tc-i386.c (reloc): Update the macro for non-bfd assembler. (BFD_RELOC_X86_64_GOTPCREL): Set to 0 for non-bfd assembler.
* 2000-12-22 H.J. Lu <hjl@gnu.org>H.J. Lu2000-12-222-9/+4
| | | | * dwarf2dbg.c (dwarf2_finish): Remove #if BFD_ASSEMBLER.
* Revert accidental checkin.Jan Hubicka2000-12-201-0/+1
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* * tc-i386.h (i386_target_format): Define even for ELFs.Jan Hubicka2000-12-204-263/+935
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (QWORD_MNEM_SUFFIX): New macro. (CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags): New macros (CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber. (IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix, ImmExt): Renumber. (Size64, No_qSuf, NoRex64, Rex64): New macros. (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros. (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32, InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc, SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber. (Reg, WordReg): Add Reg64. (Imm): Add Imm32S and Imm64. (EncImm): New. (Disp): Add Disp64 and Disp32S. (AnyMem): Add Disp32S. (RegRex, RegRex64): New macros. (rex_byte): New type. * tc-i386.c (set_16bit_code_flag): Kill. (fits_in_unsigned_long, fits_in_signed_long): New functions. (reloc): New parameter "signed"; support x86_64. (set_code_flag): New. (DEFAULT_ARCH): New macro; default to "i386". (default_arch): New static variable. (struct _i386_insn): New fields Operand_PCrel; rex. (flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT"; (flag_code): New enum and static variable. (use_rela_relocations): New static variable. (flag_code_names): New static variable. (cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64. (cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to K6 and Athlon. (i386_align_code): Return plain "nop" for x86_64. (mode_from_disp_size): Support Disp32S. (smallest_imm_type): Support Imm32S and Imm64. (offset_in_range): Support size of 8. (set_cpu_arch): Do not clobber to Cpu64/CpuNo64. (md_pseudo_table): Add "code64"; use set_code_flat. (md_begin): Emit sane error message on hash failure. (tc_i386_fix_adjustable): Support x86_64 relocations. (md_assemble): Support QWORD_MNEM_SUFFIX, REX registers, instructions supported on particular arch just partially, output of 64bit immediates, handling of Imm32S and Disp32S type. (i386_immedaite): Support x86_64 relocations; support 64bit constants. (i386_displacement): Likewise. (i386_index_check): Cleanup; support 64bit addresses. (md_apply_fix3): Support x86_64 relocation and rela. (md_longopts): Add "32" and "64". (md_parse_option): Add OPTION_32 and OPTION_64. (i386_target_format): Call even for ELFs; choose between elf64-x86-64 and elf32-i386. (i386_validate_fix): Refuse GOTOFF in 64bit mode. (tc_gen_reloc): Support rela relocations and x86_64. (intel_e09_1): Support QWORD. * i386.h (i386_optab): Replace "Imm" with "EncImm". (i386_regtab): Add flags field.
* 2000-12-15 Diego Novillo <dnovillo@redhat.com>Diego Novillo2000-12-162-10/+59
| | | | | | | | | * config/tc-i386.c (intel_e09_1): Only flag as a memory operand if it's not an offset expression. (intel_e10_1): Ditto. Also, if the operand is an offset expression, keep the braces '[' and ']' in the output string. (intel_e11): Ditto. Also remove comparison intel_parser.op_modifier != FLAT. There is no such op_modifier.
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