summaryrefslogtreecommitdiff
path: root/gas
Commit message (Expand)AuthorAgeFilesLines
* [ARM] Allow MOV/MOV.W to accept all possible immediatesJiong Wang2016-11-0310-17/+108
* Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist2016-11-0216-2/+762
* Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist2016-11-0224-3/+1124
* Add support for RISC-V architecture.Nick Clifton2016-11-0116-7/+2667
* gas/arc: Don't rely on bfd list of cpu type for cpu selectionAndrew Burgess2016-10-273-91/+131
* Revert "bison warning fixes"Alan Modra2016-10-263-2/+8
* X86: Remove pcommit instructionH.J. Lu2016-10-2110-84/+13
* Check invalid mask registersH.J. Lu2016-10-204-0/+30
* [GAS][ARM]Generate unpredictable warning for pc used in data processing instr...Renlin Li2016-10-195-0/+103
* Fixed matching in newly added test.Cupertino Miranda2016-10-172-1/+5
* Removed pseudo invalid instructions opcodes.Cupertino Miranda2016-10-173-0/+21
* [ARC] Disassembler: fix LIMM detection for short instructions.Claudiu Zissulescu2016-10-145-0/+47
* Enhance objdump so that it will use .got, .plt and .plt.got section symbols w...Nick Clifton2016-10-112-2/+6
* [AArch64] PR target/20666, fix wrong encoding of new introduced BFC pseudoJiong Wang2016-10-112-17/+22
* MIPS64: Adjust cfi* testcases.Andreas Krebbel2016-10-1010-17/+29
* Auto-generated dependencies for rx-parse.o and rl78-parse.oAlan Modra2016-10-083-27/+22
* [AArch64] PR target/20667, fix disassembler for the "special" optional SYS_Rt...Jiong Wang2016-10-073-0/+162
* [ARC] Fix parsing leave_s and enter_s mnemonics.Claudiu Zissulescu2016-10-066-2/+68
* -Wimplicit-fallthrough dodgy fixesAlan Modra2016-10-063-4/+9
* Refine .cfi_sections check to only consider compact eh_frameMatthew Fortune2016-10-065-1/+42
* -Wimplicit-fallthrough warning fixesAlan Modra2016-10-0637-18/+193
* -Wimplicit-fallthrough noreturn fixesAlan Modra2016-10-062-1/+5
* -Wimplicit-fallthrough error fixesAlan Modra2016-10-069-10/+28
* bison warning fixesAlan Modra2016-10-063-2/+7
* [AArch64] PR target/20553, fix opcode mask for SIMD multiply by elementJiong Wang2016-09-303-0/+22
* Add .cfi_val_offset GAS command.Andreas Krebbel2016-09-296-0/+76
* Disallow 3-operand cmp[l][i] for ppc64Alan Modra2016-09-294-4/+12
* tc-xtensa.c: fixup xg_reverse_shift_count typoTrevor Saunders2016-09-262-1/+6
* When building target binaries, ensure that the warning flags selected for the...Vlad Zakharov2016-09-264-6/+58
* PowerPC .gnu.attributesAlan Modra2016-09-262-0/+29
* Remove legacy basepri_mask MRS/MSR special regThomas Preud'homme2016-09-222-1/+5
* [AArch64] Print spaces after commas in addressesRichard Sandiford2016-09-2116-9612/+9633
* [AArch64] Use "must" rather than "should" in error messagesRichard Sandiford2016-09-216-80/+90
* [AArch64] Add SVE condition codesRichard Sandiford2016-09-2111-69/+228
* Fix misplaced ChangeLogRichard Sandiford2016-09-212-11/+15
* [AArch64][SVE 32/32] Add SVE testsRichard Sandiford2016-09-2115-0/+79428
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-213-1/+27
* [AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford2016-09-212-0/+11
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-212-3/+44
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-212-0/+32
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-212-15/+68
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-212-23/+237
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-212-1/+49
* [AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford2016-09-212-0/+71
* [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford2016-09-212-4/+61
* [AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford2016-09-212-31/+148
* [AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford2016-09-212-0/+10
* [AArch64][SVE 13/32] Add an F_STRICT flagRichard Sandiford2016-09-212-4/+6
* [AArch64][SVE 12/32] Remove boolean parameters from parse_address_mainRichard Sandiford2016-09-214-24/+57
* [AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64 interfaceRichard Sandiford2016-09-215-339/+371
View Lorry Controller Status